Patents by Inventor Kang-Jae Lee

Kang-Jae Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240238750
    Abstract: A method for controlling nitrogen oxide (NOx) includes adjusting a flow rate of d gas injected into an arc-type plasma generating device, and identifying a concentration of the generated nitrogen oxide, while adjusting an amount of energy per unit flow rate of the injected gas.
    Type: Application
    Filed: July 20, 2021
    Publication date: July 18, 2024
    Inventors: Yong Cheol HONG, Kang II KIM, Geon Woo YANG, Hee Jae LEE
  • Publication number: 20220266415
    Abstract: A substrate polishing apparatus according to an example embodiment may include a substrate carrier configured to grasp and move a substrate, a polishing pad configured to come into contact with a polishing target surface of the substrate and polish the polishing target surface of the substrate, and a spray unit including a spray member configured to spray a fluid toward the substrate carrier.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 25, 2022
    Applicant: KCTECH CO., LTD.
    Inventors: Sung Ho SHIN, Geun Sik YUN, Hee Cheul JUNG, Tae Hyeon KIM, Kang Jae LEE, Jin Su BAE, Sun Su KIM
  • Patent number: 10459420
    Abstract: Disclosed are a method for setting a feed rate of a rotating cutting tool in real time and a device for controlling a feed rate of a rotating cutting tool in real time. The method includes: a vibration data collecting operation (S20) of collecting vibration information from a sensor installed in a machine tool (100); a chatter vibration trend diagram deducing operation (S30) of deducing a chatter vibration trend diagram (G) by simplifying an increase and a decrease of chatter vibration based on the collected vibration data; a chatter vibration trend determining operation (S40) of determining whether an inclination of the chatter vibration trend diagram (G) is increased or decreased; and tool feed rate adjusting operations (S51 and S52) of adjusting a feed rate of the tool to be decreased when the inclination of the chatter vibration trend diagram (G) is increased.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: October 29, 2019
    Assignee: DOOSAN MACHINE TOOLS CO., LTD.
    Inventors: Kang Jae Lee, Jin Suk Song
  • Patent number: 10073660
    Abstract: Provided herein are a memory system and method of operating the memory system, which have improved reliability. A method of operating a controller for controlling a semiconductor memory device including a plurality of memory blocks, the method comprising generating a program command and a program address for performing a program operation on at least one page included in an open block, among the plurality of memory blocks, reading data from the at least one page corresponding to the program address and transmitting the program command and the program address to the semiconductor memory device when the number of fail bits included in data read from the at least one page is equal to or less than a first reference value.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: September 11, 2018
    Assignee: SK Hynix Inc.
    Inventors: Byoung Jun Park, Seong Jo Park, Kang Jae Lee
  • Publication number: 20170371575
    Abstract: Provided herein are a memory system and method of operating the memory system, which have improved reliability. A method of operating a controller for controlling a semiconductor memory device including a plurality of memory blocks, the method comprising generating a program command and a program address for performing a program operation on at least one page included in an open block, among the plurality of memory blocks, reading data from the at least one page corresponding to the program address and transmitting the program command and the program address to the semiconductor memory device when the number of fail bits included in data read from the at least one page is equal to or less than a first reference value.
    Type: Application
    Filed: October 20, 2016
    Publication date: December 28, 2017
    Inventors: Byoung Jun PARK, Seong Jo PARK, Kang Jae LEE
  • Patent number: 9792992
    Abstract: The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit: suitable for performing an erase operation and a program operation to the memory cell array, and a control logic suitable for controlling the peripheral circuit to erase all of the plurality of memory blocks and then to program the plurality of memory blocks with dummy data during the erase operation.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: October 17, 2017
    Assignee: SK Hynix Inc.
    Inventors: Byoung Jun Park, Seong Jo Park, Kang Jae Lee
  • Publication number: 20170278574
    Abstract: The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit: suitable for performing an erase operation and a program operation to the memory cell array, and a control logic suitable for controlling the peripheral circuit to erase all of the plurality of memory blocks and then to program the plurality of memory blocks with dummy data during the erase operation.
    Type: Application
    Filed: July 21, 2016
    Publication date: September 28, 2017
    Inventors: Byoung Jun PARK, Seong Jo PARK, Kang Jae LEE
  • Patent number: 9604287
    Abstract: Disclosed are a setting method and a control device of a depth of cut in an initial axial direction for a rotating cutting tool. A setting method of a depth of cut in an initial axial direction for a rotating cutting tool according to the present disclosure includes when a tool T is mounted on a spindle S, receiving an overhang length L of the tool T, the diameter D of the tool T, an overhang length ratio reference value C, and an axial depth of cut reference value E; calculating an axial depth of cut Y; and setting the axial depth of cut Y as an initial axial depth of cut of a cutting process.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: March 28, 2017
    Assignee: Doosan Machine Tools Co., Ltd.
    Inventors: Kang Jae Lee, Jin Suk Song, Han Kee Jang
  • Patent number: 9588512
    Abstract: Disclosed is a setting method of revolutions per minute on a real time of a rotating cutting tool, and a control device, and more particularly, a vibration characteristic is consistently evaluated and analyzed when a cutting process is in progress to suppress and avoid suppression.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: March 7, 2017
    Assignee: Doosan Machine Tools Co., Ltd.
    Inventors: Kang Jae Lee, Jin Suk Song
  • Publication number: 20160161936
    Abstract: Disclosed are a method for setting a feed rate of a rotating cutting tool in real time and a device for controlling a feed rate of a rotating cutting tool in real time. The method includes: a vibration data collecting operation (S20) of collecting vibration information from a sensor installed in a machine tool (100); a chatter vibration trend diagram deducing operation (S30) of deducing a chatter vibration trend diagram (G) by simplifying an increase and a decrease of chatter vibration based on the collected vibration data; a chatter vibration trend determining operation (S40) of determining whether an inclination of the chatter vibration trend diagram (G) is increased or decreased; and tool feed rate adjusting operations (S51 and S52) of adjusting a feed rate of the tool to be decreased when the inclination of the chatter vibration trend diagram (G) is increased.
    Type: Application
    Filed: December 8, 2015
    Publication date: June 9, 2016
    Inventors: Kang Jae LEE, Jin Suk SONG
  • Patent number: 8936983
    Abstract: A method of fabricating a semiconductor device according to present invention includes forming a stack layers on a semiconductor substrate having a first area and a second area; forming first gates on the semiconductor substrate of the first area by patterning the stack layers, wherein the first gates are formed a first distance apart from each other; forming a first impurity injection area in the semiconductor substrate of the first area exposed at both sides of each of the first gates; filling a space between the first gates with an insulating layer; forming second gates on the semiconductor substrate of the second area by patterning the stack layers, wherein the second gates are formed a second distance apart from each other, and wherein the second distance is larger than the first distance; and forming a second impurity injection area in the semiconductor device of the second area exposed between the second gates.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: January 20, 2015
    Assignee: SK Hynix Inc.
    Inventors: Kang Jae Lee, Eun Joo Jung
  • Publication number: 20140364991
    Abstract: Disclosed is a setting method of revolutions per minute on a real time of a rotating cutting tool, and a control device, and more particularly, a vibration characteristic is consistently evaluated and analyzed when a cutting process is in progress to suppress and avoid suppression.
    Type: Application
    Filed: June 10, 2014
    Publication date: December 11, 2014
    Inventors: Kang Jae LEE, Jin Suk SONG
  • Publication number: 20140364990
    Abstract: Disclosed are a setting method and a control device of a depth of cut in an initial axial direction for a rotating cutting tool. A setting method of a depth of cut in an initial axial direction for a rotating cutting tool according to the present disclosure includes when a tool T is mounted on a spindle S, receiving an overhang length L of the tool T, the diameter D of the tool T, an overhang length ratio reference value C, and an axial depth of cut reference value E; calculating an axial depth of cut Y; and setting the axial depth of cut Y as an initial axial depth of cut of a cutting process.
    Type: Application
    Filed: June 10, 2014
    Publication date: December 11, 2014
    Inventors: Kang Jae LEE, Jin Suk SONG, Han Kee JANG
  • Patent number: 8519471
    Abstract: A method for fabricating a vertical channel type nonvolatile memory device includes forming alternately a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, forming a trench having a plurality of recesses on a surface of the trench by etching the plurality of interlayer dielectric layers and a plurality of conductive layers, wherein the plurality of recesses are formed at a certain interval on the surface of the trench, forming a charge blocking layer over a plurality of surfaces of the plurality of recesses, forming a charge storage layer over the charge blocking layer for filling a plurality of the remaining recesses with a charge storage material, forming a tunnel dielectric layer to cover the charge storage layer, and forming a vertical channel layer by filling the remaining trench.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: August 27, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seoung-Woo Kuk, Kang-Jae Lee
  • Publication number: 20120156841
    Abstract: A method of fabricating a semiconductor device according to present invention includes forming a stack layers on a semiconductor substrate having a first area and a second area; forming first gates on the semiconductor substrate of the first area by patterning the stack layers, wherein the first gates are formed a first distance apart from each other; forming a first impurity injection area in the semiconductor substrate of the first area exposed at both sides of each of the first gates; filling a space between the first gates with an insulating layer; forming second gates on the semiconductor substrate of the second area by patterning the stack layers, wherein the second gates are formed a second distance apart from each other, and wherein the second distance is larger than the first distance; and forming a second impurity injection area in the semiconductor device of the second area exposed between the second gates.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 21, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Kang Jae LEE, Eun Joo JUNG
  • Publication number: 20110147823
    Abstract: A method for fabricating a vertical channel type nonvolatile memory device includes forming alternately a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, forming a trench having a plurality of recesses on a surface of the trench by etching the plurality of interlayer dielectric layers and a plurality of conductive layers, wherein the plurality of recesses are formed at a certain interval on the surface of the trench, forming a charge blocking layer over a plurality of surfaces of the plurality of recesses, forming a charge storage layer over the charge blocking layer for filling a plurality of the remaining recesses with a charge storage material, forming a tunnel dielectric layer to cover the charge storage layer, and forming a vertical channel layer by filling the remaining trench.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 23, 2011
    Inventors: Seoung-Woo KUK, Kang-Jae Lee