Patents by Inventor Kang-Yoon Lee

Kang-Yoon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9935666
    Abstract: A transceiver may include a reception (Rx) radio frequency (RF) part configured to process a received signal, a transmission (Tx) RF part configured to process a transmitted signal, and a phase lock loop (PLL) configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part. The PLL may be controlled according to whether the reception RF part or the transmission RF part is on. In addition, a transceiver may include quenching waveform generator (QWGs) to control quenching waveforms of the RF parts corresponding to a plurality of antennas. The quenching waveforms may be generated respectively by VCOs operating at a same frequency. The QWGs may control the VCOs such that the quenching waveforms do not overlap.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: April 3, 2018
    Assignees: Samsung Electronics Co., Ltd., Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Jaesup Lee, Hong Jin Kim, Hyung Gu Park, Kang Yoon Lee
  • Patent number: 9929672
    Abstract: A rectifier includes: first and second high side switches including source terminals connected to an alternating current input terminal and drain terminals connected to one end of an output capacitor; first and second low side switches including drain terminals connected to the alternating current input terminal and source terminals connected to a ground terminal and another end of the output capacitor; and a cross connector configured to allow parasitic capacitance of the first high side switch or the second high side switch to flow to a ground when the first high side switch or the second high side switch is turned off.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: March 27, 2018
    Assignees: Samsung Electro-Mechanics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Chang Soo Kang, Chul Gyun Park, Kang Yoon Lee, Joo Young Chun
  • Patent number: 9923554
    Abstract: A wireless power transmitter includes an amplifier configured to amplify a power; a transmitter configured to resonate the power amplified by the amplifier; and a reference signal provider configured to provide a reference signal to the amplifier and change a frequency of the reference signal.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: March 20, 2018
    Assignees: Samsung Electro-Mechanics Co., Ltd., University of Seoul Industry Cooperation Foundation
    Inventors: Byung Joo Hong, Je Hyuk Ryu, Hyung Gu Park, Joong Ho Choi, Hong Jin Kim, Joo Young Lee, Dong Hyeon Seo, Young Jun Park, Jong Woo Lee, Kang Yoon Lee
  • Publication number: 20180026820
    Abstract: A simultaneous wireless information and power transmission method includes: transmitting an energy transfer signal comprising a peak-to-average power ratio (PAPR) corresponding to information to be transmitted at a first side; measuring the PAPR by receiving the energy transfer signal at a second side; and recovering the information from the measured PAPR at the second side.
    Type: Application
    Filed: January 6, 2017
    Publication date: January 25, 2018
    Applicant: Research & Business Foundation Sungkyunkwan University
    Inventors: Dong In KIM, Jong Ho MOON, Jong Jin PARK, Kang Yoon LEE
  • Publication number: 20180026467
    Abstract: A method of charging a battery by a charging system comprising a master charging circuit and N (N is a natural number) slave charging circuits. The method includes: sourcing a first current to a single-wired bus by the master charging circuit; absorbing (sinking) a second current from the single-wired bus by the N slave charging circuits connected to the single-wired bus; identifying a single-wired bus voltage formed on the single-wired bus at a particular time point by the master charging circuit; and identifying the number of slave charging circuits based on the single-wired bus voltage by the master charging circuit.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 25, 2018
    Inventors: Ho Jun SHIN, Kang Yoon LEE, Kwang Muk CHOI, Il Kwon JANG, Han Suk SEO, Hyung Gu PARK, Young Jun PARK, Seong Jin OH, Ju Hyun PARK, Jung Yeon KIM
  • Patent number: 9876440
    Abstract: Disclosed herein is an active rectifier. The rectifier includes a rectifier unit, a driver unit, and a switching device control circuit unit. The rectifier unit includes first and fourth transistors configured to become conductive when the voltage of an alternating current (AC) input is negative and apply the current of the AC input to a rectifier capacitor, and second and third transistors configured to become conductive when the voltage of the AC input is positive and apply the current of the AC input to the rectifier capacitor. The driver unit outputs first to fourth drive control signals, and drives the first to fourth transistors. The switching device control circuit unit compares the first drive control signal and the second drive control signal with the AC input, and outputs switching device control signals to delay the first to fourth drive control signals based on the extents to delay.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: January 23, 2018
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Kang Yoon Lee, Seong Jin Oh, Youngoo Yang, Keum Cheol Hwang, Young Jun Park, Sang Yun Kim, Byeong Gi Jang, Jung Yeon Kim
  • Patent number: 9853564
    Abstract: A synchronous rectifier includes: a rectifying circuit including transistors, the rectifying circuit being configured to generate rectified power by rectifying input power input to an input terminal of the rectifying circuit depending on switching operations of the transistors, and output the rectified power to an output terminal of the rectifying circuit; and a controller configured to apply a gate signal to each of the, and adjust a pulse width of the gate signal depending on a difference between the input power and the gate signal.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: December 26, 2017
    Assignees: Samsung Electro-Mechanics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Chang Soo Kang, Chul Gyun Park, Young Jun Park, Kang Yoon Lee
  • Patent number: 9843251
    Abstract: A rectifier includes: a rectifying circuit configured to rectify alternating current (AC) power into direct current (DC) power through a switching operation; a driver configured to apply a switching signal to the rectifying circuit; and a signal modulator configured to select a parameter from among parameters of the switching signal based on a frequency of the switching signal, and adjust the selected parameter.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: December 12, 2017
    Assignees: Samsung Electro-Mechanics Co., Ltd., University of Seoul Industry Cooperation Foundation
    Inventors: Byung Joo Hong, Jong Woo Lee, Hyung Gu Park, Young Jun Park, Seong Jin Oh, Kang Yoon Lee, Joong Ho Choi, Hong Jin Kim, Je Hyuk Ryu, Jung Yeon Kim
  • Patent number: 9831719
    Abstract: The present invention relates to an apparatus and a method for transmitting wireless power, and more particularly, to an apparatus and a method for transmitting wireless power that rapidly and precisely adjusts impedance so as to transmit desired power. Disclosed an apparatus for transmitting wireless power that performs wireless power transmission, including: an oscillator; an amplifier; an impedance matcher including a matching network which adjusts impedance according to a digital control signal and an analog signal, a sensor, a digital controller which outputs a digital control signal, and generates an analog control start signal when adjustment of the impedance by the digital control signal is completed, and an analog controller which outputs the analog control signal, and a transmitting antenna which radiates the magnetic field by using the transmission power.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: November 28, 2017
    Assignee: Intellectual Discovery Co., Ltd.
    Inventors: Kang Yoon Lee, Hyung Gu Park, Jae Hyeong Jang, Ji Hun Kang
  • Patent number: 9774274
    Abstract: An active rectifier and a wireless power reception apparatus using the same are disclosed herein. The active rectifier includes first and fourth switches, second and third switches, and a synchronization control unit. The first and fourth switches are turned on while the voltage of an alternating current (AC) input is negative, and apply the current of the AC input to a rectifying capacitor. The second and third switches are turned on while a voltage of the AC input is positive, and apply the current of the AC input to the rectifying capacitor. The synchronization control unit compensates for the delay time of the comparator for detecting zero-crossing of the AC input so as to switch the first to fourth switches.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: September 26, 2017
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Kang Yoon Lee, Jae Hyung Jang, Hyung Gu Park, Joo Young Chun
  • Publication number: 20170207807
    Abstract: A transceiver may include a reception (Rx) radio frequency (RF) part configured to process a received signal, a transmission (Tx) RF part configured to process a transmitted signal, and a phase lock loop (PLL) configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part. The PLL may be controlled according to whether the reception RF part or the transmission RF part is on. In addition, a transceiver may include quenching waveform generator (QWGs) to control quenching waveforms of the RF parts corresponding to a plurality of antennas. The quenching waveforms may be generated respectively by VCOs operating at a same frequency. The QWGs may control the VCOs such that the quenching waveforms do not overlap.
    Type: Application
    Filed: April 4, 2017
    Publication date: July 20, 2017
    Applicants: SAMSUNG ELECTRONICS CO., LTD., Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Jaesup LEE, Hong Jin KIM, Hyung Gu PARK, Kang Yoon LEE
  • Patent number: 9647609
    Abstract: A transceiver may include a reception (Rx) radio frequency (RF) part configured to process a received signal, a transmission (Tx) RF part configured to process a transmitted signal, and a phase lock loop (PLL) configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part. The PLL may be controlled according to whether the reception RF part or the transmission RF part is on. In addition, a transceiver may include quenching waveform generator (QWGs) to control quenching waveforms of the RF parts corresponding to a plurality of antennas. The quenching waveforms may be generated respectively by VCOs operating at a same frequency. The QWGs may control the VCOs such that the quenching waveforms do not overlap.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: May 9, 2017
    Assignees: Samsung Electronics Co., Ltd., SUNGKYUNKWAN UNIVERSITY FOUNDATION FOR CORPORATE COLLABORATION
    Inventors: Jaesup Lee, Hong Jin Kim, Hyung Gu Park, Kang Yoon Lee
  • Publication number: 20170118722
    Abstract: A wireless power transmitter includes an amplifier configured to amplify a power; a transmitter configured to resonate the power amplified by the amplifier; and a reference signal provider configured to provide a reference signal to the amplifier and change a frequency of the reference signal.
    Type: Application
    Filed: June 29, 2016
    Publication date: April 27, 2017
    Applicants: SAMSUNG ELECTRO-MECHANICS CO., LTD., University of Seoul Industry Cooperation Foundation
    Inventors: Byung Joo HONG, Je Hyuk RYU, Hyung Gu PARK, Joong Ho CHOI, Hong Jin KIM, Joo Young LEE, Dong Hyeon SEO, Young Jun PARK, Jong Woo LEE, Kang Yoon LEE
  • Patent number: 9577575
    Abstract: An injection locked frequency divider is disclosed. The injection-locked frequency divider includes a sub-harmonic injection-locked oscillator, a reference clock divider, a counter, and a variable load resistor control unit. The sub-harmonic injection-locked oscillator has variable load resistors that are adjusted in response to a resistance adjustment signal, and, when oscillation frequency determined based on the magnitudes of the variable load resistors is a sub-harmonic of an injection signal, outputs signals having the oscillation frequency as divided output signals. The reference clock divider generates a count-enable signal from a reference clock signal according to a reference division ratio. The counter generates divided output count signals based on the divided output signals in response to the count-enable signal.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: February 21, 2017
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Kang Yoon Lee, Sang Yun Kim, Young Jun Park, Dong Soo Lee
  • Publication number: 20160380555
    Abstract: A synchronous rectifier includes: a rectifying circuit including transistors, the rectifying circuit being configured to generate rectified power by rectifying input power input to an input terminal of the rectifying circuit depending on switching operations of the transistors, and output the rectified power to an output terminal of the rectifying circuit; and a controller configured to apply a gate signal to each of the, and adjust a pulse width of the gate signal depending on a difference between the input power and the gate signal.
    Type: Application
    Filed: February 23, 2016
    Publication date: December 29, 2016
    Applicants: Samsung Electro-Mechanics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Chang Soo KANG, Chul Gyun PARK, Young Jun PARK, Kang Yoon LEE
  • Publication number: 20160373023
    Abstract: A rectifier includes: a rectifying circuit configured to rectify alternating current (AC) power into direct current (DC) power through a switching operation; a driver configured to apply a switching signal to the rectifying circuit; and a signal modulator configured to select a parameter from among parameters of the switching signal based on a frequency of the switching signal, and adjust the selected parameter.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 22, 2016
    Applicants: Samsung Electro-Mechanics Co., Ltd., University of Seoul Industry Cooperation Foundation
    Inventors: Byung Joo HONG, Jong Woo LEE, Hyung Gu PARK, Young Jun PARK, Seong Jin OH, Kang Yoon LEE, Joong Ho CHOI, Hong Jin KIM, Je Hyuk RYU, Jung Yeon KIM
  • Publication number: 20160352248
    Abstract: A rectifier includes: first and second high side switches including source terminals connected to an alternating current input terminal and drain terminals connected to one end of an output capacitor; first and second low side switches including drain terminals connected to the alternating current input terminal and source terminals connected to a ground terminal and another end of the output capacitor; and a cross connector configured to allow parasitic capacitance of the first high side switch or the second high side switch to flow to a ground when the first high side switch or the second high side switch is turned off.
    Type: Application
    Filed: February 11, 2016
    Publication date: December 1, 2016
    Applicants: Samsung Electro-Mechanics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Chang Soo KANG, Chul Gyun PARK, Kang Yoon LEE, Joo Young CHUN
  • Publication number: 20160248377
    Abstract: An injection locked frequency divider is disclosed. The injection-locked frequency divider includes a sub-harmonic injection-locked oscillator, a reference clock divider, a counter, and a variable load resistor control unit. The sub-harmonic injection-locked oscillator has variable load resistors that are adjusted in response to a resistance adjustment signal, and, when oscillation frequency determined based on the magnitudes of the variable load resistors is a sub-harmonic of an injection signal, outputs signals having the oscillation frequency as divided output signals. The reference clock divider generates a count-enable signal from a reference clock signal according to a reference division ratio. The counter generates divided output count signals based on the divided output signals in response to the count-enable signal.
    Type: Application
    Filed: December 11, 2015
    Publication date: August 25, 2016
    Applicant: Research & Business Foundation Sungkyunkwan University
    Inventors: Kang Yoon LEE, Sang Yun KIM, Young Jun PARK, Dong Soo LEE
  • Publication number: 20160234007
    Abstract: A clock and data recovery circuit is disclosed herein. The clock and data recovery circuit includes a phase detection unit, a charge pump, a loop filter, a voltage control oscillator, and a frequency detection unit. The voltage control oscillator has oscillation frequency that is variable in response to a frequency adjustment signal, and outputs an oscillation signal. The frequency detection unit includes a reference clock divider, a counter, and an oscillation frequency control unit. The reference clock divider generates a count-enable signal based on a reference clock signal. The counter generates an oscillation count signal by counting the pulses of the oscillation signal of the voltage control oscillator or the pulses of divided signals resulting from dividing the oscillation signal while the count-enable signal is being enabled. The oscillation frequency control unit compares a target count value with the value of the oscillation count signal, and outputs the frequency adjustment signal.
    Type: Application
    Filed: December 11, 2015
    Publication date: August 11, 2016
    Applicant: Research & Business Foundation Sungkyunkwan Univer sity
    Inventors: Kang Yoon LEE, Sang Yun KIM, In Seong KIM, Seong Jin OH, Dong Soo LEE
  • Patent number: RE46890
    Abstract: A method of forming a semiconductor device including a memory cell area having a plurality of memory cells and a peripheral circuit area for reading and writing data on the memory cells in the memory cell area of a semiconductor substrate is provided. Contact pads are formed on source/drain regions of transistors in the peripheral circuit area as well as in the memory cell area. The contact pads are concurrently formed on the source/drain regions of the transistors in the memory cell area and the peripheral circuit area. As a result, there is no step difference between the contact pads and, thus, it is easy to form metal contact plugs on the contact pads.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: June 12, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Kang-Yoon Lee