Patents by Inventor Kaoru Ishida

Kaoru Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6980831
    Abstract: A wireless communication base station system of the present invention includes a wireless key base station, an optical forward base station, and an optical transmitter which connects the wireless key base station and the optical forward base station to each other. An optical signal modulated by a signal component and that modulated by a distortion component are transmitted from the wireless key base station to the optical forward base station. In the optical forward base station, these optical signals are converted to high-frequency electrical signals, and the high-frequency signal consisting of the signal component is amplified. Thereafter, the amplified signal is combined with the high-frequency signal consisting of the distortion component with their phases opposite to each other, so that the distortion component include in the amplified signal is removed.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: December 27, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshimitsu Matsuyoshi, Kaoru Ishida, Hisashi Adachi
  • Patent number: 6977548
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: December 20, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6972621
    Abstract: A power amplifier capable of compensating for distortion by pre-distortion and achieving a large distortion suppressing effect even if IM3L components and IM3U components occurring at the power amplifier have a large level difference. A power amplifying circuit 117 amplifies an original signal. An envelope detector 119 generates an envelope signal having components identical to envelope components included in the original signal. Based on the original signal a distortion signal generating circuit 112 generates a distortion signal for canceling distortion components occurring while the original signal is amplified by the power amplifying circuit 117. In a power combiner 116, the envelope signal is injected to the original signal, thereby eliminating the asymmetric characteristic of the distortion components. In the power amplifying circuit 117, the distortion signal is injected to the original signal, thereby suppressing the distortion components.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: December 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshimitsu Matsuyoshi, Kaoru Ishida, Seiji Fujiwara
  • Patent number: 6960957
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: November 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6960958
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: November 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6960959
    Abstract: A power amplifier of amplifying signals of two frequency bands is reduced in size and improved in efficiency at low output. The power amplifier includes an input terminal, a branch circuit and so on having one input and a plurality of outputs, the input being connected to the input terminal, amplifying means which are connected to some outputs of the branch circuit and so on and are operated at different signal frequencies from each other, a transmission line connected to one of the other outputs of the branch circuit, a synthesizing circuit connected to the outputs of the amplifying means and the output from the transmission line, a switch provided between the transmission line and a synthesis output unit, and a control circuit of controlling conduction of the branch circuit and so on, conduction and an amplifying operation of the amplifying means, and conduction of the switch.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: November 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Naoki Komatsu, Toru Matsuura, Hiroshi Isono, Kaoru Ishida
  • Publication number: 20050237113
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Application
    Filed: April 7, 2005
    Publication date: October 27, 2005
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6946926
    Abstract: A wired transmission path includes first and second differential transmission paths. The first differential transmission path is composed of two strip lines, and the second differential transmission path is composed of two strip lines. Each of the strip lines of the first differential transmission path is disposed at an equal distance from the strip lines of the second differential transmission path. Thus, there is provided a wired transmission path including a plurality of differential transmission paths in such a manner so as to cancel crosstalk.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: September 20, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mikihiro Shimada, Kaoru Ishida, Hiroyuki Asakura
  • Publication number: 20050197084
    Abstract: A mixer circuit is provided with a quadrature demodulator including a Gilbert cell in which a first differential amplifier and a switching circuit are vertically stacked for connection and a bypass circuit including a second differential amplifier having a pair of differential input terminals short-circuited with each other, and provided in parallel with the first differential amplifier. Correction of a DC offset is performed by inactivating the first differential amplifier and activating the second differential amplifier, and detecting the DC offset under such state.
    Type: Application
    Filed: March 7, 2005
    Publication date: September 8, 2005
    Applicant: MARSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshinori Hamasaki, Kaoru Ishida
  • Patent number: 6940346
    Abstract: The conventional feedforward amplifier is unable to suppress distortion components efficiently. The present invention provides a feedforward amplifier wherein the vector adjustor is adjusted so that (1) suppression is performed on only the distortion component generated within a predetermined frequency range out of the range of frequencies to be suppressed in which distortion components to be suppressed occur or (2) the suppression of the distortion component generated within the predetermined frequency range is greater than the suppression of the distortion component generated within the frequency range other than the predetermined frequency range out of the range of frequencies to be suppressed, and the pre-distortion circuit is adjusted so that at least the distortion component generated within the frequency range other than the predetermined frequency range is suppressed.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: September 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Miyaji, Kaoru Ishida, Toshimitsu Matsuyoshi, Hisashi Adachi, Seiji Fujiwara
  • Publication number: 20050186934
    Abstract: An object of the present invention is to provide a semiconductor integrated circuit that reduces the influence of noise from a digital circuit block on an analog circuit block, both the circuit blocks being integrated on the same semiconductor substrate. In the wiring that passes through near the analog circuit block and the digital circuit block, having a grounding unit that performs alternate grounding makes it possible to reduce the influence of noise from the digital circuit block on the analog circuit block.
    Type: Application
    Filed: February 11, 2005
    Publication date: August 25, 2005
    Inventors: Hiroshi Yajima, Kaoru Ishida
  • Patent number: 6933780
    Abstract: A predistortion circuit has an input terminal for inputting a predetermined signal; a nonlinear device directly or indirectly connected to the input terminal; a bias supply circuit for applying a voltage to the nonlinear device; specific-frequency suppressing means connected to one side or both sides of the nonlinear device directly without another intervening device and of suppressing all or part of such frequencies that are from a frequency corresponding to DC to a frequency corresponding to an occupied band width of an input signal inputted to the input terminal and/or suppressing at least one higher harmonic frequency of a carrier wave of the input signal; and an output terminal for outputting a signal.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: August 23, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiji Fujiwara, Toru Matsuura, Kaoru Ishida, Makoto Sakakura
  • Publication number: 20050139988
    Abstract: Crosstalk is suppressed low even when one surface of a multi-layer board seats a semiconductor integrated circuit of the BGA type and peripheral circuit components. Of a plurality of BGA bumps arranged on the back surface of a semiconductor integrated circuit chip, those BGA bumps (such as a high-frequency signal pin) to which peripheral circuit components need be mounted right close are arranged outer-most, and peripheral circuit components are then mounted right close to these BGA bumps. The BGA bumps one tier inner from the outer-most BGA bumps, which are to be used as grounding terminals, are connected with a wide inner-layer grounding wire pattern. Those BGA bumps (such as a logic control signal pin) to which peripheral circuit components need not be mounted right close are disposed further inward and connected with an inner-layer wire pattern which is located even deeper down from a front layer.
    Type: Application
    Filed: December 1, 2004
    Publication date: June 30, 2005
    Inventor: Kaoru Ishida
  • Publication number: 20050090218
    Abstract: A differential type voltage control oscillator is formed of a differential tank circuit, an oscillation transistor, and a differential variable capacitance circuit. The differential variable capacitance circuit has a configuration wherein at least one pair of varactor diodes are connected in an anti-parallel manner, and are separated by means of a plurality of capacitors in a direct current manner. In addition, a differential control voltage is generated by a charge pump circuit which is controlled by the output of a phase comparator, and the differential control voltage is directly applied across the anodes and the cathodes of the varactor diodes.
    Type: Application
    Filed: October 22, 2004
    Publication date: April 28, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kaoru Ishida, Toshiakira Ando
  • Publication number: 20050045989
    Abstract: A semiconductor device includes: a semiconductor substrate in which a semiconductor element is formed; a multilayer structured wiring layer that is provided on the semiconductor substrate, the wiring layer forming a structure connected with the semiconductor element; a spiral inductor that is formed in at least one layer of the wiring layer; and a connection terminal formed in an uppermost layer of the wiring layer for establishing connection from the wiring layer to an outside such as a printed board. A shielding wiring pattern is disposed between the spiral inductor and the connection terminal, the shielding wiring pattern functioning as an electromagnetic shield for the uppermost layer of the wiring layer. The shielding wiring pattern absorbs a change in electrical field caused by a potential change in the connection terminal, providing a shielding structure which suppresses the superposing of noise and an unnecessary signal onto the spiral inductor from the connection terminal.
    Type: Application
    Filed: August 27, 2004
    Publication date: March 3, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsukasa Fukui, Kaoru Ishida
  • Publication number: 20050046477
    Abstract: A power amplifier capable of compensating for distortion by pre-distortion and achieving a large distortion suppressing effect even if IM3L components and IM3U components occurring at the power amplifier have a large level difference. A power amplifying circuit 117 amplifies an original signal. An envelope detector 119 generates an envelope signal having components identical to envelope components included in the original signal. Based on the original signal a distortion signal generating circuit 112 generates a distortion signal for canceling distortion components occurring while the original signal is amplified by the power amplifying circuit 117. In a power combiner 116, the envelope signal is injected to the original signal, thereby eliminating the asymmetric characteristic of the distortion components. In the power amplifying circuit 117, the distortion signal is injected to the original signal, thereby suppressing the distortion components.
    Type: Application
    Filed: October 15, 2004
    Publication date: March 3, 2005
    Inventors: Toshimitsu Matsuyoshi, Kaoru Ishida, Seiji Fujiwara
  • Publication number: 20050035818
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Application
    Filed: September 22, 2004
    Publication date: February 17, 2005
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6847258
    Abstract: It is difficult that the impedance of the circuit part on the output side of an amplifying element at the frequency of a modulating wave is lower, and consequently, it is difficult to more effectively use the linearity of the amplifying element. The phase of a signal of the frequency of the modulating wave included in an amplified signal output from a FET is inverted by a difference frequency inverting circuit. The inverted signal of the frequency of the modulating wave and a signal of the frequency of a modulated wave included in an amplified signal output from a FET cancel each other out at the drain of the FET. At the drain end of the FET, the signal of the frequency of the modulating wave included in the amplified signal of the FET and a signal of the frequency of the modulating wave output from the FET cancel each other out.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: January 25, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Toshimitsu Matsuyoshi, Masayuki Miyaji
  • Patent number: 6833758
    Abstract: A power amplifier capable of compensating for distortion by pre-distortion and achieving a large distortion suppressing effect even if IM3L components and IM3U components occurring at the power amplifier have a large level difference. A power amplifying circuit 117 amplifies an original signal. An envelope detector 119 generates an envelope signal having components identical to envelope components included in the original signal. Based on the original signal a distortion signal generating circuit 112 generates a distortion signal for canceling distortion components occurring while the original signal is amplified by the power amplifying circuit 117. In a power combiner 116, the envelope signal is injected to the original signal, thereby eliminating the asymmetric characteristic of the distortion components. In the power amplifying circuit 117, the distortion signal is injected to the original signal, thereby suppressing the distortion components.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: December 21, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshimitsu Matsuyoshi, Kaoru Ishida, Seiji Fujiwara
  • Patent number: 6813317
    Abstract: A multicarrier transmitting method that includes inputting n input signals, generating carriers corresponding to the n input signals, modulating the carriers into n modulated signals and generating at least one additional signal having a frequency outside band of the n modulated signals. The method also includes adjusting a level and a phase of the generated additional signal, outputting a multiplexed signal by adding up the n modulated signals and the adjusted additional signal, amplifying the multiplexed signal, and then removing the additional signal. The level and the phase of the additional signal are adjusted such that, after predicting a change of a composite vector of the n modulated signals based on an amplitude and a phase of the n carriers, a composite vector obtained after an adding operation can be lower than that before the adding operation when an absolute value of a prediction result exceeds a predetermined level.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: November 2, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Shin'ichi Kugou