Abstract: Receiver design techniques are provided that are capable of producing relatively efficient, linear radio frequency (RF) receivers. During a design process, components of an analog receiver chain and digital nonlinearity compensation techniques are considered together to achieve reduced power consumption in the receiver.

Abstract: A radio frequency (RF) receiver includes an analog receiver chain followed by digital circuitry for reducing nonlinear distortion components within an output signal of the analog receiver chain. In at least one embodiment, the digital circuitry includes a digital equalizer that is configured with a sparse set of Volterra series coefficients. In this manner, a desired level of linearity performance may be achieved in the receiver with relatively low power consumption.

Abstract: Receiver design techniques are provided that are capable of producing relatively efficient, linear radio frequency (RF) receivers. During a design process, components of an analog receiver chain and digital nonlinearity compensation techniques are considered together to achieve reduced power consumption in the receiver.

Abstract: A radio frequency (RF) receiver includes an analog receiver chain followed by digital circuitry for reducing nonlinear distortion components within an output signal of the analog receiver chain. In at least one embodiment, the digital circuitry includes a digital equalizer that is configured with a sparse set of Volterra series coefficients. In this manner, a desired level of linearity performance may be achieved in the receiver with relatively low power consumption.

Abstract: Receiver design techniques are provided that are capable of producing relatively efficient, linear radio frequency (RF) receivers. During a design process, components of an analog receiver chain and digital nonlinearity compensation techniques are considered together to achieve reduced power consumption in the receiver.

Abstract: A method of measuring variability of integrated circuit components is provided. A specified parameter of at least one first array configuration comprising a plurality of the integrated circuit components without specified internal connections between the integrated circuit components is measured. The specified parameter of at least one second array configuration comprising a plurality of the integrated circuit components nominally identical to those of the first array configuration with specified internal connections between the integrated circuit components is also measured. A variation coefficient is determined for the integrated circuit components based on the measured specified parameter of the at least one first array configuration and the at least one second array configuration.