Abstract: The present invention is a method and apparatus for encoding and decoding a turbo code. In the encoder, an interleaver interleaves and delays a block of input bits to generate interleaved input bits and delayed input bits. A first encoder generates a first, second, and third encoded bits. A second encoder generates a fourth encoded bit. A symbol generator generates a plurality of symbols which correspond to the input bits. In a decoder, a sync search engine detects a synchronizing pattern and extracts symbols from the encoded bits. An input buffer is coupled to the sync search engine to store the extracted symbols. A first soft-in-soft-out (SISO1) is coupled to the input buffer to generate a first soft decision set based on the extracted symbols. An interleaver is coupled to the SISO1 to interleave the first soft decision set. A second soft-in-soft-out (SISO2) is coupled to the input buffer and the interleaver to generate a second soft decision set.

Abstract: The present invention is a method and apparatus for encoding and decoding a turbo code. In the encoder, an interleaver interleaves and delays a block of input bits to generate interleaved input bits and delayed input bits. A first encoder generates a first, second, and third encoded bits. A second encoder generates a fourth encoded bit. A symbol generator generates a plurality of symbols which correspond to the input bits. In a decoder, a sync search engine detects a synchronizing pattern and extracts symbols from the encoded bits. An input buffer is coupled to the sync search engine to store the extracted symbols. A first soft-in-soft-out (SISO1) is coupled to the input buffer to generate a first soft decision set based on the extracted symbols. An interleaver is coupled to the SISO1 to interleave the first soft decision set. A second soft-in-soft-out (SISO2) is coupled to the input buffer and the interleaver to generate a second soft decision set.

Abstract: The present invention is a method and apparatus for temporally separating an input data stream in a transmit circuit and for re-organizing a temporally separated input data stream in a receive circuit. In the transmit circuit, a first interleaver interleaves the serial input data stream. A first converter is coupled to the first interleaver to convert the interleaved serial input data stream into groups of N-bit words where N is a positive integer. A second interleaver is coupled to the first converter to interleave the groups of N-bit words. A second converter is coupled to the second interleaver to convert the interleaved groups of N-bit words into a serial output data stream. The output data stream corresponds to the temporally separated input data stream. In the receive circuit, a first converter converts the serial input data stream into groups of N-bit words where N is a positive integer. A first de-interleaver is coupled to the first converter to de-interleave the groups of N-bit words.

Abstract: Methods and apparatus for variable-rate down-sampling filters for discrete-time sampled systems using a fixed sampling rate are disclosed. The Variable Rate Down-Sampling Filter allows a continuous range of sample rates to be derived from input samples at a fixed rate. The output rate does not have to be related to the fixed input rate in any integral or rational way, and in fact, the output rate can vary in time such as will occur when tracking a signal received from a station using a different timebase. A fixed sampling rate at the A/D Converter greatly simplifies the design of the analog front end. A single anti-aliasing filter can be designed and precisely matched to the fixed sampling rate. Used with a frequency-modulated numerically controlled oscillator (NCO), the Down-Sampling Filter keeps the entire frequency-synthesis and time-tracking loop in the digital domain. The need for an analog time-tracking loop to adjust the sampling instant at the A/D converter is eliminated.