Abstract: Artificial polynucleotides may have different characteristics than natural polynucleotides so conventional base-calling algorithms may make incorrect base calls. However, because artificial polynucleotides are typically designed to have certain characteristics, the known characteristics of the artificial polynucleotide can be used to modify the base-calling algorithm. This disclosure describes polynucleotide sequencers adapted to sequence artificial polynucleotides by modifying a base-calling algorithm of the polynucleotide sequencer according to known characteristics of the artificial polynucleotides. The base-calling algorithm analyzes raw data generated by a polynucleotide sequencer and identifies which nucleotide base occupies a given position on a polynucleotide strand.

Abstract: This disclosure describes techniques to improve the sequencing of polynucleotides by decreasing the likelihood of errors occurring during a sequencing calibration process. In implementations, regions of polynucleotides that are used for the calibration process can be modified to reduce a number of polynucleotides that have a same nucleotide at one or more positions of the calibration regions. In some cases, the calibration regions can be modified by adding a sequence to the polynucleotides that replaces the original calibration regions. Also, the calibration regions can be modified by rearranging the nucleotides at the different positions of the calibration regions. Additionally, the calibration regions can be modified by adding sequences of varying length to the polynucleotides being sequenced to produce polynucleotides having varying length with different calibration regions.

Abstract: This disclosure describes techniques to improve the accuracy of random access of data stored in polynucleotide sequence data storage systems. Primers used in polynucleotide sequence replication and amplification can be scored against a number of criteria that indicate the fitness of sequences of nucleotides to function as primers. Primers having scores that indicate a particular fitness to function as primers can be added to a specific group of primers. The primers from the group of primers can be used in amplification and replication of polynucleotide sequences that encode digital data. Additionally, an amount of overlap between primer targets and payloads encoding digital data can be determined. Minimizing the amount of overlap between primer targets and payloads can improve the efficiency of polynucleotide replication and amplification. The bits of the digital data can be randomized to minimize the amount of overlap between payloads encoding the digital data and primer targets.

Abstract: This disclosure describes techniques to improve the accuracy of random access of data stored in polynucleotide sequence data storage systems. Primers used in polynucleotide sequence replication and amplification can be scored against a number of criteria that indicate the fitness of sequences of nucleotides to function as primers. Primers having scores that indicate a particular fitness to function as primers can be added to a specific group of primers. The primers from the group of primers can be used in amplification and replication of polynucleotide sequences that encode digital data. Additionally, an amount of overlap between primer targets and payloads encoding digital data can be determined. Minimizing the amount of overlap between primer targets and payloads can improve the efficiency of polynucleotide replication and amplification. The bits of the digital data can be randomized to minimize the amount of overlap between payloads encoding the digital data and primer targets.

Abstract: Variable width error correction is described. A memory controller can determine, from a memory address, what type of error correction is to be applied for the address region of that memory address and can generate commands for the memory device. An amount of error correction metadata associated with that address region may vary depending on the spatial location of the address region. In some cases, two translations may be performed: one by a processor using information set up by an operating system and another by the memory controller (or the memory device). In other cases, a single translation may be performed, for example by a processor using information set up by the operating system, which can determine the variable error correction during translation of a virtual address region to a real physical address region.

Abstract: A codeword is generated from a message. One or more anchor values are appended to the codeword at predetermined anchor positions. Before the codeword is stored in a memory block, the locations and values of stuck cells in the memory block are determined. Based on the values and positions of the stuck cells, the values of the codeword are remapped so that values of the codeword that are the same as the values of the stuck cells are placed at the positions of the stuck cells. The remapped codeword is stored in the memory block. When the message is later read, the original codeword can be recovered from the remapped codeword based on the locations of the anchor values in the remapped codeword.

Abstract: A database implemented by storing information encoded in DNA molecules provides high information density but the information is more difficult to access than in conventional electronic storage media. A relational database is a way of organizing information by using multiple related tables. Relational algebra operations are performed on relational databases to locate and manipulate information. This disclosure provides techniques for implementing relational algebra operations on a relational database that uses DNA molecules to store information. The techniques of this disclosure relate to the structure of DNA molecules used to store the information and to correlations between relational algebra operations and manipulations of DNA molecules.

Abstract: A memory region can durably self-identify as being faulty when read. Information that would have been assigned to the faulty memory region can be assigned to another of that sized region in memory using a replacement encoding technique. For phase change memory, at least two fault states can be provided for durably self-identifying a faulty memory region; one state at a highest resistance range and the other state at a lowest resistance range. Replacement cells can be used to shift or assign data when a self-identifying memory fault is present. A memory controller and memory module, alone or in combination may manage replacement cell use and facilitate driving a newly discovered faulty cell to a fault state if the faulty cell is not already at the fault state.

Abstract: This document relates to trend response management. One example can detect a trending topic and identify content associated with the trending topic. The example can take an action relating to the content that decreases a trend-induced processing spike and/or enhances a user search experience associated with the trending topic.

Abstract: A memory chip for dynamic approximate storage includes an array of memory cells associated with at least two regions. The chip further includes at least one threshold register for storing values for thresholds for memory cells corresponding to each of the at least two regions; and control logic to programmatically adjust the values for the thresholds for the memory cells. A method of controlling a storage device for dynamic approximate storage includes modifying at least one value stored in a threshold register and associated with at least one cell in a region of a memory comprising at least two regions to apply a biasing for the at least one cell, wherein the biasing adjusts ranges for values in a cell.

Abstract: A method of encoding data on single level or variable multi-level cell storage includes receiving a block of encoded data from an approximation-aware application and at least an importance attribute associated with the block of encoded data; and assigning the block of encoded data to a memory address or a particular region of a memory having at least three precision levels, based at least according to the importance attribute. The importance attribute indicates a relative sensitivity of bits of the block to errors in an output quality from decoding the encoded data. An approximation-aware application can be an image encoding application having a modified entropy encoding step that enables identification and splitting of bits into groupings according to sensitivity to errors.

Abstract: This disclosure provides techniques for adding error correction to information in a data store that encodes information as a sequence of bases in polynucleotides. Errors may be introduced through creation of the database (e.g., oligonucleotide synthesis) and/or reading information from the database (e.g., polynucleotide sequencing). Additional polynucleotides added to the database can provide error correction through redundancy. The sequence of polynucleotides that provide error correction may be designed by performing an invertible summary operation on information to be stored in the database. One example of an invertible summary operation is the exclusive or operation (XOR). This disclosure also provides techniques for storing metadata related to organization of a database and structure of information on polynucleotides within the database. Metadata may be encoded in polynucleotides and added to the data store.

Abstract: A hardware acceleration component is provided for implementing a convolutional neural network. The hardware acceleration component includes an array of N rows and M columns of functional units, an array of N input data buffers configured to store input data, and an array of M weights data buffers configured to store weights data. Each of the N input data buffers is coupled to a corresponding one of the N rows of functional units. Each of the M weights data buffers is coupled to a corresponding one of the M columns of functional units. Each functional unit in a row is configured to receive a same set of input data. Each functional unit in a column is configured to receive a same set of weights data from the weights data buffer coupled to the row. Each of the functional units is configured to perform a convolution of the received input data and the received weights data, and the M columns of functional units are configured to provide M planes of output data.

Abstract: A method is provided for implementing a deep neural network on a server component that includes a host component including a CPU and a hardware acceleration component coupled to the host component. The deep neural network includes a plurality of layers. The method includes partitioning the deep neural network into a first segment and a second segment, the first segment including a first subset of the plurality of layers, the second segment including a second subset of the plurality of layers, configuring the host component to implement the first segment, and configuring the hardware acceleration component to implement the second segment.

Abstract: A database implemented by storing information encoded in DNA molecules provides high information density but the information is more difficult to access than in conventional electronic storage media. A relational database is a way of organizing information by using multiple related tables. Relational algebra operations are performed on relational databases to locate and manipulate information. This disclosure provides techniques for implementing relational algebra operations on a relational database that uses DNA molecules to store information. The techniques of this disclosure relate to the structure of DNA molecules used to store the information and to correlations between relational algebra operations and manipulations of DNA molecules.

Abstract: A multi-core processor with a shared physical memory is described. In an embodiment a sending core sends a memory write request to a destination core so that the request may be acted upon by the destination core as if it originated from the destination core. In an example, a data structure is configured in the shared physical memory and mapped to be accessible to the sending and destination cores. In an example, the shared data structure is used as a message channel between the sending and destination cores to carry data using the memory write request. In an embodiment a notification mechanism is enabled using the shared physical memory in order to notify the destination core of events by updating a notification data structure. In an example, the notification mechanism triggers a notification process at the destination core to inform a receiving process of a notification.

Abstract: A memory controller can include an error correction module for extended lifetime memory that tracks at least one sized block of non-fault consecutive bits within the disabled page as spare blocks and reuses the spare blocks from the disabled pages as an error correction resource for active blocks. The active blocks can store data, data and metadata, or metadata only (e.g., error correction metadata). A method for extended lifetime memory can include, for an active block of metadata containing at least one fault, using at least one spare block to correct the data of the active block. For an active block of data containing at least one fault, the data can be initially corrected via XOR correction with a first spare block and then ultimately corrected via XOR correction with a second spare block.

Abstract: A memory chip for dynamic approximate storage includes an array of memory cells associated with at least two regions. The chip further includes at least one threshold register for storing values for thresholds for memory cells corresponding to each of the at least two regions; and control logic to programmatically adjust the values for the thresholds for the memory cells. A method of controlling a storage device for dynamic approximate storage includes modifying at least one value stored in a threshold register and associated with at least one cell in a region of a memory comprising at least two regions to apply a biasing for the at least one cell, wherein the biasing adjusts ranges for values in a cell.

Abstract: A method of encoding data on single level or variable multi-level cell storage includes receiving a block of encoded data from an approximation-aware application and at least an importance attribute associated with the block of encoded data; and assigning the block of encoded data to a memory address or a particular region of a memory having at least three precision levels, based at least according to the importance attribute. The importance attribute indicates a relative sensitivity of bits of the block to errors in an output quality from decoding the encoded data. An approximation-aware application can be an image encoding application having a modified entropy encoding step that enables identification and splitting of bits into groupings according to sensitivity to errors.

Abstract: The present technology relaxes the precision (or full data-correctness-guarantees) requirements in memory operations, such as writing or reading, of MLC memories so that an application may write and read a digital data value as an approximate value. Types of MLCs include Flash MLC and MLC Phase Change Memory (PCM) as well as other resistive technologies. Many software applications may not need the accuracy or precision typically used to store and read data values. For example, an application may render an image on a relatively low resolution display and may not need an accurate data value for each pixel. By relaxing the precision or correctness requirements is a memory operation, MLC memories may have increased performance, lifetime, density, and/or energy efficiency.