Patents by Inventor Karine Landry

Karine Landry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
    Publication number: 20140225182
    Abstract: A substrate comprises a base wafer, an insulating layer over the base wafer, and a top semiconductor layer over the insulating layer on a side thereof opposite the base wafer. The insulating layer comprises a charge-confining layer confined on one or both sides with diffusion barrier layers, wherein the charge-confining layer has a density of charges in absolute value higher than 1010 charges/cm2. Alternatively, the insulating layer comprises charge-trapping islands embedded therein, wherein the charge-trapping islands have a total density of charges in absolute value higher than 1010 charges/cm2.
    Type: Application
    Filed: April 15, 2014
    Publication date: August 14, 2014
    Applicant: Soitec
    Inventors: Mohamad A. Shaheen, Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Carlos Mazure
  • Substrate having a charged zone in an insulating buried layer
    Patent number: 8735946
    Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: May 27, 2014
    Assignee: Soitec
    Inventors: Mohamad A Shaheen, Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Carlos Mazure
  • SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
    Publication number: 20140015023
    Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
    Type: Application
    Filed: September 16, 2013
    Publication date: January 16, 2014
    Applicant: Soitec
    Inventors: Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Carlos Mazure, Mohamad A. Shaheen
  • METHOD FOR MAKING A STRUCTURE COMPRISING A STEP FOR IMPLANTING IONS IN ORDER TO STABILIZE THE ADHESIVE BONDING INTERFACE
    Publication number: 20110165758
    Abstract: The invention relates to a method for making a structure for use ion applications in the fields of electronics, optics or optoelectronics. The structure includes a thin layer of semiconducting material on a supporting substrate. The method includes bonding the thin layer onto the supporting substrate by molecular adhesion at a bonding interface to obtain a structure; implanting ions at the bonding interface to transfer atoms from the thin layer to transfer atoms between the thin layer and the supporting substrate or vice versa; and heat-treating the structure in order to stabilize the bonding interface.
    Type: Application
    Filed: July 3, 2009
    Publication date: July 7, 2011
    Inventors: Konstantin Bourdelle, Didier Landru, Karine Landry
  • SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
    Publication number: 20110012200
    Abstract: Embodiments of the invention relate to substrates comprising a base wafer, an insulating layer and a top semiconductor layer, wherein the insulating layer comprises at least a zone wherein a density of charges is in absolute value higher than 1010 charges/cm2. The invention also relates to processes for making such substrates.
    Type: Application
    Filed: March 13, 2008
    Publication date: January 20, 2011
    Applicant: S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventors: Frederic Allibert, Gweltaz Gaudin, Fabrice Lallement, Didier Landru, Karine Landry, Mohamad Shaheen, Carlos Mazure
  • Supporting and lifting device for substrates in vacuum
    Publication number: 20060016398
    Abstract: A pin assembly for lifting and supporting substrates according to the invention comprises a roller glide for a lift pin with rollers reducing the friction of the vertical pin movement, a ball bearing sole plate with elastic suspension for re-centering the sole plate after one coating cycle and a ball-bearing pin head that lowers the friction between the pin and the substrate and minimizes lateral forces that the substrate can apply on the pin.
    Type: Application
    Filed: May 25, 2005
    Publication date: January 26, 2006
    Inventors: Laurent Dubost, Sylvain Hernandez, Hans Jaeger, Karine Landry, Bertrand Vinel, Eugene Zapodeanu, Jacques Schmitt, Redouane EL Bouchikhy