Patents by Inventor Karl S. Nakamura

Karl S. Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6341142
    Abstract: A serial data transceiver is presented which includes elements which facilitate testing using only the serial data transfer terminals of the transceiver. The serial data transceiver includes a transmitter and a receiver. The transmitter receives parallel data, converts the parallel data to a serial data stream, and transmits the serial data stream. The receiver receives a serial data stream, converts the serial data stream to parallel data, and provides the parallel data. During testing, parallel data produced by the receiver is routed to the transmitter input. In one embodiment, the transmitter includes a first router for routing parallel input data to the transmitter, and the receiver includes a second router for routing parallel output data produced by the receiver. The first router is coupled to the second router, both routers receive a test signal.
    Type: Grant
    Filed: December 16, 1997
    Date of Patent: January 22, 2002
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins
  • Patent number: 6331999
    Abstract: A serial data transceiver architecture and test method are presented for measuring the amount of jitter within a serial data stream. A transmitter of the transceiver receives parallel input data at a transmit data input port, converts the parallel input data to a serial data stream having data windows separated by data transition periods, and produces the serial data stream at a transmitter output port. A receiver of the transceiver receives a serial data stream at a receiver input port, converts the serial data stream to parallel output data, and provides the parallel output data at a receive data output port.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: December 18, 2001
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins
  • Patent number: 6330591
    Abstract: One or more improved transmit units tightly integrated into an enhanced cluster cache with controller. Coherent memory transactions in a loosely coupled computer network are supported by sending all cache updates to all computers in the loosely coupled computer network through high speed, low latency and high bandwidth serial lines linking all computers to all other computers. The cluster cache controller may include a local cache controller and/or as a local bus controller. The local bus controller is operable to coupled the cluster cache to an I/O subsystem. A local cache memory preferably caches data and/or instructions, or locations thereof for the entire computer, making the local computer cache available to the entire computer cluster through the transmit unit. Each transfer unit is a full-duplex transceiver that includes transmitter and receiver functions. Each transfer unit can send and receive data simultaneously since operation of their transmitter and receiver functions are independent.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: December 11, 2001
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins
  • Publication number: 20010043648
    Abstract: A serial data transceiver is presented which includes elements which facilitate testing using only the serial data transfer terminals of the transceiver. The serial data transceiver includes a transmitter and a receiver. The transmitter receives parallel data, converts the parallel data to a serial data stream, and transmits the serial data stream. The receiver receives a serial data stream, converts the serial data stream to parallel data, and provides the parallel data. During testing, parallel data produced by the receiver is routed to the transmitter input. In one embodiment, the transmitter includes a first router for routing parallel input data to the transmitter, and the receiver includes a second router for routing parallel output data produced by the receiver. The first router is coupled to the second router, both routers receive a test signal.
    Type: Application
    Filed: December 16, 1997
    Publication date: November 22, 2001
    Inventors: FRANCOIS DUCAROIR, KARL S. NAKAMURA, MICHAEL O. JENKINS
  • Patent number: 6208621
    Abstract: An apparatus and method are presented for testing the ability of a pair of serial data transceivers to transmit serial data at one frequency and to receive serial data at another frequency. A serial communication device of the present invention includes a first and second serial data transceivers and a multiplexer formed upon a monolithic semiconductor substrate. Each serial data transceiver includes a receiver and a transmitter which transmits serial data in response to a clock signal. The second serial data transceiver is coupled to receive a reference clock signal. The multiplexer facilitates testing, and is coupled to the first serial data transceiver. The multiplexer receives the reference clock signal, a test clock signal, and a test signal, and provides either the reference clock signal or the test clock signal to the first transceiver dependent upon the test signal. The reference and test clock signals have different frequencies.
    Type: Grant
    Filed: December 16, 1997
    Date of Patent: March 27, 2001
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins
  • Patent number: 6167077
    Abstract: A transceiver pair is connected by a plurality of high speed serial lines that are tightly integrated into an enhanced communications system. The communications system includes a base transceiver, a remote transceiver, and a plurality of high speed serial lines operably coupled between them. The base transceiver includes a first base input port for receiving parallel data, a plurality of first base output ports for outputting serialized data and a plurality of base serializers operably coupled between the first base input port and the plurality of first base output ports. The plurality of base serializers convert the parallel data into the serialized data. A base input demultiplexer is operably coupled between the first base input port and the plurality of base serializers.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: December 26, 2000
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins
  • Patent number: 6085257
    Abstract: An improved transceiver that is tightly integrated into an enhanced receiving chip for a computer monitor. The transceiver includes a receiver having a first input port for receiving serialized data, a first output port for transmitting deserialized data to the transceiver, and a second input port adapted for receiving feedback data forwarded from a sensor to an audio and video control unit. The serialized data comprises video, audio and control data. The transceiver further comprises a receiver operably coupled between the first input port and the first output port, as well as a timing generator coupled to recover a clock signal from the serialized data and to synchronize the deserialized data from the recovered clock. The transceiver also includes a transmitter with a third input port for receiving parallel data and a second output port for transmitting a serial data stream. The parallel data are received by the third input port concurrently with the serialized data being received by the first input port.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: July 4, 2000
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins
  • Patent number: 6061747
    Abstract: An improved transceiver pair that are tightly integrated into a computer system. The transceiver pair include a base transceiver and a remote transceiver, with a high speed serial connection between them. The base transceiver has a base transmitter with a parallel input port for accepting parallel, encoded data and a serial output port for transmitting a serial, encoded data stream. The remote transceiver has a receiver with a serial input port for receiving the serial, encoded data stream and an audio/video output port for passing deserialized data to an audio and video control unit after decoding. The high speed serial connection links the base serial output port to the remote serial input port. The remote receiver further includes a feedback input port adapted for receiving feedback data forwarded from a sensor. The sensor may respond to palpable, optical or sonic input or to physical contact.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: May 9, 2000
    Assignee: LSI Logic Corporation
    Inventors: Francois Ducaroir, Karl S. Nakamura, Michael O. Jenkins
  • Patent number: 4894792
    Abstract: A portable computer is constructed to utilize bottom add-on expansion modules, battery tray compartment plug-in modules and mass storage plug-in drawer modules. The modules permit the operating capabilities of the portable computer to be readily altered as desired or as needed at a given location or for a particular job function and do not require redesign or alteration of the internal components of the portable computer as modules are added or changed. Each module construction includes direct plug-in connectors which permit the add-on module to be directly connected to the computer bus without any cabling between the computer and the added module. The construction of the add-on modules permits the computer to be operated as a stand alone computer without any add-on modules and permits the computer to be operated as a portable computer powered by a battery.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: January 16, 1990
    Assignee: Tandy Corporation
    Inventors: Dennis R. Mitchell, James R. Molenda, Karl S. Nakamura
  • Patent number: 4571456
    Abstract: A portable computer is contained within an outer metal case which physically encapsulates and protects the working components of the computer in the closed, portable configuration. The metal case includes a base which serves as a heat sink for transferring waste heat from heat producing electrical components to the surroundings in the open, operating configuration of the computer. The heat producing components are mounted and located in the base to maximize the transfer of heat to the base. A display housing is pivotally mounted on the base by hinge assemblies for swinging movement between a closed and latched position on the base and an upward and rearwardly inclined angle for viewing by an operator positioned in front of the computer. Stop pins coact with the hinge assemblies for holding the display housing at the desired angle of view, and torsion springs are associated with the hinge assemblies for preventing inadvertent slamming of the display housing against the base during closing.
    Type: Grant
    Filed: October 18, 1982
    Date of Patent: February 18, 1986
    Assignee: Grid Systems Corporation
    Inventors: David C. Paulsen, Glenn T. Edens, Karl S. Nakamura, David M. Gallatin, Stephen R. Hobson, William G. Moggridge