Patents by Inventor Karl Sweetland

Karl Sweetland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Analog switch with high bipolar blocking voltage in low voltage CMOS process
    Patent number: 9171832
    Abstract: The disclosed technology relates to an apparatus for protection against transient electrical events. In one aspect, the apparatus includes an analog switch with high bipolar blocking voltage comprising a first p-type well region, a second p-type well region, a first n-type well region disposed between the first and second p-type well regions, and a deep n-type well region surrounding the first p-type well region, the second p-type well region, and the first n-type well region. The apparatus additionally includes a first native n-type region disposed between the first p-type well region the n-type well region and a second native n-type region disposed between the second p-type well region and n-type well region. The apparatus is configured such that the first p-type well region serves as an emitter/collector of a bidirectional PNP bipolar transistor.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: October 27, 2015
    Assignee: ANALOG DEVICES, INC.
    Inventors: Javier Alejandro Salcedo, Karl Sweetland
  • ANALOG SWITCH WITH HIGH BIPOLAR BLOCKING VOLTAGE IN LOW VOLTAGE CMOS PROCESS
    Publication number: 20140346563
    Abstract: The disclosed technology relates to an apparatus for protection against transient electrical events. In one aspect, the apparatus includes an analog switch with high bipolar blocking voltage comprising a first p-type well region, a second p-type well region, a first n-type well region disposed between the first and second p-type well regions, and a deep n-type well region surrounding the first p-type well region, the second p-type well region, and the first n-type well region. The apparatus additionally includes a first native n-type region disposed between the first p-type well region the n-type well region and a second native n-type region disposed between the second p-type well region and n-type well region. The apparatus is configured such that the first p-type well region serves as an emitter/collector of a bidirectional PNP bipolar transistor.
    Type: Application
    Filed: May 24, 2013
    Publication date: November 27, 2014
    Inventors: Javier Alejandro Salcedo, Karl Sweetland
  • Apparatus and method for transient electrical overstress protection
    Patent number: 8633509
    Abstract: An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: January 21, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Javier Alejandro Salcedo, Karl Sweetland
  • APPARATUS AND METHOD FOR TRANSIENT ELECTRICAL OVERSTRESS PROTECTION
    Publication number: 20130270605
    Abstract: An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation.
    Type: Application
    Filed: June 7, 2013
    Publication date: October 17, 2013
    Inventors: Javier Alejandro Salcedo, Karl Sweetland
  • Apparatus and method for transient electrical overstress protection
    Patent number: 8466489
    Abstract: An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: June 18, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Javier A. Salcedo, Karl Sweetland
  • APPARATUS AND METHOD FOR TRANSIENT ELECTRICAL OVERSTRESS PROTECTION
    Publication number: 20120199874
    Abstract: An apparatus and method for high voltage transient electrical overstress protection are disclosed. In one embodiment, the apparatus includes an internal circuit electrically connected between a first node and a second node; and a protection circuit electrically connected between the first node and the second node. The protection circuit is configured to protect the internal circuit from transient electrical overstress events while maintaining a relatively high holding voltage upon activation.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 9, 2012
    Applicant: Analog Devices, Inc.
    Inventors: Javier A. Salcedo, Karl Sweetland