Abstract: Provided herein are systems, compositions and methods for tracking, sorting and/or identifying sample polynucleotides using nucleic acid barcodes. The barcodes provided herein are oligonucleotides that are designed to be uniquely identifiable. The nucleic acid barcodes have properties that permit them to be sequenced with high accuracy and/or reduced error rates. In some embodiments, the nucleic acid barcodes are designed to have certain nucleotide sequences that make up overlapping dibase color positions (also called color positions). The order of the overlapping dibase color positions can be determined using fluorophore-encoded dibase probes in a fluorophore color calling scheme to give high fidelity reads.

Abstract: A system and method for providing a targeted promotional message to a self-selected group of members. A member database includes a plurality of member profiles. Each member profile includes at least a plurality of a region designation, a promotional message preference selection, and a message quantity selection. The system further includes a messaging engine configure to transmit one or more messages to at least one member in the member database based on the member profile for that member. In a preferred embodiment, an auction engine is used to select one or more promoters from a larger group of promoters who desire to send promotional messages to a self-selected group of members.

Abstract: A method for providing superior fill of features in semiconductor processing utilizes a laser ablation system. Deposition is obtained by ablating target materials which are driven off perpendicular to the target in the direction of the deposition surface. The method provides complete fill of high aspect ratio features with nominal heating of the substrate. Alloys and graded layers, as well as pure metals, can be deposited in low temperature patterned layers. In addition, the system has been used to achieve superior trench filling for isolation structures.

Abstract: A method of forming semiconductor device contacts includes the steps of: providing a semiconductor substrate having at least two features thereon whereat it is desired to make electrical connections; forming a layer of etch stop material having a first etch characteristic over each of the features; forming a layer of dielectric material having a second etch characteristic over each of the features; simultaneously etching at least two vias through the layer of dielectric material using an etchant selective to the layer of dielectric material so as to substantially stop on the layer of etch stop material, the at least two vias including a via over each of the features; and extending the vias through the layer of etch stop material so as to expose the features for subsequent electrical connections.

Abstract: A method is disclosed for producing coplanar metal/insulator films on a substrate according to a chem-mech polishing technique. In one example, a substrate having a patterned insulating layer of dielectric material thereon, is coated with a layer of metal. The substrate is then placed in a parallel polisher and the metal is removed elsewhere except in the holes where it is left intact. This is made possible through the use of an improved selective slurry which removes the metal much faster than the dielectric material. The insulating layer may then be used as an automatic etch stop barrier.In a second example a substrate having a patterned metallic layer is coated with an insulating layer and then subjected to chem-mech polishing. The structure is coplanarized by the chem-mech removal of the insulating material from the high points of the structure at a faster rate than from the lower points. Optional etch stop layers also may be used.

Abstract: Patterned conductive lines are formed simultaneously with stud via connections through an insulation layer to previously formed underlying patterned conductive lines in multilevel VLSI chip technology. A first planarized layer of insulation is deposited over a first level of patterned conductive material to which contacts are to be selectively established. The first layer then is covered by an etch stop material. Contact holes are defined in the etch stop material at locations where stud connectors are required. The first layer of insulation is not etched at this time.Next, a second planarized layer of insulation, is deposited over the etch stop material. The second layer insulation, in turn, is etched by photolithography down to the etch stop material to define desired wiring channels, some of which will be in alignment with the previously formed contact holes in the etch stop material.