Patents by Inventor Katsuhiko Shibata
Katsuhiko Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8949115Abstract: In an audio output terminal device, a buffer control unit adjusts the buffer size of a jitter buffer in accordance with the setting of a sound output mode instructed in an instruction receiving unit. If the instruction receiving unit acknowledges an instruction for setting an audio output mode that requires low delay in outputting sound, the buffer control unit reduces the buffer size of the jitter buffer. Further, the buffer control unit controls, in accordance with the instructed setting of the sound output mode, timing for allowing a media buffer to transmit one or more voice packets to the jitter buffer.Type: GrantFiled: September 16, 2010Date of Patent: February 3, 2015Assignees: Sony Corporation, Sony Computer Entertainment Inc.Inventors: Kiyoto Shibuya, Jin Nakamura, Katsuhiko Shibata, Kazuhiro Yanase, Akitoshi Yamaguchi, Akiyoshi Morita, Kouichi Kazama
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Patent number: 8744358Abstract: The communication module 13 detects, in a predetermined operation mode in which the main processor 11 stops operation, another portable communication terminal existing in a range in which a communication connection is possible, determines the detected portable communication terminal as a target terminal from which target data is obtained, obtains the target data transmitted from the determined target terminal, and stores identification information for identifying the target terminal into the internal memory 13b. The main processor 11 executes processing using the obtained target data. The communication module 13 determines, while the main processor remains stopped, whether or not the identification information of the detected portable communication terminal is already stored in the internal memory 13b, and, under a condition that the identification information is determined to be stored, does not determine the detected portable communication terminal as the target terminal.Type: GrantFiled: June 28, 2012Date of Patent: June 3, 2014Assignees: Sony Corporation, Sony Computer Entertainment Inc.Inventors: Katsuhiko Shibata, Takehiko Tahira
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Publication number: 20130012129Abstract: The communication module 13 detects, in a predetermined operation mode in which the main processor 11 stops operation, another portable communication terminal existing in a range in which a communication connection is possible, determines the detected portable communication terminal as a target terminal from which target data is obtained, obtains the target data transmitted from the determined target terminal, and stores identification information for identifying the target terminal into the internal memory 13b. The main processor 11 executes processing using the obtained target data. The communication module 13 determines, while the main processor remains stopped, whether or not the identification information of the detected portable communication terminal is already stored in the internal memory 13b, and, under a condition that the identification information is determined to be stored, does not determine the detected portable communication terminal as the target terminal.Type: ApplicationFiled: June 28, 2012Publication date: January 10, 2013Applicant: SONY COMPUTER ENTERTAINMENT INC.Inventors: Katsuhiko Shibata, Takehiko Tahira
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Publication number: 20120245929Abstract: In an audio output terminal device, a buffer control unit adjusts the buffer size of a jitter buffer in accordance with the setting of a sound output mode instructed in an instruction receiving unit. If the instruction receiving unit acknowledges an instruction for setting an audio output mode that requires low delay in outputting sound, the buffer control unit reduces the buffer size of the jitter buffer. Further, the buffer control unit controls, in accordance with the instructed setting of the sound output mode, timing for allowing a media buffer to transmit one or more voice packets to the jitter buffer.Type: ApplicationFiled: September 16, 2010Publication date: September 27, 2012Applicant: SONY COMPUTER ENTERTAINMENT INC.Inventors: Kiyoto Shibuya, Jin Nakamura, Katsuhiko Shibata, Kazuhiro Yanase, Akitoshi Yamaguchi, Akiyoshi Morita, Kouichi Kazama
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Patent number: 6456344Abstract: The present invention provides a liquid crystal display device which is capable of suppressing wavy brightness irregularity which occurs in a display screen edge portion in the vicinity of drivers or tape carrier packages (TCPs) on which the drivers are mounted, owing to the mounting of the drivers or the TCPs. In one example of the present invention, a wavy pattern for preventing brightness irregularity is partially formed along one edge of a light guide plate in the vicinity of drivers mounted on a substrate which constitutes a liquid crystal display panel. Similar effects and advantages are obtained even if this wavy pattern for preventing brightness irregularity is formed on a reflecting sheet arranged on the side of the liquid guide plate opposite to the liquid crystal display panel, or on a diffusion sheet inserted between the light guide plate and the liquid crystal display panel.Type: GrantFiled: November 12, 1999Date of Patent: September 24, 2002Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Atsushi Nemoto, Masumi Sasuga, Katsuhiko Shibata
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Patent number: 5838400Abstract: A liquid crystal device in which a peripheral circuit board positioned in the outer periphery of a seal port is recessed to avoid the projection of the seal port and in which a fluorescent tube has its two lamp cables arranged around the four sides of a crystal display element, so that the substrate at the seal port side and the lamp cable of a side light type back light can be packaged in compact.Type: GrantFiled: January 14, 1997Date of Patent: November 17, 1998Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Shiro Ueda, Shunichi Kumaoka, Masumi Sasuga, Katsuhiko Shibata, Yoichi Igarashi, Naoto Kobayashi
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Patent number: 5838412Abstract: To make it possible to prevent disconnection of the wiring on a driving multilayer flexible circuit board when folding the board, to reliably fold the circuit board, to improve the assemblability and the reliability or a backlight member, and to improve the noise resistance in a clip-chip-type liquid crystal display device using the circuit board, one end of a flexible substrate FPC2 is connected to an end of one transparent glass substrate SUB1 constituting a liquid crystal display element, the intermediate portion of the flexible substrate FPC2 is folded nearby the outside of an end side of the substrate SUB1, the other end of the substrate FPC2 is arranged at the lower side of an end of the substrate SUB1, and an end of a film BFI of the flexible substrate FPC2 is formed into a waved pattern along the folding line.Type: GrantFiled: November 4, 1996Date of Patent: November 17, 1998Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Shiro Ueda, Katsuhiko Shibata, Masumi Sasuga, Norihisa Fukayama, Naoto Kobayashi
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Patent number: 5739887Abstract: A liquid crystal display device. The liquid crystal display device has a peripheral circuit including a liquid crystal display having drive ICs COG-packaged on a transparent substrate, and a foldable multi-layered flexible substrate having two or more conductor layers, so that the compact packaging can be realized to reduce EMI noise and the number of parts. The liquid crystal display device may also include a display controller having two or more display control integrated circuit elements packaged therein, and drive ICs mounted by a chip-on-glass packaging on two sides of a liquid crystal display panel, usually, on the longer sides, so that the display controller excellent in the temperature resistance and advantageous in compact and a video signal line driving circuit board are uniformly arranged at the upper and lower sides of a screen. As a result, the vertical positioning of the screen can be made proper to take an advantage in the compact packaging.Type: GrantFiled: October 13, 1995Date of Patent: April 14, 1998Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Shiro Ueda, Shunichi Kumaoka, Masumi Sasuga, Katsuhiko Shibata, Yoichi Igarashi, Naoto Kobayashi
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Patent number: 5724108Abstract: Between the liquid crystal display panel and the backlight is arranged a prism sheet whose upper surface forms a prism surface and lower surface forms a smooth surface. The cross section of the prism surface is scalene triangles. Each of the scalene triangles is so shaped that if its base angles are taken to be .theta.1 and .theta.2, the relationship of 25 degrees.ltoreq..theta.1<45 degrees and 45 degrees.ltoreq..theta.2<90 degrees hold and that the prism surface on the base angle .theta.1 side faces in the direction of a wider viewing angle characteristic of the liquid crystal display panel. In this construction, because the emitted light can be converged in an optimum range of viewing angle of the liquid crystal display panel, it is possible to increase the brightness of the backlight with the same power consumption as used in the conventional apparatus and to reduce power consumption of the backlight.Type: GrantFiled: December 2, 1996Date of Patent: March 3, 1998Assignee: Hitachi, Ltd.Inventor: Katsuhiko Shibata
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Patent number: 5684550Abstract: A liquid crystal display device in which a back light is arranged below a liquid crystal display panel having a plurality of pixels arrayed on a transparent substrate surface and in which a prism plate having a plurality of stripe grooves arrayed in parallel is arranged between the liquid crystal display panel and the back light. If the stripe grooves has a pitch .lambda..sub.1 (mm) and if the pixels in parallel with the stripe grooves has a pitch .lambda..sub.2 (mm), the liquid crystal display device is constructed to satisfy a relation of .lambda..sub.1 .ltoreq.0.075.lambda..sub.2 /(.lambda..sub.2 +0.075). This construction can increase the brightness of the back light and prevent the interference fringes from being formed on the display frame.Type: GrantFiled: June 10, 1996Date of Patent: November 4, 1997Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Katsuhiko Shibata, Yoshio Toriyama, Naoto Kobayashi, Shiro Ueda
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Patent number: 5648858Abstract: A liquid crystal display device in which a back light is arranged below a liquid crystal display panel having a plurality of pixels arrayed on a transparent substrate surface and in which a prism plate having a plurality of stripe grooves arrayed in parallel is arranged between the liquid crystal display panel and the back light. If the stripe grooves has a pitch .lambda..sub.1 (mm) and if the pixels in parallel with the stripe grooves has a pitch .lambda..sub.2 (mm), the liquid crystal display device is constructed to satisfy a relation of .lambda..sub.1 .ltoreq.0.075.lambda..sub.2 /(.lambda..sub.2 +0.075). This construction can increase the brightness of the back light and prevent the interference fringes from being formed on the display frame.Type: GrantFiled: July 21, 1993Date of Patent: July 15, 1997Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Katsuhiko Shibata, Yoshio Toriyama, Naoto Kobayashi, Shiro Ueda
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Patent number: 5627926Abstract: An information indicator suitable for information processors such as personal computers, word processors and the like includes a light source, a scattering plate which scatters light from the light source, an indicator plate irradiated with scattered light from the scattering plate, and a prism plate operatively arranged with respect to the scattering plate and the indicator plate and having a prism-like protuberance structure formed at a side thereof. The prism plate is so disposed that the prism-like protuberance structure faces the scattering plate, and the angle 2.theta. constituting the prism-like protuberance structure is defined by the formula, 2.theta..ltoreq.2/3.times.(.pi./2+2.times.arcsin (n'/n)), in this inequality, n is the refractive index of said prism plate medium, and n' is the refractive index of a material in which the prism plate is arranged.Type: GrantFiled: September 25, 1995Date of Patent: May 6, 1997Assignee: Hitachi, Ltd.Inventors: Shigeru Nakamura, Akira Arimoto, Kenkichi Suzuki, Katsuhiko Shibata
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Patent number: 5467417Abstract: An information indicator suitable for information processors such as personal computers, word processors and the like includes a light source, a scattering plate which scatters light from the light source, an indicator plate irradiated with scattered light from the scattering plate, and a prism plate operatively arranged with respect to the scattering plate and the indicator plate and having a prism-like protuberance structure formed at a side thereof. The prism plate is so disposed that the prism-like protuberance structure faces the scattering plate, and the angle 2.theta. constituting the prism-like protuberance structure is defined by the formula, 2.theta.>2/3.times.(.pi./2+2.times.arcsin (n'/n)), in this inequality, n is the refractive index of said prism plate medium, and n' is the refractive index of a material in which the prism plate is arranged.Type: GrantFiled: September 8, 1993Date of Patent: November 14, 1995Assignee: Hitachi, Ltd.Inventors: Shigeru Nakamura, Akira Arimoto, Kenkichi Suzuki, Katsuhiko Shibata
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Patent number: 5296405Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: August 24, 1992Date of Patent: March 22, 1994Assignee: Semiconductor Energy Laboratory Co.., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5171710Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: May 9, 1990Date of Patent: December 15, 1992Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5165627Abstract: The present invention is drawn to an improvement in the configuration of an inner lining plate of an aircraft fuselage wall, which will result in the sound transmission loss (TL) of the inner lining plate to occur in a frequency range covering the frequencies of external noises such as propeller sound, such that external noises transmitted from the inside of the aircraft fuselage can be reduced. The improvement resides in that a tensile rigidity in the circumferential direction of a substantially cylindrical fuselage wall inner lining plate is less than the tensile rigidity in the axial direction thereof. In this respect, the inner lining plate is provided with a large number of parallel crests extending in the axial direction.Type: GrantFiled: November 19, 1991Date of Patent: November 24, 1992Assignees: Mitsubishi Jukogyo Kabushiki Kaisha, Japan Aircraft Development CorporationInventors: Kanichi Amano, Kiyoshi Okura, Kazuo Izumiyama, Katsuya Matsuzaki, Katsuhiko Shibata
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Patent number: 5089426Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for provessing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes. By virtue of this configuration, short current paths do not result even if transparent electrode is provided on the semiconductor layer.Type: GrantFiled: January 16, 1990Date of Patent: February 18, 1992Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Masato Susukida, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Kaoru Koyanagi, Susumu Nagayama
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Patent number: 4986213Abstract: An improved semiconductor processing is desclosed. In the manufacturing process, just formed semiconductor layer undergoes photo annealing and latent dangling bonds are let appear on the surface and gaps, then neutralizer is introduced to the ambience of the semiconductor. The semiconductor thus formed demonstrates SEL effect in place of Staebler-Wronski effect.Type: GrantFiled: September 28, 1988Date of Patent: January 22, 1991Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 4987005Abstract: An improved method for manufacturing uniform films or etching uniformly on a plurality of substrates is shown. The substrates are vertically placed in a reaction chamber so as to be treated at once. A chemical vapor reaction takes place by virtue of a high frequency electric power which is modulated in its amplitude. By this modulation, the deposition or etching can be carried out over the surface of a susbtrate.Type: GrantFiled: August 21, 1989Date of Patent: January 22, 1991Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kunio Suzuki, Takeshi Fukada, Mikio Kinka, Masayoshi Abe, Katsuhiko Shibata, Masato Susukida, Noriya Ishida, Akemi Satake, Yasuyuki Arai
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Patent number: 4937651Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes.Type: GrantFiled: August 22, 1986Date of Patent: June 26, 1990Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi