Patents by Inventor Katsuyuki Fujita

Katsuyuki Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140286086
    Abstract: According to one embodiment, a semiconductor memory device includes first word lines connected to a memory cell array, second word lines connected to a redundancy area, a first row decoder configured to perform selecting from the first word lines based on a row address, a judgment circuit configured to determine whether or not a replacement operation with the redundancy area is needed based on a redundancy address included in the row address, and a second row decoder configured to perform selecting from the second word lines. The row address includes a first row address and a second row address input in order in a time-sharing method. The first row address includes all of the redundancy address.
    Type: Application
    Filed: August 29, 2013
    Publication date: September 25, 2014
    Inventor: Katsuyuki FUJITA
  • Publication number: 20140286087
    Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array, a buffer configured to hold data input to an input/output circuit and to hold data read from the memory cell array, and a controller configured to receive a first command and an address from the outside and to read data, in response to the first command, from a memory cell group coupled to a selected word line designated by the address to the buffer. The controller receives a second command which is input after the first command and indicates a last command of a group of commands including write commands and/or read commands, and starts a write operation from the buffer to the memory cell array in response to the second command.
    Type: Application
    Filed: August 29, 2013
    Publication date: September 25, 2014
    Inventor: Katsuyuki FUJITA
  • Patent number: 8529683
    Abstract: To provide a reversible thermal discoloration aqueous ink composition which is capable of suppressing the lightening and deepening of handwriting at the time when a writing implement containing the reversible thermal discoloration aqueous ink composition in the barrel, and particularly, which does not lighten the color of handwriting with time in an erecting state or does not lighten the color of handwriting by the application of vibration at transportation or at the time when it is carried on in an erecting state, as well as a writing implement using the same and a writing implement set.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 10, 2013
    Assignee: The Pilot Ink Co., Ltd.
    Inventor: Katsuyuki Fujita
  • Patent number: 8498144
    Abstract: A semiconductor storage device includes first to fourth switch circuit. The semiconductor storage device includes a row decoder which controls a voltage of a word line. The semiconductor storage device includes a first selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a first resistance change element which is connected in series to the first selection transistor between the first bit line and the second bit line, and of which a resistance value changes according to a flowing current. The semiconductor storage device includes a second selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a second resistance change element which is connected in series to the second selection transistor between the second bit line and the third bit line, and of which a resistance value changes according to a flowing current.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: July 30, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Takahashi, Katsuyuki Fujita, Yoshihiro Ueda, Katsuhiko Hoya
  • Patent number: 8498145
    Abstract: A memory includes bit lines, word lines, and memory cells connected between first and second BLs. The cells arranged in an extending direction of the BLs constitute columns. The second BL is shared between two columns. The cells in a first pair of columns are arranged to be shifted in the extending direction of the BLs by a half-pitch from the cells in a second pair of columns. The device includes a dummy cell having an equal distance from the adjacent memory elements. Further, the device includes a row decoder driving the cells in the first pair of columns by driving paired word lines, and driving the cells in the second pair of columns by driving paired word lines. Each cell includes selection transistors. The selection transistors are connected in parallel between the memory element and the first BL. Gates of the transistors are connected to different WLs.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: July 30, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Fujita, Yoshihiro Ueda
  • Publication number: 20130107638
    Abstract: A semiconductor storage device according to the present embodiment includes a plurality of memory units respectively comprising a plurality of memory cells. A data bus is shared by the memory units and transfers data from the memory units or to the memory units. A timing controller includes a delay time unit shared by the memory units sharing the data bus. The timing controller is configured to output a control signal for driving the memory units after a predetermined delay time elapses since receiving an input signal.
    Type: Application
    Filed: August 31, 2012
    Publication date: May 2, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsuyuki FUJITA, Katsuhiko HOYA
  • Patent number: 8369129
    Abstract: According to one embodiment, a semiconductor memory device includes a variable resistance element configured to store data “0” and data “1” in accordance with a change in resistance value, a current generator configured to generate a reference current for determining data of the variable resistance element, and having an admittance middle between an admittance of a variable resistance element storing data “0” and an admittance of a variable resistance element storing data “1”, and a sense amplifier includes a first input terminal connected to the variable resistance element and a second input terminal connected to the current generator, and configured to compare currents of the first input terminal and the second input terminal.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: February 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Fujita, Kenji Tsuchida
  • Publication number: 20130029257
    Abstract: The present invention relates to a thermochromic color-memory toner containing: a microcapsule pigment encapsulating a thermochromic color-memory composition; and a binder resin, in which the microcapsule pigment shows a hysteresis characteristic that, in a temperature-rise process, decoloration starts when the temperature reaches t3 and the pigment completely reaches a decolored state in a temperature region of t4 or higher, and in a temperature-drop process, coloration starts when the temperature reaches t2 and the pigment completely reaches a colored state in a temperature region of ti or lower, and ti is in a range of from ?50 to 0° C. and t4 is in a range of from 50 to 150° C.
    Type: Application
    Filed: November 13, 2009
    Publication date: January 31, 2013
    Applicant: THE PILOT INK CO., LTD.
    Inventors: Katsuyuki Fujita, Yoshiaki Ono, Yutaka Shibahashi
  • Patent number: 8282299
    Abstract: A friction body that produces frictional heat allowing development, disappearance or change of color of handwriting formed with a writing instrument for producing thermochromic handwriting, with the friction body having a friction coefficient of 0.2 to 1.0 when rubbed against paper surface, and a writing instrument for use in forming thermochromic handwriting which is equipped with the friction body and a writing instrument set including the friction body and a writing instrument for use in forming thermochromic handwriting.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: October 9, 2012
    Assignee: The Pilot Ink Co., Ltd.
    Inventors: Yoshihiro Ito, Shouichi Ohkawa, Katsuyuki Fujita
  • Patent number: 8233310
    Abstract: According to one embodiment, a resistance-change memory includes bit lines running in a first direction, word lines running in a second direction, and a memory cell array includes memory cells each includes a selection transistor and a variable resistance element. In a layout of first to fourth variable resistance elements arranged in order in the first direction, the first variable resistance element and the second variable resistance element sandwich one word line therebetween, the third variable resistance element and the fourth variable resistance element sandwich one word line therebetween, a first pair includes the first and second variable resistance elements and a second pair includes the third and fourth variable resistance elements sandwich two word lines therebetween, and a column is constructed by repeating the layout in the first direction.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: July 31, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Fujita, Shinichiro Shiratake
  • Publication number: 20120141188
    Abstract: The present invention relates to a reversibly thermochromic aqueous ink composition comprising: water; a water-soluble organic solvent; a reversibly thermochromic microcapsule pigment which contains a reversibly thermochromic composition comprising: (A) an electron donating coloring organic compound, (B) an electron accepting compound, and (C) a reaction medium which determines temperature at which color reactions between the components (A) and (B) occur; a comb type polymer dispersant having carboxyl groups on its side chains, an organic nitrogen sulfur compound, and a water-soluble resin, a writing instrument using the ink composition, and a writing instrument set comprising the writing instrument and a frictional body.
    Type: Application
    Filed: August 16, 2010
    Publication date: June 7, 2012
    Applicant: THE PILOT INK CO., LTD.
    Inventor: Katsuyuki Fujita
  • Patent number: 8173052
    Abstract: A writing implement with a thermochromic coloring color-memory composition which comprises a homogeneous solubilized mixture of (A) an electron donative coloring organic compound, (B) an electron accepting compound and (C) a reaction medium which controls color reactions of the components (A) and (B), wherein a complete decoloring temperature (T4) of the thermochromic coloring color-memory composition is 50° C. or higher and a coloring starting temperature (T2) of thermochromic coloring color-memory composition is 10° C. or lower regarding the color density-temperature curve, and the thermochromic coloring color-memory composition has color-memory ability at the ordinary temperature range.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: May 8, 2012
    Assignee: The Pilot Ink Co., Ltd.
    Inventor: Katsuyuki Fujita
  • Publication number: 20120063215
    Abstract: A semiconductor storage device includes first to fourth switch circuit. The semiconductor storage device includes a row decoder which controls a voltage of a word line. The semiconductor storage device includes a first selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a first resistance change element which is connected in series to the first selection transistor between the first bit line and the second bit line, and of which a resistance value changes according to a flowing current. The semiconductor storage device includes a second selection transistor of which a control terminal is connected to the word line. The semiconductor storage device includes a second resistance change element which is connected in series to the second selection transistor between the second bit line and the third bit line, and of which a resistance value changes according to a flowing current.
    Type: Application
    Filed: July 27, 2011
    Publication date: March 15, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masahiro TAKAHASHI, Katsuyuki Fujita, Yoshihiro Ueda, Katsuhiko Hoya
  • Publication number: 20120063216
    Abstract: A memory includes bit lines, word lines, and memory cells connected between first and second BLs. The cells arranged in an extending direction of the BLs constitute columns. The second BL is shared between two columns. The cells in a first pair of columns are arranged to be shifted in the extending direction of the BLs by a half-pitch from the cells in a second pair of columns. The device includes a dummy cell having an equal distance from the adjacent memory elements. Further, the device includes a row decoder driving the cells in the first pair of columns by driving paired word lines, and driving the cells in the second pair of columns by driving paired word lines. Each cell includes selection transistors. The selection transistors are connected in parallel between the memory element and the first BL. Gates of the transistors are connected to different WLs.
    Type: Application
    Filed: August 8, 2011
    Publication date: March 15, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsuyuki Fujita, Yoshihiro Ueda
  • Publication number: 20110249485
    Abstract: According to one embodiment, a resistance-change memory includes bit lines running in a first direction, word lines running in a second direction, and a memory cell array includes memory cells each includes a selection transistor and a variable resistance element. In a layout of first to fourth variable resistance elements arranged in order in the first direction, the first variable resistance element and the second variable resistance element sandwich one word line therebetween, the third variable resistance element and the fourth variable resistance element sandwich one word line therebetween, a first pair includes the first and second variable resistance elements and a second pair includes the third and fourth variable resistance elements sandwich two word lines therebetween, and a column is constructed by repeating the layout in the first direction.
    Type: Application
    Filed: July 30, 2010
    Publication date: October 13, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsuyuki FUJITA, Shinichiro SHIRATAKE
  • Publication number: 20110008095
    Abstract: To provide a reversible thermal discoloration aqueous ink composition which is capable of suppressing the lightening and deepening of handwriting at the time when a writing implement containing the reversible thermal discoloration aqueous ink composition in the barrel, and particularly, which does not lighten the color of handwriting with time in an erecting state or does not lighten the color of handwriting by the application of vibration at transportation or at the time when it is carried on in an erecting state, as well as a writing implement using the same and a writing implement set.
    Type: Application
    Filed: February 26, 2009
    Publication date: January 13, 2011
    Applicant: THE PILOT INK CO., LTD.
    Inventor: Katsuyuki Fujita
  • Patent number: 7869274
    Abstract: A memory includes: first sense amplifiers arranged in a first interval of an arrangement of memory cell arrays, each being connected to first bit lines corresponding to two memory cell arrays provided at both sides of the first sense amplifier; second sense amplifiers arranged in a second interval of the arrangement of the memory cell arrays, each being connected to second bit lines corresponding to two memory cell arrays at both sides of the second sense amplifier; edge arrays provided beside both ends of an arrangement of the memory cell arrays, the edge arrays generating only the reference data; and edge sense amplifiers provided between the arrangement of the memory cell arrays and the edge arrays, wherein the edge sense amplifier detects data from the memory cell array at one end of the memory cell arrays based on the reference data from one of the edge arrays.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: January 11, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuyuki Fujita, Takashi Ohsawa
  • Patent number: 7859881
    Abstract: A magnetic memory device includes a first magnetic line which has a plurality of cells made of magnetic domains partitioned by domain walls, and in which information is recorded in each cell, a first write element formed at one end portion of the first magnetic line, and a first read element formed at the other end portion of the first magnetic line.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: December 28, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihisa Iwata, Katsuyuki Fujita, Yuui Shimizu
  • Publication number: 20100321980
    Abstract: According to one embodiment, a semiconductor memory device includes a variable resistance element configured to store data “0” and data “1” in accordance with a change in resistance value, a current generator configured to generate a reference current for determining data of the variable resistance element, and having an admittance middle between an admittance of a variable resistance element storing data “0” and an admittance of a variable resistance element storing data “1”, and a sense amplifier includes a first input terminal connected to the variable resistance element and a second input terminal connected to the current generator, and configured to compare currents of the first input terminal and the second input terminal.
    Type: Application
    Filed: June 17, 2010
    Publication date: December 23, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsuyuki Fujita, Kenji Tsuchida
  • Publication number: 20100310300
    Abstract: A writing implement with a thermochromic coloring color-memory composition which comprises a homogeneous solubilized mixture of (A) an electron donative coloring organic compound, (B) an electron accepting compound and (C) a reaction medium which controls color reactions of the components (A) and (B), wherein a complete decoloring temperature (T4) of the thermochromic coloring color-memory composition is 50° C. or higher and a coloring starting temperature (T2) of thermochromic coloring color-memory composition is 10° C. or lower regarding the color density-temperature curve, and the thermochromic coloring color-memory composition has color-memory ability at the ordinary temperature range.
    Type: Application
    Filed: July 29, 2010
    Publication date: December 9, 2010
    Applicant: THE PILOT INK CO., LTD.
    Inventor: Katsuyuki Fujita