Patents by Inventor Katsuyuki Sekine

Katsuyuki Sekine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9761605
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate; a stacked body; a first columnar portion; a second columnar portion; and a plurality of first interconnects. The stacked body is provided on the substrate and includes a plurality of electrode layers separately stacked each other. A distance between the first columnar portion and one end of the plurality of electrode layers in the first direction is smaller than a distance between the second columnar portion and the other end of the plurality of electrode layers in the first direction. In the same electrode layer, a first width of a first charge storage film of the first columnar portion is smaller than a second width of a second charge storage film of the second columnar portion.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: September 12, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Katsuyuki Sekine
  • Patent number: 9754954
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: September 5, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masaaki Higuchi, Katsuyuki Sekine, Fumiki Aiso, Takuo Ohashi, Tatsuya Okamoto
  • Publication number: 20170243945
    Abstract: In a semiconductor memory device, first insulating films are arranged along a first direction and a second direction and extend in a third direction. Interconnect is disposed between the first insulating films in the first direction and extends in the third direction. Electrodes are disposed between the first insulating films in the first direction on a second direction side of the interconnect, and is arranged along the third direction. Second insulating film is disposed between the interconnect and the electrodes. Semiconductor members are arranged along the third direction between the first insulating films in the second direction and extend in the first direction. The electrode is disposed between the interconnect and the semiconductor members. Third insulating film is disposed between the electrodes and the semiconductor member and is thicker than the second insulating film.
    Type: Application
    Filed: September 13, 2016
    Publication date: August 24, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: KATSUYUKI SEKINE, TATSUYA KATO, FUMITAKA ARAI, TOSHIYUKI IWAMOTO, YUTA WATANABE, ATSUSHI MURAKOSHI
  • Patent number: 9735167
    Abstract: A semiconductor memory device according to one embodiment, includes a plurality of first interconnects extending in a first direction and arrayed along a second direction crossing the first direction, a plurality of semiconductor pillars arrayed in a row along the first direction in each of spaces among the first interconnects and extending in a third direction crossing the first direction and the second direction, a first electrode disposed between one of the semiconductor pillars and one of the first interconnects, a first insulating film disposed between the first electrode and one of the first interconnects, a first insulating member disposed between the semiconductor pillars in the first direction and extending in the third direction and opposed the first interconnects not via the first insulating film.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: August 15, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuya Kato, Fumitaka Arai, Satoshi Nagashima, Katsuyuki Sekine, Yuta Watanabe, Keisuke Kikutani, Atsushi Murakoshi
  • Publication number: 20170062451
    Abstract: A semiconductor memory device includes first and second electrode films, an interlayer insulating film, a semiconductor pillar, and a first insulating film. The first electrode film extends in a first direction. The second electrode film is provided separately from the first electrode film in a second direction and extends in the first direction. The interlayer insulating film is provided between the first and the second electrode films. The first insulating film includes first and second insulating regions. A concentration of nitrogen in the first position of the second insulating region is higher than a concentration of nitrogen in the second position between the first position and the semiconductor pillar. A concentration of nitrogen in the first insulating region is lower than the concentration of the nitrogen in the first position.
    Type: Application
    Filed: February 17, 2016
    Publication date: March 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masao SHINGU, Katsuyuki SEKINE, Hirokazu ISHIGAKI, Makoto FUJIWARA
  • Publication number: 20170018565
    Abstract: According to an embodiment, a semiconductor memory device comprises a plurality of control gate electrodes, a semiconductor layer, and a first insulating layer. The plurality of control gate electrodes are stacked above a substrate. The semiconductor layer has as its longitudinal direction a direction perpendicular to the substrate, and faces the plurality of control gate electrodes. The first insulating layer is positioned between the semiconductor layer and the control gate electrode. In addition, part of the first insulating layer is a charge accumulation layer. Moreover, part of the first insulating layer is an oxide layer positioned upwardly of the charge accumulation layer.
    Type: Application
    Filed: January 4, 2016
    Publication date: January 19, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Daisuke NISHIDA, Katsuyuki SEKINE, Hirokazu ISHIGAKI, Yasuhiro SHIMURA
  • Publication number: 20170012050
    Abstract: A semiconductor memory device according to one embodiment, includes a plurality of first interconnects extending in a first direction and arrayed along a second direction crossing the first direction, a plurality of semiconductor pillars arrayed in a row along the first direction in each of spaces among the first interconnects and extending in a third direction crossing the first direction and the second direction, a first electrode disposed between one of the semiconductor pillars and one of the first interconnects, a first insulating film disposed between the first electrode and one of the first interconnects, a first insulating member disposed between the semiconductor pillars in the first direction and extending in the third direction and opposed the first interconnects not via the first insulating film.
    Type: Application
    Filed: August 31, 2015
    Publication date: January 12, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuya KATO, Fumitaka ARAI, Satoshi NAGASHIMA, Katsuyuki SEKINE, Yuta WATANABE, Keisuke KIKUTANI, Atsushi MURAKOSHI
  • Publication number: 20160315092
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Application
    Filed: July 5, 2016
    Publication date: October 27, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki HIGUCHI, Katsuyuki SEKINE, Fumiki AISO, Takuo OHASHI, Tatsuya OKAMOTO
  • Patent number: 9431412
    Abstract: According to one embodiment, a semiconductor memory device includes a first array extending in a first direction, a second array extending in the first direction, and a second electrode film. The second array is arranged with the first array in a second direction crossing the first direction. The second electrode film provided between the first array and the second array. The second electrode film extends in the first direction. Each of the first array and the second array include a first structure, a second structure arranged in the first direction, a fourth insulating film provided between the first structure and the second structure, and a third insulating film provided between the first structure and the second electrode film, provided also between the first structure and the fourth insulating film.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: August 30, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuya Kato, Fumitaka Arai, Satoshi Nagashima, Katsuyuki Sekine, Yuta Watanabe, Keisuke Kikutani, Atsushi Murakoshi
  • Patent number: 9406691
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: August 2, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Higuchi, Katsuyuki Sekine, Fumiki Aiso, Takuo Ohashi, Tatsuya Okamoto
  • Patent number: 9406811
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device including a semiconductor layer with a main surface, a first insulating layer formed on the main surface of the semiconductor layer, a charge storage layer formed on the first insulating layer, a second insulating layer formed on the charge storage layer, and a control gate electrode formed on the second insulating layer. At least one inelastic scattering film that reduces energy of electrons by scattering is contained in at least one of the charge storage layer and second insulating layer.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: August 2, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaaki Higuchi, Yoshio Ozawa, Katsuyuki Sekine, Ryota Fujitsuka
  • Publication number: 20160197094
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film extends between the conductive layers and the semiconductor layer in the first direction. The second insulating film is provided between each electrode and the conductive layers. The conductive layers become smaller in a thickness as the conductive layers are closer to an end in the first direction or a direction opposite to the first direction. The second insulating film includes a first film contacting the conductive layers, and a second film provided between each electrode and the first film.
    Type: Application
    Filed: March 17, 2016
    Publication date: July 7, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki HIGUCHI, Katsuyuki SEKINE, Makoto FUJIWARA
  • Patent number: 9368719
    Abstract: A nonvolatile memory device includes: a first conductive layer; a second conductive layer; a first resistance change layer provided between the first conductive layer and the second conductive layer and having an electrical resistance changing with at least one of an applied electric field and a passed current; and a first lateral layer provided on a lateral surface of the first resistance change layer and having an oxygen concentration higher than an oxygen concentration in the first resistance change layer.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: June 14, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kensuke Takano, Yoshio Ozawa, Katsuyuki Sekine, Junichi Wada
  • Patent number: 9324729
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film extends between the conductive layers and the semiconductor layer in the first direction. The second insulating film is provided between each electrode and the conductive layers. The conductive layers become smaller in a thickness as the conductive layers are closer to an end in the first direction or a direction opposite to the first direction. The second insulating film includes a first film contacting the conductive layers, and a second film provided between each electrode and the first film.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: April 26, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Higuchi, Katsuyuki Sekine, Makoto Fujiwara
  • Publication number: 20160079269
    Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers stacked in a first direction via an inter-layer insulating layer. In addition, the nonvolatile semiconductor memory device comprises: a semiconductor layer having the first direction as a longer direction; a tunnel insulating layer contacting a side surface of the semiconductor layer; a charge accumulation layer contacting a side surface of the tunnel insulating layer; and a block insulating layer contacting a portion facing the conductive layer, of a side surface of the charge accumulation layer. Moreover, the portion facing the conductive layer, of the charge accumulation layer is thinner compared to a portion facing the inter-layer insulating layer, of the charge accumulation layer.
    Type: Application
    Filed: July 14, 2015
    Publication date: March 17, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Katsuyuki SEKINE, Masaaki Higuchi, Masao Shingu, Hirokazu Ishigaki, Naoki Yasuda
  • Publication number: 20160064408
    Abstract: According to an embodiment, a nonvolatile semiconductor memory device comprises: a plurality of conductive layers stacked in a first direction via an inter-layer insulating layer; a semiconductor layer having the first direction as a longer direction; a tunnel insulating layer contacting a side surface of the semiconductor layer; a charge accumulation layer contacting a side surface of the tunnel insulating layer; and a block insulating layer contacting a side surface of the charge accumulation layer. The inter-layer insulating layer comprises: a first silicon oxide layer; a first metal oxide layer; and a first silicon nitride layer. The first metal oxide layer is formed on a first surface facing the conductive layer, of the first silicon oxide layer. The first silicon nitride layer is formed on the first surface via the first metal oxide layer.
    Type: Application
    Filed: July 22, 2015
    Publication date: March 3, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masao SHINGU, Masaaki HIGUCHI, Katsuyuki SEKINE, Kazuhiro MATSUO
  • Publication number: 20160013201
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki HIGUCHI, Katsuyuki SEKINE, Fumiki AISO, Takuo OHASHI, Tatsuya OKAMOTO
  • Publication number: 20150372002
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film extends between the conductive layers and the semiconductor layer in the first direction. The second insulating film is provided between each electrode and the conductive layers. The conductive layers become smaller in a thickness as the conductive layers are closer to an end in the first direction or a direction opposite to the first direction. The second insulating film includes a first film contacting the conductive layers, and a second film provided between each electrode and the first film.
    Type: Application
    Filed: September 11, 2014
    Publication date: December 24, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki HIGUCHI, Katsuyuki SEKINE, Makoto FUJIWARA
  • Publication number: 20150371997
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film extends between the conductive layers and the semiconductor layer in the first direction. The second insulating film is provided between each electrode and the conductive layers. The conductive layers become smaller in a thickness as the conductive layers are closer to an end in the first direction or a direction opposite to the first direction.
    Type: Application
    Filed: September 11, 2014
    Publication date: December 24, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki HIGUCHI, Katsuyuki SEKINE, Fumiki AlSO, Tatsuya OKAMOTO, Masaru KITO
  • Patent number: 9166032
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: October 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Higuchi, Katsuyuki Sekine, Fumiki Aiso, Takuo Ohashi, Tatsuya Okamoto