Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first package and a second package. The first package includes a first substrate, an electronic component, a trace layer, and a first conductive structure. The first substrate has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the first substrate. The trace layer has an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate. The first conductive structure electrically connects the trace layer to the second surface of the first substrate. The second package is disposed on the first surface of the first substrate of the first package.

Abstract: An electronic package includes a patterned conductive layer and at least one conductive protrusion on the patterned conductive layer. The at least one conductive protrusion has a first top surface. The patterned conductive layer and the at least one conductive protrusion define a space. The electronic package further includes a first electronic component disposed in the space and a plurality of conductive pillars on the first electronic component. The conductive pillars have a second top surface. The first top surface is substantially level with the second top surface.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate and a first passive device. The substrate has a first surface and a second surface opposite to the first surface. The first passive device includes a first terminal and a second terminal, wherein the first terminal is closer to the first surface than to the second surface, and the second terminal is closer to the second surface than to the first surface.

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

Abstract: An electronic package includes a patterned conductive layer and at least one conductive protrusion on the patterned conductive layer. The at least one conductive protrusion has a first top surface. The patterned conductive layer and the at least one conductive protrusion define a space. The electronic package further includes a first electronic component disposed in the space and a plurality of conductive pillars on the first electronic component. The conductive pillars have a second top surface. The first top surface is substantially level with the second top surface.

Abstract: A semiconductor package includes a base material, a capture land, an interconnection structure, a semiconductor chip and an encapsulant. The base material has a top surface and an inner lateral surface. The capture land is disposed in or on the base material, and has an outer side surface. The interconnection structure is disposed along the inner lateral surface of the base material, and on the capture land. The interconnection structure has an outer side surface. An outer side surface of the semiconductor package includes the outer side surface of the capture land and the outer side surface of the interconnection structure. The semiconductor chip is disposed on the top surface of the base material. The encapsulant is disposed adjacent to the top surface of the base material, and covers the semiconductor chip.

Abstract: A substrate structure, a semiconductor package structure including the same and a method for manufacturing the same are provided. The substrate structure includes a first passivation layer, a first circuit layer and a first protection layer. The first passivation layer has a first surface and a second surface opposite to the first surface. The first circuit layer has an outer lateral surface. A first portion of the first circuit layer is disposed in the first passivation layer. The first protection layer is disposed on a second portion of the first circuit layer and exposed from the first surface of the first passivation layer. The outer lateral surface of the first circuit layer is covered by the first passivation layer or the first protection layer.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate, a semiconductor device, an encapsulant, a balance structure, and a warpage-resistant layer. The semiconductor device is disposed on the substrate. The encapsulant encapsulates the semiconductor device. The balance structure is on the semiconductor device and contacting the encapsulant. The warpage-resistant layer is between the semiconductor device and the balance structure. The encapsulant contacts a lateral surface of the warpage-resistant layer.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first package and a second package. The first package includes a first substrate, an electronic component, a trace layer, and a first conductive structure. The first substrate has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the first substrate. The trace layer has an uppermost conductive layer embedded in the first substrate and exposed from the first surface of the first substrate. The first conductive structure electrically connects the trace layer to the second surface of the first substrate. The second package is disposed on the first surface of the first substrate of the first package.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate and a first passive device. The substrate has a first surface and a second surface opposite to the first surface. The first passive device includes a first terminal and a second terminal, wherein the first terminal is closer to the first surface than to the second surface, and the second terminal is closer to the second surface than to the first surface.

Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a conductive base, a first semiconductor die, a first conductive pillar, and a first encapsulant. The conductive base has a first surface. The first semiconductor die is disposed on the first surface of the conductive base. The first conductive pillar is disposed on the first semiconductor die. The first encapsulant is disposed on the first surface of the conductive base. The first encapsulant encapsulates the first semiconductor die. The first encapsulant includes an opening defined by the first conductive pillar.

Abstract: A substrate structure, a semiconductor package structure including the same and a method for manufacturing the same are provided. The substrate structure includes a first passivation layer, a first circuit layer and a first protection layer. The first passivation layer has a first surface and a second surface opposite to the first surface. The first circuit layer has an outer lateral surface. A first portion of the first circuit layer is disposed in the first passivation layer. The first protection layer is disposed on a second portion of the first circuit layer and exposed from the first surface of the first passivation layer. The outer lateral surface of the first circuit layer is covered by the first passivation layer or the first protection layer.

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a conductive base, a first semiconductor die, a first conductive pillar, and a first encapsulant. The conductive base has a first surface. The first semiconductor die is disposed on the first surface of the conductive base. The first conductive pillar is disposed on the first semiconductor die. The first encapsulant is disposed on the first surface of the conductive base. The first encapsulant encapsulates the first semiconductor die. The first encapsulant includes an opening defined by the first conductive pillar.

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

Abstract: A semiconductor package includes a base material, a capture land, an interconnection structure, a semiconductor chip and an encapsulant. The base material has a top surface and an inner lateral surface. The capture land is disposed in or on the base material, and has an outer side surface. The interconnection structure is disposed along the inner lateral surface of the base material, and on the capture land. The interconnection structure has an outer side surface. An outer side surface of the semiconductor package includes the outer side surface of the capture land and the outer side surface of the interconnection structure. The semiconductor chip is disposed on the top surface of the base material. The encapsulant is disposed adjacent to the top surface of the base material, and covers the semiconductor chip.

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a carrier having a first surface and a second surface opposite to the first surface, an encapsulant, and an antenna. The encapsulant is disposed on the first surface of the carrier. The antenna is disposed on the encapsulant. The antenna includes a seed layer and a conductive layer.

Abstract: A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a carrier having a first surface and a second surface opposite to the first surface, an encapsulant, and an antenna. The encapsulant is disposed on the first surface of the carrier. The antenna is disposed on the encapsulant. The antenna includes a seed layer and a conductive layer.

Abstract: A semiconductor package device includes a first die having a first surface and a second surface opposite to the first surface, and a first adhesive layer disposed on the first surface of the first die. The semiconductor package device further includes an encapsulant layer encapsulating the first die and the first adhesive layer, and a first conductive via disposed in the first adhesive layer and electrically connected to the first die.