Patents by Inventor Kazuaki Terashima

Kazuaki Terashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240104018
    Abstract: A second memory stores a plurality of input data sets DSi composed of a plurality of pieces of input data. N multiply-accumulate units are capable of performing parallel processings, and each performs a multiply-accumulate operation on any one of the plurality of weight parameter sets and any one of the plurality of input data sets. A second DMA controller transfers the input data set from the second memory to the n multiply-accumulate units. A measurement circuit measures a degree of matching/mismatching of logic levels among the plurality of pieces of input data contained in the input data set within the memory MEM2, the sequence controller controls the number of parallel processings by the n multiply-accumulate units based on a measurement result by the measurement circuit.
    Type: Application
    Filed: July 5, 2023
    Publication date: March 28, 2024
    Inventor: Kazuaki TERASHIMA
  • Publication number: 20240104034
    Abstract: A second memory has n banks accessible in parallel, and stores pixel data. An input DMA controller respectively transfers the pixel data stored in the second memory to n multiply-accumulate units by using n input channels. A sequence controller controls the input DMA controller so as to cause a first input channel to transfer the pixel data in a first pixel space of the input bank to a first multiply-accumulate unit and cause a second input channel to transfer the pixel data in a second pixel space of the same input bank to a second multiply-accumulate unit.
    Type: Application
    Filed: July 7, 2023
    Publication date: March 28, 2024
    Inventors: Kazuaki TERASHIMA, Atsushi NAKAMURA, Rajesh GHIMIRE
  • Publication number: 20240054083
    Abstract: A semiconductor device capable of shortening processing time of a neural network is provided. The memory stores a compressed weight parameter. A plurality of multiply accumulators perform a multiply-accumulation operation to a plurality of pixel data and a plurality of weight parameters. A decompressor restores the compressed weight parameter stored in the memory to a plurality of weight parameters. A memory for weight parameter stores the plurality of weight parameters restored by the decompressor. The DMA controller transfers the plurality of weight parameters from the memory to the memory for weight parameter via the decompressor. A sequence controller writes down the plurality of weight parameters stored in the memory for weight parameter to a weight parameter buffer at write timing.
    Type: Application
    Filed: June 16, 2023
    Publication date: February 15, 2024
    Inventors: Kazuaki TERASHIMA, Isao NAGAYOSHI, Atsushi NAKAMURA
  • Publication number: 20230376415
    Abstract: A semiconductor device capable of reducing power consumption is provided. A group controller detects a zero weight parameter having a zero value among “n×m” weight parameters to be transferred to a weight parameter buffer. Then, when receiving the zero weight parameter as its input, the group controller exchanges the “n×m” weight parameters to be transferred to the weight parameter buffer so that all multiplication results of the “n” multipliers included in a target multiplier group that is one of the “m” multiplier groups are zero. The group controller controls the target multiplier group to be disabled, and exchanges the “n×m” pixel data to be transferred to the data input buffer, based on the exchange of the “n×m” weight parameters.
    Type: Application
    Filed: March 20, 2023
    Publication date: November 23, 2023
    Inventors: Kazuaki TERASHIMA, Atsushi NAKAMURA, Yonghua WANG
  • Publication number: 20230297528
    Abstract: A semiconductor device capable of preventing a sharp variation in current consumption in neural network processing is provided. A dummy circuit outputs dummy data to at least one or more of n number of MAC circuits and causes the at least one or more of n number of MAC circuits to perform a dummy calculation and to output dummy output data. An output-side DMA controller transfers pieces of normal output data from the n number of MAC circuits to a memory, by use of n number of channels, respectively, and does not transfer the dummy output data to the memory. In this semiconductor device, the at least one or more of n number of MAC circuits perform the dummy calculation in a period from a timing at which the output-side DMA controller ends data transfer to the memory to a timing at which the input-side DMA controller starts data transfer from the memory.
    Type: Application
    Filed: January 10, 2023
    Publication date: September 21, 2023
    Inventors: Kazuaki TERASHIMA, Atsushi NAKAMURA, Rajesh GHIMIRE
  • Patent number: 11763417
    Abstract: The semiconductor device includes an image signal processor, a scaler, and an ROI (Region of Interest) controller. The image signal processor executes image processing including demosaic processing and stores the image after the image processing in memory. The scaler reduces the capture image from the image sensor to generate a reduced entire image and causes the image signal processor to execute image processing on the reduced entire image. The ROI controller cuts out a partial region of the captured image from the image sensor to generate an ROI image and causes the image signal processor to execute image processing on the ROI image.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: September 19, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kazuaki Terashima, Isao Nagayoshi, Atsushi Nakamura
  • Publication number: 20220398441
    Abstract: A semiconductor device executes the processing of a neural network. The memory MEM1 holds a plurality of pixel values and j compressed weighting factors. The decompressor DCMP restores the j compressed weighting factors to the uncompressed k (k?j) weighting factors. The DMA controller DMAC1 reads the j compressed weighting factors from the memory MEM1 and transfers them to the decompressor DCMP. The n (n>k) accumulators in the accumulator unit ACCU multiply a plurality of pixel values and k uncompressed weighting factor to accumulate and add the multiplication results to the time series. A switch circuit SW1 provided between the decompressor DCMP and the accumulator unit ACCU transfers the k uncompressed weighting factors restored by the decompressor DCMP to n accumulators based on the correspondence represented by the identifier.
    Type: Application
    Filed: June 11, 2021
    Publication date: December 15, 2022
    Inventors: Kazuaki TERASHIMA, Isao NAGAYOSHI, Atsushi NAKAMURA
  • Patent number: 11455248
    Abstract: A semiconductor device performs a software lock-step. The semiconductor device includes a first circuit group including a first Intellectual Property (IP) to be operated in a first address space, a first bus, and a first memory, a second circuit group including a second IP to be operated in a second address space, a second bus, and a second memory, a third bus connectable to a third memory, and a transfer control circuit coupled to the first to third buses. when the software lock-step is performed, the second circuit group converts an access address from the second IP to the second memory such that an address assigned to the second memory in the second address space is a same as an address assigned to the first memory in the first address space.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: September 27, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Atsushi Nakamura, Akihiro Yamamoto, Kazuaki Terashima, Manabu Koike
  • Publication number: 20210349819
    Abstract: A semiconductor device performs a software lock-step. The semiconductor device includes a first circuit group including a first Intellectual Property (IP) to be operated in a first address space, a first bus, and a first memory, a second circuit group including a second IP to be operated in a second address space, a second bus, and a second memory, a third bus connectable to a third memory, and a transfer control circuit coupled to the first to third buses. when the software lock-step is performed, the second circuit group converts an access address from the second IP to the second memory such that an address assigned to the second memory in the second address space is a same as an address assigned to the first memory in the first address space.
    Type: Application
    Filed: May 6, 2020
    Publication date: November 11, 2021
    Inventors: Atsushi NAKAMURA, Akihiro YAMAMOTO, Kazuaki TERASHIMA, Manabu KOIKE
  • Patent number: 10974719
    Abstract: A mobile object control system has an SfM unit detecting distance to an object imaged by a monocular camera by using the SfM algorithm, a first-stop-position output unit outputting a first stop position, a second-stop-position calculating unit calculating a second stop position closer than the first stop position, and a control unit controlling travel of a mobile object. The control unit controls the mobile object so as to stop at the second stop position. When a predetermined starting condition is satisfied, the control unit controls the mobile object so as to start. The SfM unit detects the distance to an object by using an image captured by the monocular camera after the mobile object starts. When a result of detection of the distance of the object by the SfM unit is obtained, the control unit uses the detection result for control of the travel.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: April 13, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kazuaki Terashima, Yuki Kajiwara
  • Patent number: 10229472
    Abstract: Image processing is made efficient. An image processing apparatus according to an embodiment includes a line memory, a plurality of pipelines, and a line memory control circuit that controls data reading from the line memory to processing units. The processing unit includes a first operator that performs a first arithmetic operation, a second operator which performs a second arithmetic operation based on first intermediate data based on an arithmetic operation result of the first operator and which calculates second intermediate data according to the first intermediate data of when peripheral pixels are sequentially changed, third operators which perform a third arithmetic operation based on the first intermediate data and which calculate third intermediate data according to the first intermediate data of when the peripheral pixels are sequentially changed, and delay elements that delay the third intermediate data.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: March 12, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuaki Terashima, Yuki Kajiwara
  • Publication number: 20190039607
    Abstract: A mobile object control system has an SfM unit detecting distance to an object imaged by a monocular camera by using the SfM algorithm, a first-stop-position output unit outputting a first stop position, a second-stop-position calculating unit calculating a second stop position closer than the first stop position, and a control unit controlling travel of a mobile object. The control unit controls the mobile object so as to stop at the second stop position. When a predetermined starting condition is satisfied, the control unit controls the mobile object so as to start. The SfM unit detects the distance to an object by using an image captured by the monocular camera after the mobile object starts. When a result of detection of the distance of the object by the SfM unit is obtained, the control unit uses the detection result for control of the travel.
    Type: Application
    Filed: July 10, 2018
    Publication date: February 7, 2019
    Inventors: Kazuaki TERASHIMA, Yuki KAJIWARA
  • Patent number: 9946938
    Abstract: An in-vehicle image processing device capable of appropriately monitoring areas forward of, around, and rearward of a vehicle is provided at low cost. The device is for mounting on a vehicle and includes a camera, an image processing unit, and a determination unit. With a reflector provided in front of the camera, the camera can image, for display in a frame at a time, a first area forward of the vehicle and a second area, e.g. an area around the vehicle. In the image processing unit supplied with such image data from the camera, either the first-area image or the second-area image is appropriately processed whereas image processing is omitted for the other image. Alternatively, both images are subjected to a same image processing. The determination unit supplied with vehicle speed information supplies appropriate control instruction information based on the current vehicle speed to the image processing unit.
    Type: Grant
    Filed: October 25, 2014
    Date of Patent: April 17, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Kazuaki Terashima
  • Publication number: 20170341646
    Abstract: A semiconductor device includes an image recognition unit that outputs a recognition result based on image information received from a camera, and a determination unit that determines a control mode of a vehicle based on the recognition result and distance information received from a distance sensor.
    Type: Application
    Filed: July 24, 2017
    Publication date: November 30, 2017
    Inventor: Kazuaki TERASHIMA
  • Patent number: 9776633
    Abstract: To achieve an accurate transfer of control from a system to a driver, a semiconductor device includes: a recognition unit that recognizes an object present in the periphery of a vehicle based on a result of observation of the periphery of the vehicle; a route calculation unit that calculates, based on the recognized object, a travel route for the vehicle in an automatic control mode for automatically controlling the vehicle; and a mode control unit that transfers the vehicle from the automatic control mode to a manual control mode for controlling the vehicle according to an operation by a driver, when a travel route to avoid the recognized object cannot be calculated.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: October 3, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Kazuaki Terashima
  • Publication number: 20170278214
    Abstract: Image processing is made efficient. An image processing apparatus according to an embodiment includes a line memory, a plurality of pipelines, and a line memory control circuit that controls data reading from the line memory to processing units. The processing unit includes a first operator that performs a first arithmetic operation, a second operator which performs a second arithmetic operation based on first intermediate data based on an arithmetic operation result of the first operator and which calculates second intermediate data according to the first intermediate data of when peripheral pixels are sequentially changed, third operators which perform a third arithmetic operation based on the first intermediate data and which calculate third intermediate data according to the first intermediate data of when the peripheral pixels are sequentially changed, and delay elements that delay the third intermediate data.
    Type: Application
    Filed: February 2, 2017
    Publication date: September 28, 2017
    Inventors: Kazuaki TERASHIMA, Yuki KAJIWARA
  • Publication number: 20150367848
    Abstract: To achieve an accurate transfer of control from a system to a driver, a semiconductor device includes: a recognition unit that recognizes an object present in the periphery of a vehicle based on a result of observation of the periphery of the vehicle; a route calculation unit that calculates, based on the recognized object, a travel route for the vehicle in an automatic control mode for automatically controlling the vehicle; and a mode control unit that transfers the vehicle from the automatic control mode to a manual control mode for controlling the vehicle according to an operation by a driver, when a travel route to avoid the recognized object cannot be calculated.
    Type: Application
    Filed: May 13, 2015
    Publication date: December 24, 2015
    Inventor: Kazuaki TERASHIMA
  • Publication number: 20150145997
    Abstract: An in-vehicle image processing device capable of appropriately monitoring areas forward of, around, and rearward of a vehicle is provided at low cost. The device is for mounting on a vehicle and includes a camera, an image processing unit, and a determination unit. With a reflector provided in front of the camera, the camera can image, for display in a frame at a time, a first area forward of the vehicle and a second area, e.g. an area around the vehicle. In the image processing unit supplied with such image data from the camera, either the first-area image or the second-area image is appropriately processed whereas image processing is omitted for the other image. Alternatively, both images are subjected to a same image processing. The determination unit supplied with vehicle speed information supplies appropriate control instruction information based on the current vehicle speed to the image processing unit.
    Type: Application
    Filed: October 25, 2014
    Publication date: May 28, 2015
    Inventor: Kazuaki TERASHIMA
  • Patent number: 8279919
    Abstract: The invention is intended to reduce overall image degradation when frame interpolation is performed by means of an adaptive image compression technique. A compression unit which adaptively compresses input image data, determines an error rate, i.e., a quantity of data loss, depending on input image data. A compression rate is set, depending on the determined error rate (or the quantity of data loss). For an image that is likely to be degraded by compression because of a large error rate determined for it, a process of generating an interpolated image by an interpolated image generating unit is disabled and an original image is used instead of an interpolated frame.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: October 2, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Kazuaki Terashima
  • Publication number: 20120106648
    Abstract: An image processing device and a video reproducing device capable of detecting the position of a character in a moving image even if pixels of the character have a luminance not higher than a luminance of pixels other than the pixels of the character are provided. A motion vector generation unit generates motion vectors of an image of a first frame and an image of a second frame. An edge detection unit detects an edge pixel forming an edge of the image of the first frame. A character position detection unit detects a position of a character included in the image of the first frame based on a motion vector, a luminance, and information about whether or not being the edge pixel, of each pixel of the image of the first frame.
    Type: Application
    Filed: September 2, 2009
    Publication date: May 3, 2012
    Inventor: Kazuaki Terashima