Patents by Inventor Kazufumi Yamaguchi

Kazufumi Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6888072
    Abstract: A fixture with movable pawls and positioning walls is attached to a circuit board. An electronic component is inserted into the fixture from its upper side. Since the movable pawls move outward due to their slopes, the electronic component is allowed to fit between the positioning walls. After the fitting of the electronic component, the movable pawls hold the sides of the upper face of the electronic component and the positioning walls are in contact with the peripheral walls of the electronic component. Bumps provided on electrode pads of the electronic component are connected to electrodes on the circuit board. Thus, the electronic component can be mounted using the flip chip technique. In addition, the electronic component can be removed easily by moving the movable pawls even after being mounted.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: May 3, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahide Tsukamoto, Kazufumi Yamaguchi, Takeshi Shimamoto, Fumikazu Tateishi
  • Patent number: 6683260
    Abstract: Transmission line structure is composed of a pair of signal conductors which are embedded in one wiring region of a dielectric layer and a thickness in height of the signal conductor is larger than a width, and is constituted so that a coupling impedance between the adjacent signal conductors is lower than a coupling impedance between the signal conductor and another conductor formed in another wiring region, and thus to provide a multi-layer wiring board having a transmission line structure of high wiring density and excellent transmission characteristic.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: January 27, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Shimamoto, Kazufumi Yamaguchi, Masahide Tsukamoto, Fumikazu Tateishii, Yutaka Taguchi
  • Publication number: 20020041009
    Abstract: In a transmission line assembly chip for connection between semiconductor chips, strap-like metallic films and dielectric films are alternately arranged in parallel in a transverse direction, so that an aspect ratio of each transmission line conductor is larger than 1. The assembly chip is formed by laminating metallic foils and dielectric films and cutting the same into a specified thickness to achieve favorable matching of characteristic impedances of the transmission lines.
    Type: Application
    Filed: July 3, 2001
    Publication date: April 11, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., Ltd
    Inventors: Kazufumi Yamaguchi, Takeshi Shimamoto, Fumikazu Tateishii, Masahide Tsukamoto, Takeo Ukai
  • Publication number: 20020017963
    Abstract: Transmission line structure is composed of a pair of signal conductors which are embedded in one wiring region of a dielectric layer and a thickness in height of the signal conductor is larger than a width, and is constituted so that a coupling impedance between the adjacent signal conductors is lower than a coupling impedance between the signal conductor and another conductor formed in another wiring region, and thus to provide a multi-layer wiring board having a transmission line structure of high wiring density and excellent transmission characteristic.
    Type: Application
    Filed: July 3, 2001
    Publication date: February 14, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., Ltd.
    Inventors: Takeshi Shimamoto, Kazufumi Yamaguchi, Masahide Tsukamoto, Fumikazu Tateishii, Yutaka Taguchi
  • Publication number: 20010027876
    Abstract: A fixture with movable pawls and positioning walls is attached to a circuit board. An electronic component is inserted into the fixture from its upper side. Since the movable pawls move outward due to their slopes, the electronic component is allowed to fit between the positioning walls. After the fitting of the electronic component, the movable pawls hold the sides of the upper face of the electronic component and the positioning walls are in contact with the peripheral walls of the electronic component. Bumps provided on electrode pads of the electronic component are connected to electrodes on the circuit board. Thus, the electronic component can be mounted using the flip chip technique. In addition, the electronic component can be removed easily by moving the movable pawls even after being mounted.
    Type: Application
    Filed: March 16, 2001
    Publication date: October 11, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahide Tsukamoto, Kazufumi Yamaguchi, Takeshi Shimamoto, Fumikazu Tateishi
  • Patent number: 6042953
    Abstract: A bi-layer bump comprises a base layer composed of sprayed aluminum thick film having a thickness of about 20 .mu.m formed to cover the periphery of the passivation film formed on each pad electrode, a surface layer composed of sprayed copper thick film having a thickness of about 30 .mu.m formed on the base layer. According to the above-mentioned structure, a substrate on which bumps are formed which has an excellent electric property and connecting reliability, wherein an interlayer insulating layer, an active layer and a multi-layer wiring can be provided under the pad electrode can be obtained.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: March 28, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazufumi Yamaguchi, Tsutomu Mitani, Mitsuo Asabe
  • Patent number: 5914274
    Abstract: A bi-layer bump comprises a base layer composed of sprayed aluminum thick film having a thickness of about 20 .mu.m formed to cover the periphery of the passivation film formed on each pad electrode, a surface layer composed of sprayed copper thick film having a thickness of about 30 .mu.m formed on the base layer. According to the above-mentioned structure, a substrate on which bumps are formed which has an excellent electric property and connecting reliability, wherein an interlayer insulating layer, an active layer and a multi-layer wiring can be provided under the pad electrode can be obtained.
    Type: Grant
    Filed: April 1, 1998
    Date of Patent: June 22, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazufumi Yamaguchi, Tsutomu Mitani, Mitsuo Asabe
  • Patent number: 4845567
    Abstract: An self-scan type linear image sensor comprises an array of a plurality of phototransistors or photodiodes, a shift register, and current switches operating in response to parallel output signals from the shift register. The shift register is comprised of thyristors and interstage coupling transistors cascade-connecting the thyristors. The current switches are comprised of a first differential current switch executing differential switching operations between parallel output signals from odd-number stages of the shift register and a first separation signal, and a second differential current switch executing differential switching operations between parallel output signals from even-number stages of the shift register and a second separation signal. Current outputs from these current switches are delivered to collectors of the phototransistors, which are connected at emitters, common to an image signal output line.
    Type: Grant
    Filed: February 25, 1987
    Date of Patent: July 4, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazufumi Yamaguchi, Takahiko Murata, Yasunori Yamamoto
  • Patent number: 4638362
    Abstract: A solid-state image pickup device has photo-sensitive picture elements arranged in a matrix to convert light containing picture element information into electrical charges. A horizontal charge transfer element and a vertical charge transfer element respectively transfer electrical charges corresponding to individual picture elements in a horizontal and vertical direction. At least one of the vertical charge transfer elements and horizontal charge transfer elements is controlled in response to external control signals so that a part of the electrical charges corresponding to individual picture elements in a specified part of the photosensitive picture elements are outputted as picture element output signals.
    Type: Grant
    Filed: December 28, 1984
    Date of Patent: January 20, 1987
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuaki Oshima, Kazufumi Yamaguchi
  • Patent number: 4567529
    Abstract: A linear image sensor of a self-scanning type comprising a phototransistor array and a scanning circuit, whose circuit comprises decoders of current switches connected dendritically, input signal converter circuits generating input signals for driving the current switches, and a current switch array which turns on or off charging currents to the phototransistors according to whether or not an output current of decoder exists, so that video signals from the phototransistors, when the output currents of decoder flow, are obtainable from the phototransistors in the charge storage mode, all the transistors for scanning circuit being operated in nonsaturation condition for high-speed operation and the input signals being encoded so that the input signals to the decoder vary by one bit at each scanning step for noise reduction. The cancellation circuit of dark signal and noise signal is also provided.
    Type: Grant
    Filed: June 5, 1984
    Date of Patent: January 28, 1986
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazufumi Yamaguchi, Takahiko Murata