Patents by Inventor Kazuhiko Komatsu

Kazuhiko Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161354
    Abstract: A physical property map image generation apparatus performs: acquiring, for each pattern of a material, physical property information indicating a physical property quantity for each physical property of a product; and generating a self-organizing map and a physical property map image. A position in a map space and a physical property vector indicating a value related to a physical property quantity for each type of physical properties of the product are assigned to each node on the self-organizing map. On the physical property map image 40, each of the nodes arranged in the map space is represented by a color assigned to that node. For each node, each of two or three base color components of a color assigned to the node is determined based on a value that a physical property vector assigned to that node indicates for a physical property corresponding to that base color.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 16, 2024
    Applicants: NEC Corporation, TOHOKU UNIVERSITY
    Inventors: Naoki KUWAMORI, Akihiro MUSA, Yohei TAKIGAWA, Yuka KAZAMA, Yoshihiko SATOU, Hiroaki KOBAYASHI, Gota KIKUGAWA, Tomonaga OKABE, Kazuhiko KOMATSU
  • Publication number: 20240152664
    Abstract: A singular material detection apparatus (2000) acquires, for each of a plurality of materials (60), material specification information (10) representing material specifications of the material (60) and physical property information (20) indicating physical properties of a product (70) that can be generated by using the material (60). The singular material detection apparatus (2000) generates a self-organizing map (30) by using the physical property information (20). The singular material detection apparatus (2000) assigns each of pieces of material specification information (10) to one of nodes based on the physical property information (20) corresponding to that piece of the material specification information (10). Then, the singular material detection apparatus (2000) detects, from among the nodes to which the pieces of material specification information (10) are assigned, a singular node located at a singular position in a map space.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 9, 2024
    Applicants: NEC CORPORATION, TOHOKU UNIVERSITY
    Inventors: Naoki KUWAMORI, Akihiro MUSA, Yohei TAKIGAWA, Yuka KAZAMA, Yoshihiko SATOU, Hiroaki KOBAYASHI, Gota KIKUGAWA, Tomonaga OKABE, Kazuhiko KOMATSU
  • Publication number: 20240153158
    Abstract: A map image generation apparatus acquires material specification information representing a material specification of a material and physical property information representing a physical property of a product. The map image generation apparatus generates a self-organizing map by using the physical property information. A position in a map space, and a physical property vector indicating, for each of a plurality of types of physical properties of the product, a value related to a physical property quantity of the physical property are assigned to each of nodes on the self-organizing map. The map image generation apparatus assigns, by using the material specification information, a specification vector indicating a value related to the material specification to each of the nodes. The map image generation apparatus generates a map image in which the nodes are clustered or colored based on the specification vectors.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 9, 2024
    Applicants: NEC CORPORATION, TOHOKU UNIVERSITY
    Inventors: Naoki KUWAMORI, Akihiro MUSA, Yohei TAKIGAWA, Yuka KAZAMA, Yoshihiko SATOU, Hiroaki KOBAYASHI, Gota KIKUGAWA, Tomonaga OKABE, Kazuhiko KOMATSU
  • Patent number: 11694900
    Abstract: A semiconductor device includes an n-type semiconductor layer; a first metal layer provided on the n-type semiconductor layer, the first metal layer including first atoms capable of being n-type impurities in the n-type semiconductor layer; a second metal layer provided on the first metal layer, the second metal layer including titanium atoms; a third metal layer provided on the second metal layer; and a second atom capable of being a p-type impurity in the n-type semiconductor layer. The second atom and a part of the titanium atoms are included in a vicinity of an interface between the first metal layer and the second metal layer.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: July 4, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiyuki Nishikawa, Kazuhiko Komatsu, Shinji Nunotani, Yoshiyuki Harada, Hideto Sugawara
  • Publication number: 20220020592
    Abstract: A semiconductor device includes an n-type semiconductor layer; a first metal layer provided on the n-type semiconductor layer, the first metal layer including first atoms capable of being n-type impurities in the n-type semiconductor layer; a second metal layer provided on the first metal layer, the second metal layer including titanium atoms; a third metal layer provided on the second metal layer; and a second atom capable of being a p-type impurity in the n-type semiconductor layer. The second atom and a part of the titanium atoms are included in a vicinity of an interface between the first metal layer and the second metal layer.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 20, 2022
    Inventors: Toshiyuki NISHIKAWA, Kazuhiko KOMATSU, Shinji NUNOTANI, Yoshiyuki HARADA, Hideto SUGAWARA
  • Patent number: 11158514
    Abstract: A semiconductor device includes an n-type semiconductor layer; a first metal layer provided on the n-type semiconductor layer, the first metal layer including first atoms capable of being n-type impurities in the n-type semiconductor layer; a second metal layer provided on the first metal layer, the second metal layer including titanium atoms; a third metal layer provided on the second metal layer; and a second atom capable of being a p-type impurity in the n-type semiconductor layer. The second atom and a part of the titanium atoms are included in a vicinity of an interface between the first metal layer and the second metal layer.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: October 26, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Toshiyuki Nishikawa, Kazuhiko Komatsu, Shinji Nunotani, Yoshiyuki Harada, Hideto Sugawara
  • Publication number: 20200303197
    Abstract: A semiconductor device includes an n-type semiconductor layer; a first metal layer provided on the n-type semiconductor layer, the first metal layer including first atoms capable of being n-type impurities in the n-type semiconductor layer; a second metal layer provided on the first metal layer, the second metal layer including titanium atoms; a third metal layer provided on the second metal layer; and a second atom capable of being a p-type impurity in the n-type semiconductor layer. The second atom and a part of the titanium atoms are included in a vicinity of an interface between the first metal layer and the second metal layer.
    Type: Application
    Filed: September 6, 2019
    Publication date: September 24, 2020
    Inventors: Toshiyuki Nishikawa, Kazuhiko Komatsu, Shinji Nunotani, Yoshiyuki Harada, Hideto Sugawara
  • Publication number: 20110220485
    Abstract: In one embodiment, a method is disclosed for manufacturing a device including forming a film on an object of processing using sputtering. The method can form a first film of a first sputtered particle on the object of processing at a first position. The first sputtered particle travels in a direction intersecting a major surface of a sputtering target. The object of processing and the sputtering target do not overlap as viewed in plan at the first position. In addition, the method can form a second film of a second sputtered particle on the first film at a second position. The second sputtered particle travels in a direction substantially orthogonal to the major surface of the sputtering target. The object of processing and the sputtering target at least partially overlap as viewed in plan at the second position. The second sputtered particle is screened in the case where the object of processing not having the first film formed on the object of processing is at the second position.
    Type: Application
    Filed: September 9, 2010
    Publication date: September 15, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira Ishiguro, Masakazu Sawano, Ryota Yoshioka, Kazuhiko Komatsu
  • Patent number: 5208629
    Abstract: According to this invention, illumination light for illuminating a mask on which a micropattern is drawn is inclined at an angle corresponding to a numerical aperture of an optical projection lens located below the mask with respect to an optical axis. The illumination light is obliquely incident on the mask to expose the micropattern on an object located below the optical projection lens.
    Type: Grant
    Filed: April 3, 1992
    Date of Patent: May 4, 1993
    Assignee: Nippon Telegraph & Telephone Corporation
    Inventors: Seitaro Matsuo, Yoshinobu Takeuchi, Kazuhiko Komatsu, Emi Tamechika, Katsuhiro Harada, Yoshiaki Mimura, Toshiyuki Horiuchi