Patents by Inventor Kazuhiko Ohashi

Kazuhiko Ohashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7190982
    Abstract: In the present radio frequency device, a radio frequency circuit part and a transmission line are disposed on the top surface of a circuit board on the surface of which a ground pattern is provided, and a metal shielding cap is fixed to the circuit board so as to cover the radio frequency circuit part and the transmission path. The metal shielding cap includes: a top plate disposed above the radio frequency circuit part and substantially parallel to the circuit board; a grounded side wall being provided so as to hang down from a part of an edge of the top plate, having a spring property and being joined to the ground pattern of the circuit board, and a side wall is open except for the grounded side wall.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: March 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kouki Yamamoto, Noriyuki Yoshikawa, Kazuhiko Ohashi
  • Patent number: 6849934
    Abstract: A dielectric film for a printed wiring board that has excellent heat resistance, moisture resistance, insulation properties, adhesiveness, ease of handling, ease of processing, and the like, and possesses low elasticity and high elongation as stress relief functions. The dielectric film has drawn porous polytetrafluoroethylene used as the base material; this is impregnated with an adhesive or fusible resin; the post-solidification tensile modulus of elasticity is 0.1 to 1.8 GPa; and the tensile elongation at break (at 25° C.) is at least 4.0%. A semiconductor device, comprising a multilayer printed board having a plurality of circuit layers, and a semiconductor element mounted on the multilayer printed board, this semiconductor device having an insulating/adhesive layer with a stress relief function between the outermost circuit layer of the multilayer board on the side of the semiconductor element, and the circuit layer adjacent thereto; and the insulating/adhesive layer is formed from the dielectric film.
    Type: Grant
    Filed: March 5, 2003
    Date of Patent: February 1, 2005
    Assignee: Japan Gore-Tex, Inc.
    Inventors: Makoto Ogawa, Akira Urakami, Kazuhiko Ohashi
  • Publication number: 20040156178
    Abstract: In the present radio frequency device, a radio frequency circuit part and a transmission line are disposed on the top surface of a circuit board on the surface of which a ground pattern is provided, and a metal shielding cap is fixed to the circuit board so as to cover the radio frequency circuit part and the transmission path. The metal shielding cap includes: a top plate disposed above the radio frequency circuit part and substantially parallel to the circuit board; a grounded side wall being provided so as to hang down from a part of an edge of the top plate, having a spring property and being joined to the ground pattern of the circuit board, and a side wall is open except for the grounded side wall.
    Type: Application
    Filed: January 27, 2004
    Publication date: August 12, 2004
    Inventors: Kouki Yamamoto, Noriyuki Yoshikawa, Kazuhiko Ohashi
  • Publication number: 20030219588
    Abstract: A dielectric film for a printed wiring board that has excellent heat resistance, moisture resistance, insulation properties, adhesiveness, ease of handling, ease of processing, and the like, and possesses low elasticity and high elongation as stress relief functions. The dielectric film has drawn porous polytetrafluoroethylene used as the base material; this is impregnated with an adhesive or fusible resin; the post-solidification tensile modulus of elasticity is 0.1 to 1.8 GPa; and the tensile elongation at break (at 25° C.) is at least 4.0%.
    Type: Application
    Filed: March 5, 2003
    Publication date: November 27, 2003
    Inventors: Makoto Ogawa, Akira Urakami, Kazuhiko Ohashi
  • Publication number: 20030020178
    Abstract: An IC chip bonding sheet having adhesive resin layers formed on both faces of a porous polytetrafluoroethylene layer comprising a porous polytetrafluoroethylene sheet, the porous polytetrafluoroethylene layer retaining porous voids, and the adhesive resin layers comprising a bromine-free flame retardant resin composition.
    Type: Application
    Filed: June 19, 2002
    Publication date: January 30, 2003
    Inventors: Kazuhiko Ohashi, Osamu Yokomizo, Koji Yoshida
  • Patent number: 5693530
    Abstract: A novel nucleotide sequence in the genome of Marek's disease virus (MDV) containing an open reading frame, whose expression is associated with lytic infection and tumor cell development in MDV-infected cells, is described. Also described is the use of this novel sequence for molecular diagnostics of serotype 1 MDV; and to generate a recombinant MDV by inserting one or more endogenous or exogenous genes, operably linked to a control element for expression, into a region of the MDV genome comprising the novel nucleotide sequence, wherein the insertion interrupts expression of the open reading frame.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 2, 1997
    Assignee: Cornell Research Foundation, Inc.
    Inventors: Karel A. Schat, Kazuhiko Ohashi, Priscilla H. O'Connell
  • Patent number: 5580618
    Abstract: A liquid crystal-containing precursor for a liquid crystal display device consisting of a porous polytetrafluoroethylene film which has the structure defining the pores treated with a hydrophilic substance. The pores of the treated porous film are substantially filled with liquid crystals. The hydrophilizing treatment increases the transition speed of the liquid crystals from light-scattering orientation to light-transmitting orientation. The liquid crystal-filled film can be covered with transparent non-porous layers of material, having an electrically-conductive film on at least one surface, which can be hermetically sealed at the edges, to permit long-term storage of the liquid crystals in ready-to-use sheet form and easy inclusion into a liquid crystal display device.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: December 3, 1996
    Assignee: Japan Gore-Tex, Inc.
    Inventors: Kouichi Okino, Kazuhiko Ohashi, Sunao Fukutake
  • Patent number: 5515517
    Abstract: A data processing device with a test circuit has a plurality of macro blocks, a common bus for transferring the output of one of the macro blocks to the other macro blocks, and a tri-state buffer incorporated into each macro block. A bus control circuit selects the tri-state buffer in a normal operation mode in which the device performs its normal functions, in order to transfer the information stored in the macro block corresponding to the tri-state buffer selected by the bus control circuit to the common bus. A selecting control circuit, which includes a selector, an AND gate, and a flip-flop (F/F), is used for selecting the tri-state buffer in a test operation mode which the device has entered, then for transferring the information stored in the macro block corresponding to the tri-state buffer selected by the selecting control circuit to the common bus. A F/F is provided for setting the device in either the normal operation mode or the test operation mode.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: May 7, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuyuki Nozuyama, Kazuhiko Ohashi
  • Patent number: 5473118
    Abstract: A printed circuit board assembly having a coverlay film which is a composite film consisting of a porous fluoropolymer film coated with a thermoplastic or heat-curing adhesive is disclosed. The coverlay film has excellent conformability and adhesion to the printed circuit board and low dielectric constant.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: December 5, 1995
    Assignee: Japan Gore-Tex, Inc.
    Inventors: Sunao Fukutake, Kazuhiko Ohashi, Akira Urakami
  • Patent number: 5412258
    Abstract: An integrated circuit testing device, including a small test signal generator for generating a small test signal having a small amplitude corresponding to a test signal supplied to an input terminal of a target integrated circuit to be tested; a test signal supply circuit for amplifying the small test signal generated from the small test signal generator to obtain the test signal having a predetermined power and timing, and for supplying the test signal to the input terminal of the target integrated circuit to be tested; and a controller for setting a rise time of the test signal and a fall time of the test signal at a predetermined time by adjusting the amount of power of the test signal supplied from the test signal supply circuit.
    Type: Grant
    Filed: November 22, 1991
    Date of Patent: May 2, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshikazu Ogawa, Kazuhiko Ohashi
  • Patent number: 5398252
    Abstract: An integrated circuit tester uses the information compared between a test executed result and an expected value, for the operation of a driver, which applies test patterns to a device under test. Once a test executed result obtained from the device is compared with an expected value, the compared information is fedback to the driver so as to specify, for example, test cycles and test patterns. Therefore, in an evaluation of maximum operating frequencies, the failure which occurs in the (n+1)th lower frequency can be effectively observed without being masked by other failures which occur in the nth lower frequency or less.
    Type: Grant
    Filed: November 20, 1991
    Date of Patent: March 14, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuhiko Ohashi
  • Patent number: 5294487
    Abstract: A composite material comprising a porous polymeric material bonded to a silicone resin substrate with a silicone-based adhesive agent, wherein only part of the pores of said porous material in the thickness direction thereof contain said silicone-based adhesive agent.
    Type: Grant
    Filed: February 10, 1993
    Date of Patent: March 15, 1994
    Assignee: Japan Gore-Tex, Inc.
    Inventors: Kazuhiko Ohashi, Sunao Fukutake
  • Patent number: 5252383
    Abstract: A carrier sheet for printed circuits and semiconductor chips having enhanced adhesion of conductive metal layers to a fluororesin surface resulting from rendering the fluororesin surface hydrophilic by a hydrophilic macromolecule before plating the metal onto the surface.
    Type: Grant
    Filed: June 29, 1992
    Date of Patent: October 12, 1993
    Assignee: Japan Gore-Tex, Inc.
    Inventors: Sunao Fukutake, Kazuhiko Ohashi, Takayuki Wani
  • Patent number: 5190813
    Abstract: A platinum or platinum-alloy plated porous fluoropolymer membrane where the plated metal adheres to the membrane through a coating of a cation-exchange material on the membrane.
    Type: Grant
    Filed: July 20, 1992
    Date of Patent: March 2, 1993
    Assignee: W. L. Gore & Associates, Inc.
    Inventors: Kazuhiko Ohashi, Hiroshi Kato, Takayuki Wani
  • Patent number: 5191281
    Abstract: An IC tester correctly carries out a function test on an integrated circuit (IC). The IC tester selects one of two strobe position signals depending on whether an expected value is for testing a rise or a fall of an output signal of the tested IC, and compares the expected value with the output signal at a proper timing specified by the selected strobe position signal. The IC tester avoids an error of test due to a deviation between the positions of the rise and fall of the output signal of the tested IC.
    Type: Grant
    Filed: August 20, 1991
    Date of Patent: March 2, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuhiko Ohashi
  • Patent number: 5188890
    Abstract: A metallized porous fluorinated polymer in which at least the inside surfaces are coated with a hydrophilic fluorinated polymer and the surface of the hydrophilic polymer coated with a metal film and a process for its manufacture.
    Type: Grant
    Filed: September 30, 1991
    Date of Patent: February 23, 1993
    Assignee: Japan Gore-Tex, Inc.
    Inventors: Kazuhiko Ohashi, Hiroshi Kato, Takayuki Wani