Patents by Inventor Kazuhiro Inoue
Kazuhiro Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11953665Abstract: An imaging apparatus includes a first reflection optical system and a second reflection optical system having mutually different optical axes, each of the first and second reflection optical systems includes a plurality of reflecting surfaces, a first imaging portion configured to receive an imaging light reflected by the first reflection optical system, a second imaging portion configured to receive an imaging light reflected by the second reflection optical system, a first member, a second member, and a frame. A part of the plurality of reflecting surfaces of the first reflection optical system are reflecting surfaces provided on the frame. Among the plurality of reflecting surfaces of the first reflection optical system, a final-stage reflecting surface configured to reflect the imaging light toward the first imaging portion is a first reflecting surface formed on a surface of the first member.Type: GrantFiled: September 29, 2020Date of Patent: April 9, 2024Assignee: Canon Kabushiki KaishaInventors: Naoto Fuse, Chiaki Inoue, Ichiro Kanazashi, Atsushi Takata, Kazuhiro Kochi, Kouga Okada
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Publication number: 20240079517Abstract: A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer located on the substrate, and a p-side nitride semiconductor layer located on the n-side nitride semiconductor layer, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; a first protective layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer; and a current diffusion layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the area inside of the peripheral portion. The current diffusion layer does not overlap the first protective layer in a top view.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Applicant: NICHIA CORPORATIONInventors: Shun KITAHAMA, Yoshiki INOUE, Kazuhiro NAGAMINE, Junya NARITA
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Patent number: 11901401Abstract: A semiconductor device that includes a semiconductor substrate; a first capacitance section on the semiconductor substrate, the first capacitance section including a first electrode layer, a first dielectric layer, and a second electrode layer; a second capacitance section on the semiconductor substrate, the second capacitance section including a third electrode layer, a second dielectric layer, and a fourth electrode layer; a first external electrode; a second external electrode; a first lead wire led out from the first capacitance section to the first external electrode and having an inductance L1; and a second lead wire led out from the second capacitance section to the second external electrode and having an inductance L2, wherein an electrostatic capacity C1 of the first capacitance section and an electrostatic capacity C2 of the second capacitance section are different, and L1/L2=0.8 to 1.2.Type: GrantFiled: October 8, 2020Date of Patent: February 13, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Koichi Nishita, Masaki Takeuchi, Yutaka Takeshima, Kazuhiro Inoue
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Patent number: 11867737Abstract: According to one embodiment, a detection apparatus includes a pair of conductors configured to detect an electromagnetic wave occurring due to a discharge phenomenon in a target apparatus, wherein the pair of conductors are arranged in a near field region of the target apparatus in which the electromagnetic wave occurs.Type: GrantFiled: February 28, 2022Date of Patent: January 9, 2024Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiro Inoue, Tetsu Shijo, Yasuhiro Kanekiyo
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Publication number: 20230387094Abstract: A semiconductor device includes a substrate, a light-receiving element, a switching element, a light-emitting element on the switching element, first and second conductive members. The substrate includes first to third metal pads on a front-side thereof. The light-receiving element includes first and second bonding pads on a front-surface thereof. A back-surface of the light-receiving element is connected to the first and second metal pads. The first and second bonding pads each overlap one of the first and second metal pads. The switching element includes front-side and backside electrodes and a control pad. The backside electrode is connected to the third metal pad. The first conductive member is connected to the front-side electrode of the switching element and the first bonding pad of the light-receiving element. The second conductive member is connected to the control pad of the switching element and the second bonding pad of the light-receiving element.Type: ApplicationFiled: March 7, 2023Publication date: November 30, 2023Inventors: Kazuhiro INOUE, Mami FUJIHARA
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Patent number: 11821931Abstract: According to one embodiment, a detection apparatus includes a pair of conductors configured to detect an electromagnetic wave occurring due to a discharge phenomenon in a target apparatus, wherein the pair of conductors are arranged in a near field region of the target apparatus in which the electromagnetic wave occurs.Type: GrantFiled: February 28, 2022Date of Patent: November 21, 2023Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiro Inoue, Tetsu Shijo, Yasuhiro Kanekiyo
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Publication number: 20230076743Abstract: According to one embodiment, a detection apparatus includes a pair of conductors configured to detect an electromagnetic wave occurring due to a discharge phenomenon in a target apparatus, wherein the pair of conductors are arranged in a near field region of the target apparatus in which the electromagnetic wave occurs.Type: ApplicationFiled: February 28, 2022Publication date: March 9, 2023Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kazuhiro INOUE, Tetsu SHIJO, Yasuhiro KANEKIYO
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Publication number: 20220262779Abstract: A semiconductor device includes a light-emitting element, a light-receiving element, an input-side terminal, a first switching element, a first lead and a resin package. The first lead includes a first mount bed and a first output-side terminal, the first switching element being mounted on the first mount bed. The resin package seals the light-emitting element, the light-receiving element, and the first switching element. The resin package includes first and second side surfaces opposite to each other. The input-side terminal protrudes from the first side surface. The first output-side terminal protrudes from the second side surface. The first switching element is sealed at a center between the first and second side surfaces. The first mount bed is arranged in a direction along the second side surface so that a side surface of the first mount bed is positioned between a center of the resin package and the first output-side terminal.Type: ApplicationFiled: September 7, 2021Publication date: August 18, 2022Inventors: Kazuhiro Inoue, Yoshio Noguchi, Atsushi Takeshita, Toshihide Osanai
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Patent number: 11393896Abstract: A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface that face each other in a thickness direction, the first main surface containing a trench; an insulation layer on a surface of the trench; a first electrode layer on the insulation layer; a first dielectric layer on the first electrode layer; and a second electrode layer on the first dielectric layer, in which a thickness (L1) of the insulation layer, a thickness (L2) of the first electrode layer, and a thickness (L4) of the second electrode layer satisfy L1>L2>L4.Type: GrantFiled: November 5, 2020Date of Patent: July 19, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Koichi Nishita, Masaki Takeuchi, Yutaka Takeshima, Kazuhiro Inoue
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Patent number: 11316012Abstract: A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface facing each other in a thickness direction, the first main surface including a trench. The trench has a predetermined depth in the thickness direction and has a substantially wedge shape that has a first side surface and a second side surface that face each other and are not parallel to each other, and a first end surface and a second end surface that face each other and are substantially parallel to each other. The first side surface and the second side surface intersect each other at a line, or extension surfaces of the first side surface and the second side surface extended in the thickness direction intersect each other at a line, and the line extends in a first direction that does not align with a cleavage plane of the semiconductor substrate.Type: GrantFiled: October 14, 2020Date of Patent: April 26, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Koichi Nishita, Masaki Takeuchi, Yutaka Takeshima, Kazuhiro Inoue
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Publication number: 20210226000Abstract: A semiconductor device that includes a semiconductor substrate; a first capacitance section on the semiconductor substrate, the first capacitance section including a first electrode layer, a first dielectric layer, and a second electrode layer; a second capacitance section on the semiconductor substrate, the second capacitance section including a third electrode layer, a second dielectric layer, and a fourth electrode layer; a first external electrode; a second external electrode; a first lead wire led out from the first capacitance section to the first external electrode and having an inductance L1; and a second lead wire led out from the second capacitance section to the second external electrode and having an inductance L2, wherein an electrostatic capacity C1 of the first capacitance section and an electrostatic capacity C2 of the second capacitance section are different, and L1/L2=0.8 to 1.2.Type: ApplicationFiled: October 8, 2020Publication date: July 22, 2021Inventors: Koichi Nishita, Masaki Takeuchi, Yutaka Takeshima, Kazuhiro Inoue
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Publication number: 20210226001Abstract: A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface that face each other in a thickness direction, the first main surface containing a trench; an insulation layer on a surface of the trench; a first electrode layer on the insulation layer; a first dielectric layer on the first electrode layer; and a second electrode layer on the first dielectric layer, in which a thickness (L1) of the insulation layer, a thickness (L2) of the first electrode layer, and a thickness (L4) of the second electrode layer satisfy L1>L2>L4.Type: ApplicationFiled: November 5, 2020Publication date: July 22, 2021Inventors: Koichi Nishita, Masaki Takeuchi, Yutaka Takeshima, Kazuhiro Inoue
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Publication number: 20210226007Abstract: A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface facing each other in a thickness direction, the first main surface including a trench. The trench has a predetermined depth in the thickness direction and has a substantially wedge shape that has a first side surface and a second side surface that face each other and are not parallel to each other, and a first end surface and a second end surface that face each other and are substantially parallel to each other. The first side surface and the second side surface intersect each other at a line, or extension surfaces of the first side surface and the second side surface extended in the thickness direction intersect each other at a line, and the line extends in a first direction that does not align with a cleavage plane of the semiconductor substrate.Type: ApplicationFiled: October 14, 2020Publication date: July 22, 2021Inventors: Koichi Nishita, Masaki Takeuchi, Yutaka Takeshima, Kazuhiro Inoue
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Patent number: 10842211Abstract: The purpose of the present invention is to provide a heat-retaining article exhibiting excellent heat retention. This heat-retaining article (1) is configured so as to be provided with a first sheet (12), a second sheet (13), and a filler material (15) positioned between the first sheet (12) and the second sheet (13), and is characterized by being equipped with a plurality of joining sections (11) for joining the first sheet (12) and the second sheet (13) to one another, and in that the plurality of joining sections (11) are separated from one another and form a dot pattern.Type: GrantFiled: January 12, 2016Date of Patent: November 24, 2020Assignee: GOLDWIN INC.Inventors: Kazuhiro Inoue, Hirotatsu Shibata
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Patent number: 10656524Abstract: A substrate on which exposure processing has not been performed is carried into a placement cooling unit and cooled. The cooled substrate is held and carried out from the placement cooling unit by a transport device. In the case where an exposure device is able to receive the substrate, the substrate that has been carried out from the placement cooling unit is transported to the exposure device by the transport device. In the case where the exposure device is unable to receive the substrate, the substrate that has been carried out from the platform cooling unit is carried into a cooling buffer unit by the transport device. In the cooling buffer unit, a temperature of the substrate is maintained. After the exposure device becomes able to receive the substrate, the substrate is carried out from the cooling buffer unit and transported to the exposure device by the transport device.Type: GrantFiled: July 27, 2017Date of Patent: May 19, 2020Assignee: SCREEN Holdings Co., Ltd.Inventors: Koji Nishiyama, Kazuhiro Inoue
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Patent number: 10615103Abstract: Provided is a semiconductor device according to an embodiment including a first electrode terminal containing copper, a second electrode terminal containing copper, a semiconductor chip provide the first electrode terminal and provided inside the first electrode terminal, a metal member provided on the semiconductor chip, protruding to an outside of the semiconductor chip in at least two directions, electrically connected to the second electrode terminal, and containing copper, and a mold resin surrounding the semiconductor chip.Type: GrantFiled: July 5, 2018Date of Patent: April 7, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Kazuhiro Inoue
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Patent number: 10505260Abstract: An antenna device includes a finite ground plane that includes a linear side, a first conductor plate that faces the finite ground plane and includes a side corresponding to the side of the finite ground plane and having a length of substantially a ? wavelength or less, and a conductor line that includes one end connected to the side of the first conductor plate and the other end short-circuited to one end portion of the side of the finite ground plane. The antenna device further includes a second conductor plate that faces the finite ground plane, includes a side corresponding to the side of the finite ground plane and having a length of substantially a ? wavelength or less, and is arranged to be adjacent to the first conductor plate to perform capacitive coupling with the first conductor plate and a feed line that includes one end connected to the side of the second conductor plate and the other end connected to the other end portion of the side of the finite ground plane.Type: GrantFiled: September 9, 2016Date of Patent: December 10, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kazuhiro Inoue, Takafumi Ohishi, Makoto Higaki
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Patent number: 10447349Abstract: A wireless communication system includes a first tag installed on a ground outside a track for a running train, the first tag being driven by wirelessly received power, a second tag installed outside a side face of the train and above the first tag, the side face extending in a running direction, the second tag being driven by wirelessly received power, a wireless communicator which is installed in the train and performs wireless communication with the first tag and the second tag, and an antenna which is installed in the train and has a gain in directions of the first tag and the second tag.Type: GrantFiled: July 6, 2017Date of Patent: October 15, 2019Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Takahiro Sekiguchi, Noritaka Deguchi, Tatsuma Hirano, Makoto Higaki, Kazuhiro Inoue
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Publication number: 20190295933Abstract: Provided is a semiconductor device according to an embodiment including a first electrode terminal containing copper, a second electrode terminal containing copper, a semiconductor chip provide the first electrode terminal and provided inside the first electrode terminal, a metal member provided on the semiconductor chip, protruding to an outside of the semiconductor chip in at least two directions, electrically connected to the second electrode terminal, and containing copper, and a mold resin surrounding the semiconductor chip.Type: ApplicationFiled: July 5, 2018Publication date: September 26, 2019Inventor: Kazuhiro Inoue
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Publication number: 20180116317Abstract: The purpose of the present invention is to provide a heat-retaining article exhibiting excellent heat retention. This heat-retaining article (1) is configured so as to be provided with a first sheet (12), a second sheet (13), and a filler material (15) positioned between the first sheet (12) and the second sheet (13), and is characterized by being equipped with a plurality of joining sections (11) for joining the first sheet (12) and the second sheet (13) to one another, and in that the plurality of joining sections (11) are separated from one another and form a dot pattern.Type: ApplicationFiled: January 12, 2016Publication date: May 3, 2018Applicants: GOLDWIN INC., GOLDWIN TECHNICAL CENTER INC.Inventors: Kazuhiro Inoue, Hirotatsu Shibata