Patents by Inventor Kazuhiro Nakai

Kazuhiro Nakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11925507
    Abstract: Provided are an acoustic matching sheet containing the following component (B) in the following component (A), a composition for an acoustic matching layer, an acoustic wave probe, an acoustic wave measurement apparatus, and a method for manufacturing an acoustic wave probe. (A) is at least one of a resin or a rubber; and (B) is at least one of a resin particle or a rubber particle having an acoustic velocity lower than an acoustic velocity of the component (A) and having a number average particle diameter of 1.0 ?m or less.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: March 12, 2024
    Assignee: FUJIFILM Corporation
    Inventors: Kazuhiro Hamada, Yoshihiro Nakai
  • Publication number: 20240069839
    Abstract: An output system includes a terminal device, an image-forming apparatus, and a server device. The terminal device includes an acquirer that acquires content from the server device, a generator that generates job data including a setting for outputting the content based on the acquired content, a transmitter that transmits the job data to the image-forming apparatus, and a reception slip outputter that outputs a reception slip including a reception number corresponding to the generated job data. The image-forming apparatus includes a receiver that receives the job data from the terminal device, and an outputter that outputs the content after executing a job based on the job data corresponding to the reception number when the reception number is input.
    Type: Application
    Filed: August 7, 2023
    Publication date: February 29, 2024
    Inventors: YASUTOMO HAYANO, KOHICHI MURAKAMI, YASUHIRO NAKAI, Masaya ISHIHARA, Kazuhiro YOSHIMOTO, MASAO SAEDA, Tetsuji NISHIJIMA, Kazuma OHWAKI, Akira OKUYAMA, Noriyuki SUZUKI
  • Publication number: 20160091794
    Abstract: A drawing method is to draw a pattern on a substrate. First, cumulative exposure amount distribution data containing a cumulative exposure amount to be applied to each position on the substrate is read. Next, a region R11 and a region R12 on the substrate are specified based on the cumulative exposure amount distribution data. The region R11 is a region where the cumulative exposure amount does not exceed Ma corresponding to a maximum exposure amount capable of being applied to the substrate in one exposure scanning by an exposure apparatus. The region R22 is a region where the cumulative exposure amount exceeds Ma. Then, pattern data containing information about an exposure amount for each position in a region including the region R11 is generated. Further, pattern data containing information about an exposure amount for each position in a region including the region R12 is generated.
    Type: Application
    Filed: September 21, 2015
    Publication date: March 31, 2016
    Inventors: Fumiharu SHIBATA, Yumiko HIRATO, Yasuyuki KOYAGI, Kazuhiro NAKAI
  • Patent number: 8645891
    Abstract: It is an object to generate wiring data while controlling generation of omission of wiring and shortening process time. In order to achieve this object, a device for generating wiring data includes: an error acquiring part that acquires a configuration error of the semiconductor chip relative to a certain reference position and a certain reference angle on the substrate; an area information acquiring part that acquires enclosing area information indicating an enclosing area enclosing the semiconductor chip on the substrate; and a wiring data generating part that generates enclosing area wiring data indicating an enclosing area wiring pattern based on a reference fan-out line established for a reference chip free from a configuration error and being a part of a reference wiring pattern free from faulty wiring. The enclosing area wiring pattern is a part of the connection wiring pattern and covers the enclosing area.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 4, 2014
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Kiyoshi Kitamura, Kazuhiro Nakai
  • Publication number: 20140007033
    Abstract: It is an object to generate wiring data while controlling generation of omission of wiring and shortening process time. In order to achieve this object, a device for generating wiring data includes: an error acquiring part that acquires a configuration error of the semiconductor chip relative to a certain reference position and a certain reference angle on the substrate; an area information acquiring part that acquires enclosing area information indicating an enclosing area enclosing the semiconductor chip on the substrate; and a wiring data generating part that generates enclosing area wiring data indicating an enclosing area wiring pattern based on a reference fan-out line established for a reference chip free from a configuration error and being a part of a reference wiring pattern free from faulty wiring. The enclosing area wiring pattern is a part of the connection wiring pattern and covers the enclosing area.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 2, 2014
    Applicant: DAINIPPON SCREEN MFG. CO., LTD.
    Inventors: Kiyoshi KITAMURA, Kazuhiro NAKAI
  • Patent number: 8300918
    Abstract: Input CAD data and run-length data obtained by performing a RIP process on the input CAD data are acquired. A predetermined conversion process is performed on at least one of the input CAD data and the run-length data to make the data formats of both data comparable and then both data are compared with each other to detect an area having a difference as a defect area in the run-length data. This provides a technique to detect a defect in the run-length data to be used for drawing of a figure before the execution of drawing with a simple structure.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: October 30, 2012
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Ryo Yamada, Itaru Furukawa, Kiyoshi Kitamura, Kazuhiro Nakai
  • Publication number: 20110298595
    Abstract: A technique capable of recognizing a usage state of a power of a user, curbing additionally needed power consumption is provided. Scanning bit stream data containing information regarding scan frequencies and an initial-stage power of each of the frequencies is outputted from an output part, decomposed into data of respective scan frequencies, transformed to time series digital data in an IFFT module, transformed to scanning analog data by D/A transform in an AFE, and transmitted to a power line. Reflected analog data received from the power line is transformed by A/D transform in the AFE, transformed to frequency series reflected spectrum data in the FFT module, and sent to a check part. The check part checks combination of attenuation rates of respective scan frequencies against registered pattern data registered in a pattern correspondence relationship storage part, and outputs a related connection state of an outlet as a checked result.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 8, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kazuhiro NAKAI, Takahiro KAWABE
  • Publication number: 20080244308
    Abstract: Input CAD data and run-length data obtained by performing a RIP process on the input CAD data are acquired. A predetermined conversion process is performed on at least one of the input CAD data and the run-length data to make the data formats of both data comparable and then both data are compared with each other to detect an area having a difference as a defect area in the run-length data. This provides a technique to detect a defect in the run-length data to be used for drawing of a figure before the execution of drawing with a simple structure.
    Type: Application
    Filed: March 11, 2008
    Publication date: October 2, 2008
    Inventors: Ryo YAMADA, Itaru FURUKAWA, Kiyoshi KITAMURA, Kazuhiro NAKAI
  • Patent number: 7076761
    Abstract: A method for creating charged-particle-beam exposure data containing a description of an exposure sequence of character patterns to perform exposure of a charged-particle-beam according to a character projection technique, comprising selecting first or second values as a parameter to transfer one character pattern and then transferring a subsequent character pattern, the first value regarding performance of a shaping deflector which deflects the charged particle beam so that the charged particle beam is applied to an arbitrarily character aperture formed in a CP aperture mask and a character beam having the shape of the character aperture is thereby created, and the second value regarding performance of an objective deflector which deflects the character beam so that the character beam is applied to an arbitrarily position of the deflection region of the specimen, and determining the exposure sequence of the character patterns in the deflection region in accordance with the selected parameter.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: July 11, 2006
    Assignees: Kabushiki Kaisha Toshiba, Dainippon Screen MFG., Co., Ltd.
    Inventors: Ryouichi Inanami, Atsushi Ando, Kazuhiro Nakai, Yoshikazu Ichioka
  • Patent number: 6809755
    Abstract: In a pattern writing apparatus for writing a plurality of pattern blocks of LSI chips which are arrayed on a substrate, provided are a rasterization part (312) for rasterizing LSI data 931, an expansion/contraction rate calculation part 313 for obtaining the expansion/contraction rate of a substrate (9) on the basis of an image from a camera (15a), a data correction part (314) for correcting raster data (932) in accordance with the expansion/contraction rate and a data generation part (315) for generating writing data on the basis of the corrected data. From the writing data generated by the data generation part (315), an array of pattern blocks in which the width of a non-pattern region between adjacent ones of the pattern blocks is changed while the width of each pattern block is maintained is written on the substrate.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: October 26, 2004
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Kazuhiro Nakai
  • Publication number: 20040117757
    Abstract: A method for creating charged-particle-beam exposure data containing a description of an exposure sequence of character patterns to perform exposure of a charged-particle-beam according to a character projection technique, comprising selecting first or second values as a parameter to transfer one character pattern and then transferring a subsequent character pattern, the first value regarding performance of a shaping deflector which deflects the charged particle beam so that the charged particle beam is applied to an arbitrarily character aperture formed in a CP aperture mask and a character beam having the shape of the character aperture is thereby created, and the second value regarding performance of an objective deflector which deflects the character beam so that the character beam is applied to an arbitrarily position of the deflection region of the specimen, and determining the exposure sequence of the character patterns in the deflection region in accordance with the selected parameter.
    Type: Application
    Filed: August 19, 2003
    Publication date: June 17, 2004
    Inventors: Ryouichi Inanami, Atsushi Ando, Kazuhiro Nakai, Yoshikazu Ichioka
  • Patent number: 6717160
    Abstract: A beam direct-writing apparatus for writing a pattern on a semiconductor substrate is provided with a head part for emitting an electron beam for direct writing and a computer for performing a computation. A program is installed in the computer in advance to obtain a path passing through a plurality of writing points on the substrate. The program divides a region (6) dotted with writing points (60) into a plurality of divided regions on the basis of the density of the points contained therein and sets a passing order among a plurality of divided regions by using an algorithm for generating the Hilbert Curve. Subsequently, the program sets a path in each of the divided regions by using a path setting algorithm and subsequently connects the path in one divided region to the path in another divided region according to the passing order, to obtain a final path (74). This allows an efficient beam direct-writing on a substrate (9).
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: April 6, 2004
    Assignee: Dainippon Screen MFG. Co., Ltd.
    Inventors: Kazuhiro Nakai, Yoshihiko Onogawa
  • Publication number: 20030227536
    Abstract: In a pattern writing apparatus for writing a plurality of pattern blocks of LSI chips which are arrayed on a substrate, provided are a rasterization part (312) for rasterizing LSI data 931, an expansion/contraction rate calculation part 313 for obtaining the expansion/contraction rate of a substrate (9) on the basis of an image from a camera (15a), a data correction part (314) for correcting raster data (932) in accordance with the expansion/contraction rate and a data generation part (315) for generating writing data on the basis of the corrected data. From the writing data generated by the data generation part (315), an array of pattern blocks in which the width of a non-pattern region between adjacent ones of the pattern blocks is changed while the width of each pattern block is maintained is written on the substrate.
    Type: Application
    Filed: April 29, 2003
    Publication date: December 11, 2003
    Applicant: DAINIPPON SCREEN MFG. CO., LTD.
    Inventor: Kazuhiro Nakai
  • Publication number: 20030160191
    Abstract: A beam direct-writing apparatus for writing a pattern on a semiconductor substrate is provided with a head part for emitting an electron beam for direct writing and a computer for performing a computation. A program is installed in the computer in advance to obtain a path passing through a plurality of writing points on the substrate. The program divides a region (6) dotted with writing points (60) into a plurality of divided regions on the basis of the density of the points contained therein and sets a passing order among a plurality of divided regions by using an algorithm for generating the Hilbert Curve. Subsequently, the program sets a path in each of the divided regions by using a path setting algorithm and subsequently connects the path in one divided region to the path in another divided region according to the passing order, to obtain a final path (74). This allows an efficient beam direct-writing on a substrate (9).
    Type: Application
    Filed: January 31, 2003
    Publication date: August 28, 2003
    Applicant: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Kazuhiro Nakai, Yoshihiko Onogawa
  • Patent number: 5789504
    Abstract: A process for preparing low molecular weight polytetrafluoroethylene having a melting point of 250.degree. C. to 325.degree. C. comprising polymerizing tetrafluoroethylene in at least one polymerization solvent selected from the group consisting of hydrochlorofluorocarbons, hydrofluorocarbons and perfluorocarbons which have boiling points in the range between -10.degree. C. and 70.degree. C. under constant pressure by the supplement of tetrafluoroethylene. According to this process, the low molecular weight polytetrafluoroethylene which is useful as an additive to various materials is produced in the solvent which has a low ozone destruction factor or does not destroy the ozone, under economically advantageous low pressure which can be controlled safely.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: August 4, 1998
    Assignee: Daikin Industries, Ltd.
    Inventors: Kiyohiko Ihara, Kazuhiro Nakai, Yoshiki Maruya
  • Patent number: 5522254
    Abstract: A knock sensing apparatus for an internal combustion engine which can detect a failure in a knock sensor signal system correctly even when a changeover operation due to hardware is performed at a place between a knock sensor and a band pass filter. In this knock sensing apparatus, the failure detection by a failure detecting circuit for detecting a failure in a signal system from knock sensors is invalidated for a predetermined period after one of the knock sensors has been changed over to the other knock sensor, or one of two kinds of pass bands of a band pass filter has been changed over to the other pass band, to prevent a decrease in failure detection accuracy due to the signal delaying action of the switched capacitor filter.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: June 4, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Koichi Kamabora, Koji Sakakibara, Kazuhiro Nakai, Hirohiko Yamada, Hideaki Ishihara, Haruyasu Sakishita
  • Patent number: 5379350
    Abstract: The present invention provides an improved technique for extracting contours in an image without waiting for processing of all the scanning lines in the image. Run-data on two boundary scanning lines, each representing the boundary coordinates at which the image changes, are stored in a run-data buffer. A contour extraction unit compares two sets of the run-data with one another to extract segment vectors and detect a set of closed-loop vectors defining a contour of a image area. Three registers in a working buffer store specific data representing the relationship between a starting point and a terminal point of each vector sequence and are used in detecting closed-loop vectors. A vector data memory stores vector data including coordinate values of start and end points of closed-loop vectors.
    Type: Grant
    Filed: February 18, 1993
    Date of Patent: January 3, 1995
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Shigeaki Shimazu, Tetsuo Asano, Nobuaki Usui, Kazuhiro Nakai
  • Patent number: 5269271
    Abstract: A speed control apparatus for an engine which is equipped with an air quantity control device for controlling an intake air quantity to the engine when being in an idling state and a speed control device for determining a control amount of the air quantity control device on the basis of the actual engine idle speed. For controlling the engine idle speed, the apparatus comprises a state variable outputting section for outputting the actual engine idle speed, the control amount of the air quantity control device and an ignition timing control amount of an igniter of the engine as state variables representing an internal state of a dynamic model of the engine, a speed deviation accumulating section for accumulating a deviation between the target speed and the actual engine idle speed, and an ignition timing deviation accumulating section for accumulating a deviation between a target ignition timing and the actual ignition timing.
    Type: Grant
    Filed: June 10, 1992
    Date of Patent: December 14, 1993
    Assignee: Nippondenso Co., Ltd.
    Inventors: Katsuhiko Kawai, Kazuhiro Nakai, Hiroshi Ikeda, Yasuhito Takasu
  • Patent number: 5259353
    Abstract: A detecting system for condition of a fuel evaporative emission generated in a fuel tank, includes a pressure sensor and a three-way valve for selectively connecting the pressure sensor to atmosphere and the fuel tank. The pressure sensor is initially communicated with the atmosphere to detect an atmospheric pressure P.sub.a (step 110), and subsequently communicated with the fuel tank to detect an internal pressure P.sub.f of the fuel tank (step 130). Based on the atmospheric pressure P.sub.a and the internal pressure P.sub.f of the fuel tank, an amount EVP of the fuel evaporative emission generated in the fuel tank is derived through a map look-up against a preset map (step 150).
    Type: Grant
    Filed: April 10, 1992
    Date of Patent: November 9, 1993
    Assignee: Nippondenso Co., Ltd.
    Inventors: Kazuhiro Nakai, Akihiro Nakashima, Hisashi Iida
  • Patent number: 5066747
    Abstract: Vinyl ethers having a carboxyl group in a form of salt are stable and is usable as materials for fluorine-containing copolymers. The vinyl ethers can provide stable monomer compositions by mixing with vinyl ethers having a free carboxyl group when the former vinyl ethers are present in an amount of not less than 1% by mole of the latter vinyl ethers. The fluorine-containing copolymer prepared by copolymerizing fluoroolefins with the vinyl ethers are useful as aqueous coatings particularly electro dip coatings.
    Type: Grant
    Filed: September 27, 1990
    Date of Patent: November 19, 1991
    Assignee: Daikin Industries, Ltd.
    Inventors: Tatsushiro Yoshimura, Nobuyuki Tomihashi, Tsutomu Terada, Masayuki Yamana, Kazuhiro Nakai, Takayuki Araki