Patents by Inventor Kazuhiro Toyoda

Kazuhiro Toyoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118842
    Abstract: Self-consumable portions generation techniques from a digital document are described. The self-consumable portions are generated based on a determination of an amount of resources available at a receiver device that is to receive the digital document. Examples of the resources include an amount of memory resources, processing resources, and/or network resources associated with the receiver device. The self-consumable portions, once generated, are separately renderable at the receiver device.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Applicant: Adobe Inc.
    Inventors: Siddharth Kumar Jain, Pratyush Kumar, Naveen Prakash Goel, Kazuhiro Toyoda, Deepak Gilani
  • Publication number: 20160278383
    Abstract: Disclosed is a plant protection agent comprising an amorphous and/or microcrystalline silicon- and phosphorus-containing iron oxide, and a method for controlling plant diseases, comprising the step of applying the plant protection agent.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 29, 2016
    Applicant: NATIONAL UNIVERSITY CORPORATION OKAYAMA UNIVERSITY
    Inventors: Tomonori SHIRAISHI, Kazuhiro TOYODA, Jun TAKADA, Hitoshi KUNOH
  • Patent number: 8508894
    Abstract: A sustained-arc control system is constituted with a capacitance which is placed between a gap on a solar battery array, working to control or inhibit the sustained arc. A solar battery array has a plurality of solar cells to provide a power source onboard an artificial satellite. A plurality of series circuits each of which composed of the solar cells connected in series is connected in parallel. The sustained-arc control system on the solar battery array is constituted with a capacitance lying between a positive line and a negative line to be charged with a voltage oscillation arising from the sustained arc. Electrostatic capacity of the capacitance is in a range of from at least 33 nF to 10 ?F.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: August 13, 2013
    Assignee: Kyusyu Institute of Technology
    Inventors: Kazuhiro Toyoda, Meng Cho, Hikaru Kayano
  • Publication number: 20120314796
    Abstract: A first bit-sequence, which is to be transmitted from a control section to an authentication chip according to an encoding scheme that transmits each one and zero by a pulse with a width of 200 ?sec and 100 ?sec respectively, is converted to a second bit-sequence to be transmitted according to NRZ encoding. The converted second bit-sequence is stored in a register with the MSB of the second bit-sequence aligned in the MSB of the register. Timing to set the pulse width for transmission of a one or zero by NRZ encoding is performed repeatedly, and at the start of each timed interval, the signal transmission level output to the authentication chip is set corresponding to the value of the bit stored in the MSB of the register. After setting the signal transmission level, the register is shifted left one bit.
    Type: Application
    Filed: June 6, 2012
    Publication date: December 13, 2012
    Inventors: Hitomi HORI, Hidetaka Arai, Kazuhiro Toyoda, Hiroyoshi Yamamoto
  • Patent number: 8217936
    Abstract: A method, system, and computer-readable storage medium are disclosed for minimizing tessellation of surfaces. A first plurality of polygons may be generated, wherein the first plurality of polygons are adjacent to a plurality of exterior curves of a surface. Each of the first plurality of polygons comprises at least one outside edge approximating a portion of one of the exterior curves within a first flatness tolerance. A second plurality of polygons may be generated, wherein the second plurality of polygons are on the interior of the surface. Each of the second plurality of polygons comprises a plurality of inside edges approximating portions of interior curves of the surface within a second flatness tolerance. The first flatness tolerance may be smaller than the second flatness tolerance.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: July 10, 2012
    Assignee: Adobe Systems Incorporated
    Inventors: David D. Barnes, Douglas R. Becker, Dennis Kauffman, Kazuhiro Toyoda, Rebecca E. Hauser
  • Publication number: 20120032645
    Abstract: In a battery pack 10 control section 5 low-power mode, a comparator 81 is used to detect the voltage across a 2.5 m? current detection resistor 2 connected in the battery 1 charging and discharging path. When the detected voltage exceeds a voltage (2.4 mV) that is lower than the voltage (50 mV) for detecting a 20 A first over-current in the non-low-power mode, that occurrence is recorded in a register 82. When the register 82 holds occurrence of the voltage being exceeded and when a CTRL signal indicating the load device 20 is in the low-power mode is input to an I/O port 55, the control section 5 CPU 51 detects a second over-current of approximately 1 A, switches OFF the cut-off devices 7, and sends advisory data from a communication section 9 to a control and power source section 21 in the load device 20.
    Type: Application
    Filed: August 3, 2011
    Publication date: February 9, 2012
    Inventors: Shinichi MATSUURA, Kazuhiro Toyoda
  • Publication number: 20110216462
    Abstract: A sustained-arc control system is constituted with a capacitance which is placed between a gap on a solar battery array, working to control or inhibit the sustained arc. A solar battery array has a plurality of solar cells to provide a power source onboard an artificial satellite. A plurality of series circuits each of which composed of the solar cells connected in series is connected in parallel. The sustained-arc control system on the solar battery array is constituted with a capacitance lying between a positive line and a negative line to be charged with a voltage oscillation arising from the sustained arc. Electrostatic capacity of the capacitance is in a range of from at least 33 nF to 10 ?F.
    Type: Application
    Filed: November 11, 2009
    Publication date: September 8, 2011
    Applicant: Kyusyu Institute of Technology
    Inventors: Kazuhiro Toyoda, Meng Cho, Hikaru Kayano
  • Patent number: 7948489
    Abstract: A method, system, and computer-readable storage medium are disclosed for minimizing tessellation of surfaces. A first plurality of polygons may be generated, wherein the first plurality of polygons are adjacent to a plurality of boundaries of a surface. Each of the first plurality of polygons comprises at least one outside edge approximating a straight line within a first flatness tolerance. A second plurality of polygons may be generated, wherein the second plurality of polygons are on the interior of the surface. Each of the second plurality of polygons comprises a plurality of inside edges approximating the straight line within a second flatness tolerance. The first flatness tolerance may be smaller than the second flatness tolerance.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: May 24, 2011
    Assignee: Adobe Systems Incorporated
    Inventors: David D. Barnes, Douglas R. Becker, Dennis Kauffman, Kazuhiro Toyoda
  • Publication number: 20080053979
    Abstract: In a hand warmer, a heat dissipating plate is thermally coupled to a heater that is supplied with current by a battery that is accommodated in a case. The battery is a box-shaped rechargeable battery of a box-shaped rechargeable lithium-ion battery or lithium-polymer battery that has flat surfaces opposed to each other. The heater is a heating element that is opposed to the flat surface of the battery. A shielding plate is arranged between the heating element and the flat surface of the battery. The heat dissipating plate that is thermally coupled to the heating element is secured to the case on the surface side of the case. In the hand warmer, the flat surface of the box-shaped rechargeable battery, the shielding plate and the heat dissipating plate are arranged in a stack structure. The heat dissipating plate is heated by the heating element.
    Type: Application
    Filed: August 10, 2007
    Publication date: March 6, 2008
    Inventors: Shoichi Toya, Masao Yamaguchi, Kazuhiro Toyoda, Koichi Fukukawa, Masayoshi Hattori, Toshiki Nakasho
  • Patent number: 6605922
    Abstract: The battery pack is provided with output terminals and an authenticity discriminating circuit. The authenticity discriminating circuit is not supplied power from the rechargeable battery, nor is it connected to either the rechargeable battery or the output terminals. The authenticity discriminating circuit is provided with a receiver section which receives an activating radio wave from the electrical equipment, a transmitter section which sends an authentication radio wave as a signal to discriminate authenticity when the receiver section receives the activating radio wave, and a power supply section which converts the activating radio wave to direct current to supply electrical power to the receiver section and the transmitter section.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: August 12, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Mikitaka Tamai, Kazuhiro Toyoda
  • Patent number: 6582833
    Abstract: A Ti-base wire rod for forming molten metal excellent both in rod feeding smoothness and arc stability is disclosed. A wire rod 301 is composed of Ti metal, and has in the surficial portion including the surface thereof an oxygen enriched layer having an oxygen concentration higher than that in an inner portion. Ratio Tw/Dw of the thickness Tw of the oxygen enriched layer and the diameter Dw of the wire rod is adjusted within a range of 1×10−3 to 1×10−1, and the average oxygen concentration of the oxygen enriched layer is adjusted to 1 wt % or above.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: June 24, 2003
    Assignee: Daido Tokushuko Kabushiki Kaisha
    Inventors: Kazuhiro Toyoda, Makoto Chujoya, Shigeo Hanajima, Takashi Suzuki, Takashi Orii, Takao Shimizu, Toshiharu Noda, Bunji Naito, Kohachiro Ohashi
  • Publication number: 20030102842
    Abstract: The battery pack is provided with output terminals and an authenticity discriminating circuit. The authenticity discriminating circuit is not supplied power from the rechargeable battery, nor is it connected to either the rechargeable battery or the output terminals. The authenticity discriminating circuit is provided with a receiver section which receives an activating radio wave from the electrical equipment, a transmitter section which sends an authentication radio wave as a signal to discriminate authenticity when the receiver section receives the activating radio wave, and a power supply section which converts the activating radio wave to direct current to supply electrical power to the receiver section and the transmitter section.
    Type: Application
    Filed: November 26, 2002
    Publication date: June 5, 2003
    Inventors: Mikitaka Tamai, Kazuhiro Toyoda
  • Publication number: 20030084969
    Abstract: A Ti-base wire rod for forming molten metal excellent both in rod Seeding smoothness and arc stability is disclosed. A wire rod 301 is composed of Ti metal, and has in the surficial portion including the surface thereof an oxygen enriched layer having an oxygen concentration higher than that in an inner portion. Ratio Tw/Dw of the thickness Tw of the oxygen enriched layer and the diameter Dw of the wire rod is adjusted within a range from 1×10−3 to 1×10−1, and the average oxygen concentration of the oxygen enriched layer is adjusted to 1 wt % or above.
    Type: Application
    Filed: July 11, 2002
    Publication date: May 8, 2003
    Applicant: Daido Tokushuko Kabushiki Kaisha
    Inventors: Kazuhiro Toyoda, Makoto Chujoya, Shigeo Hanajima, Takashi Suzuki, Takashi Orii, Takao Shimizu, Toshiharu Noda, Bunji Naito, Kohachiro Ohashi
  • Patent number: 6538234
    Abstract: Gas shielded arc welding is performed using gas nozzle 10 which includes a straight portion 14 that permits the shielding gas flows from orifices 18 to flow parallel to the axial direction and a constricted portion 20 continuous from the straight portion 14 that constricts the gas flows from the straight portion 14 as they travel toward the distal end and the nozzle 10 satisfies the following relations (1) and (2): 1.5≦(Dp/Do)≦2.5  (1) 1.0≦(L/Dp)  (2) where Dp is the inside diameter of the straight portion 14, Do is the inside diameter of the distal gas outlet of the constricted portion 20, and L is the axial length of the constricted portion 20.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: March 25, 2003
    Assignee: Daido Tokushuko Kabushiki Kaisha
    Inventors: Kazuhiro Toyoda, Noboru Yamamoto, Shigeo Hanajima
  • Publication number: 20020017504
    Abstract: Gas shielded arc welding is performed using gas nozzle 10 which comprises a straight portion 14 that permits the shielding gas flows from orifices 18 to flow parallel to the axial direction and a constricted portion 20 continuous from the straight portion 14 that constricts the gas flows from the straight portion 14 as they travel toward the distal end and the nozzle 10 satisfies the following relations (1) and (2):
    Type: Application
    Filed: July 3, 2001
    Publication date: February 14, 2002
    Applicant: Daido Tokushuko Kabushiki Kaisha
    Inventors: Kazuhiro Toyoda, Noboru Yamamoto, Shigeo Hanajima
  • Patent number: 6207219
    Abstract: A method for manufacturing a thin-film solar cell substrate of group IB, IIIB and VIB elements of the Periodic Table, by using an apparatus for depositing selenium (Se) on the thin-film solar cell substrate. The apparatus has a base with gas inlet and outlet pipes. A bell jar is placed on top of the base with an O-ring interposed between them. A thin-film solar cell precursor and Se powder are placed in a recess formed in a lower heating jig, and the lower heating jig is positioned on the base. An upper heating jig is placed on top of the lower heating jig. The upper heating jig is vertically moved by a vertically actuating mechanism. The upper and lower heating jigs are heated under vacuum so as to diffuse Se to the thin-film solar cells, whereby a CuInSe2 alloy film is formed.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: March 27, 2001
    Assignee: Yazaki Corporation
    Inventors: Takeshi Ikeya, Kenji Sato, Kazuhiro Toyoda, Takeshi Kamiya
  • Patent number: 6036822
    Abstract: A base is provided with a gas outlet pipe and a gas inlet pipe. A bell jar is placed on top of the base with an O-ring interposed between them. Thin-film solar cells and a Se powder are placed in a recess formed in a lower heating jig, and the lower heating jig is positioned on the base. An upper heating jig is placed on top of the lower heating jig. The upper heating jig is vertically moved by a vertically actuating mechanism. The upper and lower heating jigs are heated with a heater so as to react Se with the thin-film solar cells, whereby a CuInSe.sub.2 alloy film is formed. In a method of manufacturing a thin-film solar cell, a molybdenum layer and a copper layer are formed on a substrate by sputtering. A selenium-dispersed indium layer is formed on the copper layer in a solution, which includes indium ions and dispersed selenium colloid, by electrodeposition. The thus formed selenium-dispersed indium layer and the selenium are heated in a sealed container.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: March 14, 2000
    Assignee: Yazaki Corporation
    Inventors: Takeshi Ikeya, Kenji Sato, Kazuhiro Toyoda, Takeshi Kamiya
  • Patent number: 5935324
    Abstract: An apparatus for forming I-III-VI.sub.2 thin-film layers has a reaction chamber made of a carbon material in which a precursor for forming a I-III-VI.sub.2 thin-film layer and a vapor source of an element of group VI of the periodic table are placed. The precursor and vapor source are heated under vacuum to form the I-III-VI.sub.2 thin-film layer. The reaction chamber is divided into a reaction compartment A having the precursor placed therein and a reaction compartment B having the vapor element of group IV placed therein. A communication channel C is provided between the reaction compartments A and B, and a heating unit controlled by a temperature control unit is provided exterior to each of the reaction compartments A and B.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: August 10, 1999
    Assignee: Yazaki Corporation
    Inventors: Shinnichi Nakagawa, Kenji Sato, Masami Nakamura, Kazuhiro Toyoda, Takeshi Kamiya, Kazue Suzuki, Hiroki Ishihara, Takeshi Ikeya, Masaharu Ishida
  • Patent number: 5772431
    Abstract: A base is provided with a gas outlet pipe and a gas inlet pipe. A bell jar is placed on top of the base with an O-ring interposed between them. Thin-film solar cells and a Se powder are placed in a recess formed in a lower heating jig, and the lower heating jig is positioned on the base. An upper heating jig is placed on top of the lower heating jig. The upper heating jig is vertically moved by a vertically actuating mechanism. The upper and lower heating jigs are heated with a heater so as to react Se with the thin-film solar cells, whereby a CuInSe.sub.2 alloy film is formed. In a method of manufacturing a thin-film solar cell, a molybuden layer and a copper layer are formed on a substrate by sputtering. A selenium-dispersed indium layer is formed on the copper layer in a solution, which includes indium ions and dispersed selenium colloid, by electrodeposition. The thus formed selenium-dispersed indium layer and the selenium are heated in a sealed container.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: June 30, 1998
    Assignee: Yazaki Corporation
    Inventors: Takeshi Ikeya, Kenji Sato, Kazuhiro Toyoda, Takeshi Kamiya
  • Patent number: 4815037
    Abstract: A bipolar type static memory cell comprising two cross connected circuits, each of the circuits including a transistor and a load element is disclosed. An N-type epitaxial layer, grown on an N.sup.+ -type buried layer, is used as a collector region of the transistor, and a P-type layer formed in the N-type epitaxial layer and an N.sup.+ -type layer formed in the P-type layer are used as a base region and an emitter region of the transistor. A P-type diffusion layer is formed in the N-type epitaxial layer from the surface of the epitaxial layer to reach and contact the buried layer. The structure results in the memory cell parasitic diodes being effectively eliminated from the cell together with the unwanted charge storage effects of the diodes.
    Type: Grant
    Filed: November 3, 1983
    Date of Patent: March 21, 1989
    Assignee: Fujitsu Limited
    Inventors: Kazuhiro Toyoda, Chikai Ono