Patents by Inventor Kazuhiro Yamashita

Kazuhiro Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230358357
    Abstract: An objective of the present invention is to provide a pipe through which fluids can flow, in which thermal insulation in a space between an inner wall and an outer wall is achieved at low cost and high performance. The thermal insulation pipe of the present invention is a thermal insulation pipe formed by a double wall pipe of an inner pipe and an outer pipe. A thermal-insulating material to be filled in a space between the inner pipe and the outer pipe is made from an aerogel having a three-dimensional network structure with a framework constituted by a cluster of aggregation of primary particles. The thermal-insulating material includes fine particles having a three-dimensional network structure with a framework of the primary particles.
    Type: Application
    Filed: September 21, 2021
    Publication date: November 9, 2023
    Inventors: Rudder WU, Kuan-I LEE, Kazuhiro MATSUZAKI, Hironobu SASAYAMA, Yukihisa MATSUO, Shogo YAMASHITA
  • Publication number: 20230334693
    Abstract: An information processing apparatus 20 including: a storage section 210 storing relationship information in which a spatial relationship among feature points included in a plurality of target objects is associated with meaning information among the plurality of target objects; and a meaning estimation section 238 estimating, based on a spatial relationship among feature points extracted from a plurality of image objects included in an image and the relationship information, a meaning relationship among the plurality of image objects.
    Type: Application
    Filed: August 2, 2021
    Publication date: October 19, 2023
    Inventors: Yasushi MIYAJIMA, Shingo YAMASHITA, Kazuhiro IGARASHI
  • Patent number: 11791594
    Abstract: An electric wire with a terminal described herein includes a shielded electric wire 11 and an inner conductive member 20. The shielded electric wire 11 includes a covered wire 12 including a core wire 13 through which a signal for communication is transmitted and an insulation cover 14 that has insulation property and covers the core wire 13, a shielding portion 15 having electric conductive property and covering an outer periphery of the covered wire 12, and a sheath 16 covering an outer periphery of the shielding portion 15. The inner conductive member 20 is connected to the covered wire 12. The covered wire 12 has an end portion close to the inner conductive member 20 and the end portion is an uncovered portion 17 that is not covered with the sheath 16 and the shielding portion 15. The uncovered portion 17 is covered with an impedance adjustment member 80 that has electric conductive property.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: October 17, 2023
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroyoshi Maesoba, Toshifumi Ichio, Kazuhiro Yoshida, Masanao Yamashita
  • Patent number: 11785774
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: October 10, 2023
    Assignee: KIOXIA CORPORATION
    Inventors: Keiichi Sawa, Kazuhiro Matsuo, Kazuhisa Matsuda, Hiroyuki Yamashita, Yuta Saito, Shinji Mori, Masayuki Tanaka, Kenichiro Toratani, Atsushi Takahashi, Shouji Honda
  • Publication number: 20230309310
    Abstract: A semiconductor device of embodiments includes: a semiconductor layer containing silicon (Si); a first insulating layer provided in a first direction of the semiconductor layer; a second insulating layer surrounded by the semiconductor layer in a first cross section perpendicular to the first direction and containing silicon (Si) and oxygen (O); a third insulating layer surrounded by the second insulating layer in the first cross section and containing a metal element and oxygen (O); and a conductive layer surrounded by the first insulating layer in a second cross section perpendicular to the first direction, provided in the first direction of the third insulating layer, and spaced from the semiconductor layer.
    Type: Application
    Filed: September 9, 2022
    Publication date: September 28, 2023
    Applicant: Kioxia Corporation
    Inventors: Yuta SAITO, Shinji MORI, Hiroyuki YAMASHITA, Satoshi NAGASHIMA, Kazuhiro MATSUO, Kota TAKAHASHI, Shota KASHIYAMA, Keiichi SAWA, Junichi KANEYAMA
  • Patent number: 11751397
    Abstract: In one embodiment, a semiconductor storage device includes a stacked body in which a plurality of conducting layers are stacked through a plurality of insulating layers in a first direction, a semiconductor layer penetrating the stacked body, extending in the first direction and including metal atoms, and a memory film including a first insulator, a charge storage layer and a second insulator that are provided between the stacked body and the semiconductor layer. The semiconductor layer surrounds a third insulator penetrating the stacked body and extending in the first direction, and at least one crystal grain in the semiconductor layer has a shape surrounding the third insulator.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: September 5, 2023
    Assignee: Kioxia Corporation
    Inventors: Yuta Saito, Shinji Mori, Atsushi Takahashi, Toshiaki Yanase, Keiichi Sawa, Kazuhiro Matsuo, Hiroyuki Yamashita
  • Publication number: 20230152839
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11567526
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: January 31, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Publication number: 20220261031
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: May 5, 2022
    Publication date: August 18, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11347257
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: May 31, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Publication number: 20210240216
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11068016
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: July 20, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Patent number: 11009904
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: May 18, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Patent number: 10958905
    Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: down-convert a moving image in units of structure of pictures (SOPs) divided in a time direction and precedingly execute encoding processing; calculate a target code amount of each processing unit included in the moving image in units of SOPs based on a result of the preceding encoding processing and calculate a temporal buffer position in a case where the encoding processing is executed on each processing unit based on the calculated target code amount; and calculate an error between an actual transmission buffer position and a temporal buffer position each time when the encoding processing is executed on each processing unit in the moving image in units of SOPs and correct a target code amount of each processing unit on which the encoding processing has not been executed yet.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: March 23, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Xuying Lei, Hidenobu Miyoshi, Shunsuke Kobayashi, Kazuhiro Yamashita
  • Patent number: 10907366
    Abstract: A concrete vibrator can automatically change the rotational speed of a motor depending on the state of a vibrating tube. Under control by a controller, the concrete vibrator is operated in a normal mode in which the motor is supplied with driving power having a frequency to make the motor rotate at a rotational speed suitable for air bubble removal, or in an idling mode in which the motor is supplied with driving power having a frequency to make the motor rotate at a lower rotational speed than in the normal mode. The controller measures, per unit of time, a value of a current that is input to the controller or motor, compares a latest current value to a reference value calculated based on a past measurement value, and compares an absolute value of the comparison value to a threshold to grasp the state of the vibrating tube.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: February 2, 2021
    Assignee: MIKASA SANGYO CO., LTD.
    Inventors: Sadahisa Suzuki, Shinji Ueda, Hirotaka Ushijima, Kazuhiro Yamashita, Masaki Suzuki, Tomokazu Ando
  • Publication number: 20200356132
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 12, 2020
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Publication number: 20200252607
    Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: down-convert a moving image in units of structure of pictures (SOPs) divided in a time direction and precedingly execute encoding processing; calculate a target code amount of each processing unit included in the moving image in units of SOPs based on a result of the preceding encoding processing and calculate a temporal buffer position in a case where the encoding processing is executed on each processing unit based on the calculated target code amount; and calculate an error between an actual transmission buffer position and a temporal buffer position each time when the encoding processing is executed on each processing unit in the moving image in units of SOPs and correct a target code amount of each processing unit on which the encoding processing has not been executed yet.
    Type: Application
    Filed: January 29, 2020
    Publication date: August 6, 2020
    Applicant: FUJITSU LIMITED
    Inventors: XUYING LEI, Hidenobu MIYOSHI, Shunsuke Kobayashi, KAZUHIRO YAMASHITA
  • Publication number: 20200141135
    Abstract: Provided is a concrete vibrator capable of automatically changing the rotational speed of a motor depending on the state of a vibrating tube and suitably avoiding overheating of the motor and a failure due to the motor overheating. Under control of control means 8, the concrete vibrator is operated in a normal mode in which a motor 2 is supplied with driving power having a frequency that can make the motor 2 rotate at a rotational speed suitable for an air bubble removing process, or in an idling mode in which the motor 2 is supplied with driving power having a frequency that can make the motor 2 rotate at a rotational speed lower than the rotational speed in the normal mode.
    Type: Application
    Filed: April 27, 2018
    Publication date: May 7, 2020
    Applicant: MIKASA SANGYO CO., LTD.
    Inventors: Sadahisa SUZUKI, Shinji UEDA, Hirotaka USHIJIMA, Kazuhiro YAMASHITA, Masaki SUZUKI, Tomokazu ANDO
  • Patent number: 9955172
    Abstract: A video data processing device includes: a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute: making, on the basis of first key frames obtained by encoding images in frames included in moving image data, difference frames in each of which a partial image different from an image in a frame corresponding to each first key frame is encoded; and generating, if the number of generated difference frames reaches a first number, in response to detection that a difference between a difference frame generated thereafter and a difference frame preceding in time to the difference frame generated thereafter is not larger than a given value, a second key frame distinguished from the first key frames and obtained by encoding an image in the frame.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: April 24, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Yousuke Yamaguchi, Shunsuke Kobayashi, Kazuhiro Yamashita, Yasuo Misuda
  • Publication number: 20180054202
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: August 16, 2017
    Publication date: February 22, 2018
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA