Patents by Inventor Kazuhiro Yamashita

Kazuhiro Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12268738
    Abstract: Provided is a liquid formulation of a six combined vaccine containing DPT-IPV-Hib-HBs, in which a HBs antigen is stably adsorbed and retained to an aluminum adjuvant, and PRP as a Hib antigen is stably coupled and retained to a carrier protein.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: April 8, 2025
    Assignee: KM BIOLOGICS CO., LTD.
    Inventors: Shun Yamashita, Tatsuya Shirai, Kazuhiro Daimon, Tomohiro Minoda, Shinji Akasaki, Kanae Ishikawa, Haruna Iwata
  • Publication number: 20250031474
    Abstract: To provide a technique for improving image quality. A light detection apparatus includes: a semiconductor layer including a first surface and a second surface mutually positioned on opposite sides in a thickness direction; a plurality of photoelectric conversion regions provided on the semiconductor layer so as to be adjacent to each other via a separation region that stretches in the thickness direction of the semiconductor layer; a transistor provided for each of the photoelectric conversion regions on the side of the first surface of the semiconductor layer; and a transparent electrode which is provided on the side of the second surface of the semiconductor layer and to which a potential is applied. In addition, the separation region includes a conductor which stretches in the thickness direction of the semiconductor layer and the conductor is electrically connected on the side of the second surface of the semiconductor layer to the transparent electrode.
    Type: Application
    Filed: November 28, 2022
    Publication date: January 23, 2025
    Inventors: TAKAFUMI MORIKAWA, KENGO NAGATA, TOMOMI ITO, ATSUSHI MASAGAKI, KAZUYOSHI YAMASHITA, SHOTA MATSUYAMA, AKIRA DAICHO, KAZUHIRO YONEDA, JUNICHI MATSUO, YUTA NAKAMOTO, HIROSHI FUKUNAGA, KYOSUKE ITO, YUSUKE OTAKE, TOSHIFUMI WAKANO
  • Patent number: 12152325
    Abstract: A dry-laid nonwoven fabric production method may include: affixing resin particles including polymeric molecules to a plurality of first fibers; applying an external force to the plurality of first fibers to which the plurality of resin particles are affixed so as to reduce gaps between the first fibers; relieving the applied external force to form in gas, from the plurality of resin particles, second fibers each having an outer diameter smaller than that of the first fiber and the outer diameter of each of the second fibers have a value in a range from 30 nm to 1.0 ?m; and forming a nonwoven fabric that is a fiber composite including the first fibers and the second fibers.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: November 26, 2024
    Assignee: Daicel Corporation
    Inventors: Takuya Osaka, Hiroaki Shintani, Tatsuya Higashigaki, Chihiro Tanaka, Yuki Tsukamoto, Kazuhiro Yamashita
  • Publication number: 20240328048
    Abstract: A dry-laid nonwoven fabric production method may include: affixing resin particles including polymeric molecules to a plurality of first fibers; applying an external force to the plurality of first fibers to which the plurality of resin particles are affixed so as to reduce gaps between the first fibers; relieving the applied external force to form in gas, from the plurality of resin particles, second fibers each having an outer diameter smaller than that of the first fiber and the outer diameter of each of the second fibers have a value in a range from 30 nm to 1.0 ?m; and forming a nonwoven fabric that is a fiber composite including the first fibers and the second fibers.
    Type: Application
    Filed: November 26, 2021
    Publication date: October 3, 2024
    Applicant: Daicel Corporation
    Inventors: Takuya OSAKA, Hiroaki SHINTANI, Tatsuya HIGASHIGAKI, Chihiro TANAKA, Yuki TSUKAMOTO, Kazuhiro YAMASHITA
  • Publication number: 20240152173
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 9, 2024
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11907003
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: February 20, 2024
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Publication number: 20230152839
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11567526
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: January 31, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Publication number: 20220261031
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: May 5, 2022
    Publication date: August 18, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11347257
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: May 31, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Publication number: 20210240216
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: April 21, 2021
    Publication date: August 5, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Patent number: 11068016
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: July 20, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Patent number: 11009904
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: May 18, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Patent number: 10958905
    Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: down-convert a moving image in units of structure of pictures (SOPs) divided in a time direction and precedingly execute encoding processing; calculate a target code amount of each processing unit included in the moving image in units of SOPs based on a result of the preceding encoding processing and calculate a temporal buffer position in a case where the encoding processing is executed on each processing unit based on the calculated target code amount; and calculate an error between an actual transmission buffer position and a temporal buffer position each time when the encoding processing is executed on each processing unit in the moving image in units of SOPs and correct a target code amount of each processing unit on which the encoding processing has not been executed yet.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: March 23, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Xuying Lei, Hidenobu Miyoshi, Shunsuke Kobayashi, Kazuhiro Yamashita
  • Patent number: 10907366
    Abstract: A concrete vibrator can automatically change the rotational speed of a motor depending on the state of a vibrating tube. Under control by a controller, the concrete vibrator is operated in a normal mode in which the motor is supplied with driving power having a frequency to make the motor rotate at a rotational speed suitable for air bubble removal, or in an idling mode in which the motor is supplied with driving power having a frequency to make the motor rotate at a lower rotational speed than in the normal mode. The controller measures, per unit of time, a value of a current that is input to the controller or motor, compares a latest current value to a reference value calculated based on a past measurement value, and compares an absolute value of the comparison value to a threshold to grasp the state of the vibrating tube.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: February 2, 2021
    Assignee: MIKASA SANGYO CO., LTD.
    Inventors: Sadahisa Suzuki, Shinji Ueda, Hirotaka Ushijima, Kazuhiro Yamashita, Masaki Suzuki, Tomokazu Ando
  • Publication number: 20200356132
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 12, 2020
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA
  • Publication number: 20200252607
    Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: down-convert a moving image in units of structure of pictures (SOPs) divided in a time direction and precedingly execute encoding processing; calculate a target code amount of each processing unit included in the moving image in units of SOPs based on a result of the preceding encoding processing and calculate a temporal buffer position in a case where the encoding processing is executed on each processing unit based on the calculated target code amount; and calculate an error between an actual transmission buffer position and a temporal buffer position each time when the encoding processing is executed on each processing unit in the moving image in units of SOPs and correct a target code amount of each processing unit on which the encoding processing has not been executed yet.
    Type: Application
    Filed: January 29, 2020
    Publication date: August 6, 2020
    Applicant: FUJITSU LIMITED
    Inventors: XUYING LEI, Hidenobu MIYOSHI, Shunsuke Kobayashi, KAZUHIRO YAMASHITA
  • Publication number: 20200141135
    Abstract: Provided is a concrete vibrator capable of automatically changing the rotational speed of a motor depending on the state of a vibrating tube and suitably avoiding overheating of the motor and a failure due to the motor overheating. Under control of control means 8, the concrete vibrator is operated in a normal mode in which a motor 2 is supplied with driving power having a frequency that can make the motor 2 rotate at a rotational speed suitable for an air bubble removing process, or in an idling mode in which the motor 2 is supplied with driving power having a frequency that can make the motor 2 rotate at a rotational speed lower than the rotational speed in the normal mode.
    Type: Application
    Filed: April 27, 2018
    Publication date: May 7, 2020
    Applicant: MIKASA SANGYO CO., LTD.
    Inventors: Sadahisa SUZUKI, Shinji UEDA, Hirotaka USHIJIMA, Kazuhiro YAMASHITA, Masaki SUZUKI, Tomokazu ANDO
  • Patent number: 9955172
    Abstract: A video data processing device includes: a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute: making, on the basis of first key frames obtained by encoding images in frames included in moving image data, difference frames in each of which a partial image different from an image in a frame corresponding to each first key frame is encoded; and generating, if the number of generated difference frames reaches a first number, in response to detection that a difference between a difference frame generated thereafter and a difference frame preceding in time to the difference frame generated thereafter is not larger than a given value, a second key frame distinguished from the first key frames and obtained by encoding an image in the frame.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: April 24, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Yousuke Yamaguchi, Shunsuke Kobayashi, Kazuhiro Yamashita, Yasuo Misuda
  • Publication number: 20180054202
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Application
    Filed: August 16, 2017
    Publication date: February 22, 2018
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenjiro MATOBA, Kazuhiro YAMASHITA