Abstract: According to one embodiment, when a first case-mounted memory device that includes a first memory device is not connected to a slot of a host apparatus and is stored in a second stocker, the host apparatus causes a second transport device to transport the first case-mounted memory device to the slot, and to connect it thereto. When the first case-mounted memory device is not connected to the slot and is not stored in the second stocker, the host apparatus causes a first transport device to transport the first memory device from a first stocker to a mounter, causes the mounter to mount the first memory device in a case, and causes the second transport device to transport the first case-mounted memory device to the slot and to connect it thereto.

Abstract: According to one embodiment, a cassette housing includes a storage unit, a probe card, and a container. The storage unit stores a semiconductor wafer including a plurality of nonvolatile memory chips. The probe card includes a probe. The probe is configured to be brought into contact with a pad electrode provided on the semiconductor wafer. The container contains heat transfer fluid for lowering or raising temperature of one or both of the probe card and the semiconductor wafer stored in the storage unit.

Abstract: According to one embodiment, a wafer includes a substrate including a first region and a second region that do not overlap each other; a first chip unit and a second chip unit each arranged on the substrate; a first electrode and a second electrode each electrically connected to the first chip unit; and a third electrode and a fourth electrode each electrically connected to the second chip unit. The first electrode and the third electrode are arranged in the first region. The second electrode and the fourth electrode are arranged in the second region. The first region is independent of a region in which the first chip unit and the second chip unit are provided.

Abstract: A test system includes: a test board on which a plurality of test target devices are mounted while being sequentially connected to one another; a measuring apparatus configured to simultaneously execute direct current tests for the test target devices mounted on the test board; and a determining apparatus configured to determine whether or not the test target devices are acceptable. The measuring apparatus executes the direct current tests every time when the number of test target devices mounted on the test board changes. The measuring apparatus determines whether or not the test target devices are acceptable on the basis of a change between measured values of the direct current tests, which follows the change of the number of test target devices mounted on the test board.

Abstract: A test system includes: a test board on which a plurality of test target devices are mounted while being sequentially connected to one another; a measuring apparatus configured to simultaneously execute direct current tests for the test target devices mounted on the test board; and a determining apparatus configured to determine whether or not the test target devices are acceptable. The measuring apparatus executes the direct current tests every time when the number of test target devices mounted on the test board changes. The measuring apparatus determines whether or not the test target devices are acceptable on the basis of a change between measured values of the direct current tests, which follows the change of the number of test target devices mounted on the test board.

Abstract: In one embodiment, a tester calibration device includes a first board to be installed on one of a plurality of sockets of a tester for testing a semiconductor device, when the tester is to be calibrated. The device further includes a plurality of first pins provided on a first face of the first board, and to be made contact with the one socket when the tester is to be calibrated. The device further includes a wiring configured to electrically connect some of the plurality of first pins with each other.

Abstract: In one embodiment, a tester calibration device includes a first board to be installed on one of a plurality of sockets of a tester for testing a semiconductor device, when the tester is to be calibrated. The device further includes a plurality of first pins provided on a first face of the first board, and to be made contact with the one socket when the tester is to be calibrated. The device further includes a wiring configured to electrically connect some of the plurality of first pins with each other.

Abstract: A probe card includes a probe unit having multiple through holes arranged therein, multiple probe needles respectively press-fitted to the multiple through holes, a printed board having convex portions which presses down the probe needles located in predetermined positions, and a unit holder which supports the probe unit and the printed board.

Abstract: A probe card includes a probe unit having multiple through holes arranged therein, multiple probe needles respectively press-fitted to the multiple through holes, a printed board having convex portions which presses down the probe needles located in predetermined positions, and a unit holder which supports the probe unit and the printed board.