Abstract: The present embodiment relates to a photon detector which includes a preamplifier having a structure capable of preventing saturation of an amplifier. The preamplifier includes an amplifier, and further includes a capacitive element, an n-type MOSFET, and a p-type MOSFET disposed on a plurality of wirings electrically connecting the input end side and the output end side of the amplifier. A control electrode of the n-type MOSFET is set to a first fixed potential V1, while a control electrode of the p-type MOSFET is set to a second fixed potential V2.

Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.

Abstract: The present embodiment relates to a radiation imaging system and the like provided with a solid-state imaging device having a structure enabling reduction of linear noise appearing in an integrated image. The solid-state imaging device comprises: L pieces of imaging pixel region arranged along a direction crossing a moving direction of a relative position of the solid-state imaging device; and L pieces of A/D converter provided corresponding to the L pieces of imaging pixel region. Each imaging pixel region includes pixels arranged two-dimensionally to form an M-row by N-column matrix. Any one of the L pieces of A/D converter executes a dummy A/D conversion once or more times after an A/D conversion of an electric signal from a pixel of an m-th row, before an A/D conversion of an electric signal from a pixel of an (m+1)-th row.

Abstract: A solid-state imaging device includes a photodetecting unit including MN pixels arrayed two-dimensionally in M rows and N columns, an output unit outputting a digital value generated on the basis of the amount of charge input from the pixels, and a control unit. The control unit divides the MN pixels in the photodetecting unit into unit regions each including pixels in Q rows and R columns, divides the unit regions arrayed two-dimensionally in (M/Q) rows and (N/R) columns into binning regions each including unit regions in K rows and one column, and repeatedly outputs the digital value according to the sum of amounts of the charges output from KQR pixels included in each binning region from the output unit K times in a column order for each row sequentially for the binning regions arrayed two-dimensionally in (M/KQ) rows and (N/R) columns.

Abstract: A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.

Abstract: A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.

Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.

Abstract: An adding unit adds an input signal generated in a signal generating unit connected to a specific pixel electrode portion out of pixel electrode portions arranged around a certain pixel electrode portion to an input signal generated in a signal generating unit connected to the certain pixel electrode portion. A discriminating unit discriminates whether a carrier input pattern coincides with any one of a plurality of discrimination patterns, and the carrier input pattern indicates, per the pixel electrode portion, presence of any carrier received in the certain pixel electrode portion and the pixel electrode portions arranged around the certain pixel electrode portion. The counting unit increments the number of photons in the case where the discriminating unit discriminates that the carrier input pattern coincides with any one of the discrimination patterns and further the input signal output from the adding unit after addition has a value exceeding a predetermined threshold.

Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.

Abstract: A radiation image sensor includes a charge generation section and, a circuit board accumulating and transferring charge generated in the charge generation section. The circuit board includes a semiconductor substrate, a capacitive section accumulating the charge generated in the charge generation section, and a MOS transistor in the semiconductor substrate. The MOS transistor includes one end connected to the capacitive section and another end connected to a wire transferring the charge. The capacitive section includes a partial region of the semiconductor substrate, a conductor layer disposed on the partial region and electrically connected to the charge generation section, and an insulating layer interposed between the partial region and the conductor layer.

Abstract: A solid-state imaging device includes a photodetecting unit including MN pixels arrayed two-dimensionally in M rows and N columns, an output unit outputting a digital value generated on the basis of the amount of charge input from the pixels, and a control unit. The control unit divides the MN pixels in the photodetecting unit into unit regions each including pixels in Q rows and R columns, divides the unit regions arrayed two-dimensionally in (M/Q) rows and (N/R) columns into binning regions each including unit regions in K rows and one column, and repeatedly outputs the digital value according to the sum of amounts of the charges output from KQR pixels included in each binning region from the output unit K times in a column order for each row sequentially for the binning regions arrayed two-dimensionally in (M/KQ) rows and (N/R) columns.

Abstract: A solid-state imaging device includes a sensor panel section and a readout circuit section. The sensor panel section is disposed on a glass substrate and has a photodetecting section including pixels arrayed in M rows and N columns, row selection lines, and readout lines. The readout circuit section is disposed on a substrate and has N integration circuits. Rectifier circuits are connected between nodes, between N panel-side connection points and the integration circuits, and a constant potential line. Circuit elements having resistance components are connected between the nodes and readout lines.

Abstract: A radiation image sensor includes a charge generation section and, a circuit board accumulating and transferring charge generated in the charge generation section. The circuit board includes a semiconductor substrate, a capacitive section accumulating the charge generated in the charge generation section, and a MOS transistor in the semiconductor substrate. The MOS transistor includes one end connected to the capacitive section and another end connected to a wire transferring the charge. The capacitive section includes a partial region of the semiconductor substrate, a conductor layer disposed on the partial region and electrically connected to the charge generation section, and an insulating layer interposed between the partial region and the conductor layer.

Abstract: A sensor unit includes a metallic base member, a solid-state imaging element, and amplifier chips. The base member has a first placement surface and a second placement surface. The solid-state imaging element has a photodetecting surface, and is disposed on the first placement surface such that a rear surface and the first placement surface face each other. The amplifier chips are mounted on a substrate disposed on the second placement surface. The base member further has side wall portions facing side surfaces of the solid-state imaging element. The chips and the solid-state imaging element are electrically connected to one another via a bonding wire. The chips are thermally coupled to the base member via a thermal via of the substrate.

Abstract: An adding unit adds an input signal generated in a signal generating unit connected to a specific pixel electrode portion out of pixel electrode portions arranged around a certain pixel electrode portion to an input signal generated in a signal generating unit connected to the certain pixel electrode portion. A discriminating unit discriminates whether a carrier input pattern coincides with any one of a plurality of discrimination patterns, and the carrier input pattern indicates, per the pixel electrode portion, presence of any carrier received in the certain pixel electrode portion and the pixel electrode portions arranged around the certain pixel electrode portion. The counting unit increments the number of photons in the case where the discriminating unit discriminates that the carrier input pattern coincides with any one of the discrimination patterns and further the input signal output from the adding unit after addition has a value exceeding a predetermined threshold.

Abstract: A vertical shift register section includes M logic circuits for outputting row selection control signals respectively to M row selection wiring lines and shift register circuits disposed for every two row selection wiring lines. The M logic circuits, when a binning control signal Vbin1 or Vbin2 and an output signal of the shift register circuit both have significant values, output a row selection control signal Vsel so as to close a readout switch. The vertical shift register section, by controlling the timing at which the binning control signals Vbin1 and Vbin2 take significant values, realizes a normal operation mode for successively selecting the two row selection wiring lines and a binning operation mode for simultaneously selecting the two row selection wiring lines. Accordingly, a vertical binning operation is realized by a small vertical shift register.

Abstract: A solid-state imaging device includes a sensor panel section and a readout circuit section. The sensor panel section is disposed on a glass substrate and has a photodetecting section including pixels arrayed in M rows and N columns, row selection lines, and readout lines. The readout circuit section is disposed on a substrate and has N integration circuits. Rectifier circuits are connected between nodes, between N panel-side connection points and the integration circuits, and a constant potential line. Circuit elements having resistance components are connected between the nodes and readout lines.

Abstract: A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.

Abstract: A solid-state imaging device includes a photodetecting section, a vertical shift register section, first row selection lines, and second row selection lines. The vertical shift register section provides the row selection lines of the m-th row with common row selection signals.

Abstract: A controlling section causes a charge of a photodiode to be output to an integration circuit by bringing a readout switch into a connected state, and then brings the readout switch into a non-connected state. Thereafter, a voltage value is output to a holding circuit from the integration circuit. After carrying out the output operation mentioned above, an operation for causing a charge held in an integrating capacitive element to be discharged, and bringing the readout switch into a connected state to cause a charge held in the photodiode to be discharged and an operation for causing voltage values held in the holding circuits to be sequentially output are carried out in parallel. Accordingly, a solid-state imaging device and a method of driving it capable of solving the problems due to a memory effect, a delay effect, and switching noise are realized.