Patents by Inventor Kazuki Fujita
Kazuki Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8026490Abstract: Wiring substrates 11 and 12 are positioned on a fixed base 10 in a manner such that there is a step between the wiring substrates, and radiation imaging elements 2 and 3, respectively having scintillators 25 and 35 deposited on photosensitive portions 21 and 31, are respectively mounted on the wiring substrates 11 and 12. The radiation imaging element 2 is positioned so that its setting surface protrudes beyond a radiation incident surface of the radiation imaging element 3, and the photosensitive portion 21 of the radiation imaging element 2 and the photosensitive portion 31 of the radiation imaging element 3 are juxtaposed to a degree to which the portions do not overlap. The photosensitive portion 21 of the radiation imaging element 2 extends close to an edge at the radiation imaging element 3 side and the scintillator 25 of substantially uniform thickness is formed up to this position.Type: GrantFiled: May 13, 2009Date of Patent: September 27, 2011Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Masahiko Honda, Ryuji Kyushima, Kazuki Fujita
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Patent number: 8018515Abstract: There is provided a solid-state imaging device with an improved linearity as well as dynamic range. Each pixel portion Pm,n in the solid-state imaging device includes: a buried photodiode PD for generating charges of an amount corresponding to the intensity of incident light; a capacitive element C connected in parallel to the buried photodiode PD to accumulate charges generated in the buried photodiode PD; an amplifying transistor T1 for outputting a voltage value corresponding to a voltage value input to the gate terminal; a transferring transistor T2 for inputting a voltage value corresponding to the amount of accumulated charges in the capacitive element C to the gate terminal of the amplifying transistor T1; a discharging transistor T3 for discharging the charges of the capacitive element C; and a selecting transistor T4 for selectively outputting a voltage value output from the amplifying transistor T1 to a wiring Ln.Type: GrantFiled: February 2, 2006Date of Patent: September 13, 2011Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Kazuki Fujita, Ryuji Kyushima, Masahiko Honda, Seiichiro Mizuno
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Publication number: 20110176656Abstract: A solid-state image pickup device 1 includes a photodetecting section 10, a signal readout section 20, a controlling section 30, and a correction processing section 40. In the photodetecting section 10, M×N pixel units P1,1 to PM,N each including a photodiode that generates charge of an amount according to an incident light intensity and a readout switch connected to the photodiode are two-dimensionally arrayed in M rows and N columns. A charge generated in each pixel unit Pm,n is input to an integration circuit Sn through a readout wiring line LO,n, and a voltage value output from the integration circuit Sn according to the charge amount is output to an output wiring line Lout through a holding circuit Hn. In the correction processing section 40, a correction processing is applied to respective frame data output from the signal readout section 20, and the frame data after the correction processing is output.Type: ApplicationFiled: July 13, 2009Publication date: July 21, 2011Applicant: Hamamatsu Photonics K.K.Inventors: Ryuji Kyushima, Kazuki Fujita, Junichi Sawada
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Patent number: 7969491Abstract: An amount of charges consonant with the intensity of the light entering photodiodes is generated, and the level of the charges is determined by a charge level determination circuit. Based on this determined charge level, a capacitance setting circuit sets a capacitance of an integrating capacitor unit in an integrating circuit. Thereafter, in the integrating circuit, the charges generated by the photodiodes are integrated in the integrating capacitor unit, and a voltage having a value consonant with the amount of the integrated charges is output. When background light is strong and the overall intensity of incident light is high, a comparatively large capacitance is set for the variable capacitor unit of the integrating circuit, and the intensity of the incident light is detected without saturation.Type: GrantFiled: September 17, 2007Date of Patent: June 28, 2011Assignee: Hamamatsu Photonics K.K.Inventors: Seiichiro Mizuno, Hiroo Yamamoto, Kazuki Fujita
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Publication number: 20110141255Abstract: A solid-state image pickup apparatus 1A is formed such that M×N (where M<N and M and N are integers greater than or equal to 2) pixels are two-dimensionally arrayed in M rows and N columns, and has a photodetecting section 10A having a rectangular photosensitive surface whose longitudinal direction is the row direction. The solid-state image pickup apparatus 1A is supported rotatably by a rotation controlling section, and the rotation controlling section controls a rotation angle of the solid-state image pickup apparatus 1A such that the longitudinal direction of the photodetecting section 10A is made parallel to a moving direction B of the solid-state image pickup apparatus 1A in one imaging mode of the two imaging modes, and the longitudinal direction of the photodetecting section 10A is made perpendicular to the moving direction B of the solid-state image pickup apparatus 1A in the other imaging mode of the two imaging modes.Type: ApplicationFiled: April 22, 2009Publication date: June 16, 2011Applicant: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Ryuji Kyushima, Kazuki Fujita
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Publication number: 20110135057Abstract: A solid-state image pickup device 1 includes a semiconductor substrate 3A having a pixel array 10A with pixels arrayed in M rows and NA columns, a semiconductor substrate 3B having a pixel array 10B with pixels arrayed in M rows and NB columns, and a first column of which is arranged along an NA-th column of the pixel array 10A, and a signal output section 20. The signal output section 20 outputs digital values corresponding to the respective columns from the first column to the n-th column (2?n<NA) of the pixel array 10A, sequentially from the n-th column to the first column, and in parallel with this output, outputs digital values corresponding to the respective columns from the (n+1)-th column of the pixel array 10A to the NB-th column of the pixel array 10B, sequentially in a reverse order to that of the first column to the n-th column of the pixel array 10A.Type: ApplicationFiled: June 11, 2009Publication date: June 9, 2011Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Harumichi Mori, Ryuji Kyushima, Kazuki Fujita
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Publication number: 20110064195Abstract: A solid-state image pickup apparatus 1A includes a photodetecting section 10A, a signal readout section 20, and a controlling section 40A. In the photodetecting section 10A, M×N pixel units P1,1 to PM,N each including a photodiode and a readout switch are arrayed in M rows and N columns. Charges generated in each pixel unit Pm,n are input to an integrating circuit Sn through a readout wiring LO,n, and a voltage value output from the integrating circuit Sn in response to the charge amount is output through a holding circuits Hn. When in a first imaging mode, a voltage value according to an amount of charges generated in the photodiode PD of each of the M×N pixel units P1,1 to PM,N in the photodetecting section 10A is output from the signal readout section 20. When in a second imaging mode, a voltage value according to an amount of charges generated in the photodiode PD of each pixel unit Pm,n included in consecutive M1 rows in the photodetecting section 10A is output from the signal readout section 20.Type: ApplicationFiled: April 22, 2009Publication date: March 17, 2011Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori
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Publication number: 20110019795Abstract: A solid-state imager has a structure for capturing a high-resolution image even if any of the read wiring and the column-selection wiring is disconnected. The solid-state imager (1) comprises a light-receiving part (10) having MN pixel portions (P1,1 to PM,N) two-dimensionally arrayed in a matrix of M lines and N columns. The pixel portion (Pm,n) of the light-receiving part (10) includes a photodiode (PD) producing charge the amount of which corresponds to the intensity of the incident light and a read switch (SW1) connected to the photodiode (PD). The pixel portion (Pm,n) occupies a generally square area, and most of the area is the area of the photodiode (PD). A field-effect transistor serving as the read switch (SW1) is fabricated in one corner of the area. A channel CD stopper (CS) is continuously formed in every area sandwiched by pixel portions.Type: ApplicationFiled: January 23, 2009Publication date: January 27, 2011Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Harumichi Mori, Ryuji Kyushima, Masahiko Honda
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Patent number: 7863576Abstract: Wiring substrates 11 and 12 are positioned on a fixed base 10 in a manner such that there is a step between the wiring substrates, and radiation imaging elements 2 and 3, respectively having scintillators 25 and 35 deposited on photosensitive portions 21 and 31, are respectively mounted on the wiring substrates 11 and 12. The radiation imaging element 2 is positioned so that its setting surface protrudes beyond a radiation incident surface of the radiation imaging element 3, and the photosensitive portion 21 of the radiation imaging element 2 and the photosensitive portion 31 of the radiation imaging element 3 are juxtaposed to a degree to which the portions do not overlap. The photosensitive portion 21 of the radiation imaging element 2 extends close to an edge at the radiation imaging element 3 side and the scintillator 25 of substantially uniform thickness is formed up to this position.Type: GrantFiled: May 13, 2009Date of Patent: January 4, 2011Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Masahiko Honda, Ryuji Kyushima, Kazuki Fujita
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Publication number: 20100316185Abstract: The present invention relates to a solid-state imaging device, etc. having a structure for capturing a high-resolution image even when any row selecting wiring is disconnected. The solid-state imaging device (1) comprises a photodetecting section (10), a signal reading-out section (20), a row selecting section (30), a column selecting section (40), an overflow preventing section (50), and a controlling section (60). The photodetecting section (10) has M×N pixel portions P1,1 to PM,N two-dimensionally arranged in a matrix of M rows and N columns, and each of the pixel portions P1,1 to PM,N includes a photodiode that generates charge of an amount according to an incident light intensity and a reading-out switch connected to the photodiode. Each of the N pixel portions Pm,1 to Pm,N belonging to an m-th row is connected to the row selecting section (30) and the overflow preventing section (50) by an m-th row selecting wiring LV,m.Type: ApplicationFiled: January 22, 2009Publication date: December 16, 2010Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Harumichi Mori, Ryuji Kyushima, Masahiko Honda
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Publication number: 20100295982Abstract: The present invention relates to a solid-state imaging device, etc., having a structure which enables to obtain an image with higher resolution by correcting pixel data even when any one of row selecting wirings is disconnected. A solid-state imaging device (1) comprises a photodetecting section (10), a signal reading-out section (20), a controlling section (30), and a correction processing section (40). The photodetecting section (10) has M×N pixel portions P1,1 to PM,N two-dimensionally arrayed in M rows and N columns, and each of the pixel portions P1,1 to PM,N includes a photodiode which generates charges of an amount corresponding to an incident light intensity and a reading-out switch connected to the photodiode. Charges generated in each of the pixel portions P1,1 to PM,N are inputted into an integrating circuit Sn through a reading-out wiring LO,n.Type: ApplicationFiled: January 22, 2009Publication date: November 25, 2010Inventors: Ryuji Kyushima, Harumichi Mori, Junichi Sawada, Kazuki Fujita, Masahiko Honda
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Publication number: 20100295976Abstract: The present invention relates to a solid-state imaging device, etc., which makes it possible to obtain an image with higher resolution by properly correcting pixel data even when any one of row selecting wirings is disconnected. A solid-state imaging device (1) comprises a photodetecting section (10), a signal reading-out section (20), a controlling section (30), and a correction processing section (40). In the photodetecting section (10), M×N pixel portions P1,1 to PM,N are two-dimensionally arrayed in a matrix of M rows and N columns, and each of the pixel portions P1,1 to PM,N includes a photodiode and a reading-out switch. Charges generated in each pixel portion Pm,n are inputted into an integrating circuit Sn through a reading-out wiring LO,n, and a voltage value corresponding to the amount of charges is outputted from the integrating circuit Sn. The voltage value from the integrating circuit Sn is outputted to an output wiring Lout through a holding circuit Hn.Type: ApplicationFiled: January 22, 2009Publication date: November 25, 2010Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Ryuji Kyushima, Harumichi Mori, Junichi Sawada, Kazuki Fujita, Masahiko Honda
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Patent number: 7834323Abstract: Wiring substrates 11 and 12 are positioned on a fixed base 10 in a manner such that there is a step between the wiring substrates, and radiation imaging elements 2 and 3, respectively having scintillators 25 and 35 deposited on photosensitive portions 21 and 31, are respectively mounted on the wiring substrates 11 and 12. The radiation imaging element 2 is positioned so that its setting surface protrudes beyond a radiation incident surface of the radiation imaging element 3, and the photosensitive portion 21 of the radiation imaging element 2 and the photosensitive portion 31 of the radiation imaging element 3 are juxtaposed to a degree to which the portions do not overlap. The photosensitive portion 21 of the radiation imaging element 2 extends close to an edge at the radiation imaging element 3 side and the scintillator 25 of substantially uniform thickness is formed up to this position.Type: GrantFiled: May 10, 2005Date of Patent: November 16, 2010Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Masahiko Honda, Ryuji Kyushima, Kazuki Fujita
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Publication number: 20100245646Abstract: A solid state imaging device 1 includes a photodetecting section including M×N pixel portions P1,1 to PM,N two-dimensionally arrayed in M rows and N columns, a signal readout section including integrating circuits S1 to SN and holding circuits H1 to HN, and an initialization section including initialization switches SWI,1 to SWI,N. In response to a discharging control signal Reset, discharge switches SW2 in the integrating circuits Sn are temporarily closed and then opened, and thereafter, in response to an m-th row selecting control signal Vsel(m), the readout switches SW1 of the pixel portions Pm,n of the m-th row are closed for a first period. In this first period, in response to a hold control signal Hold, the input switches SW31 of the holding circuits Hn are switched from a closed state to an open state, and thereafter, in response to an initializing control signal Init, the initialization switches SWI,n are closed for a second period.Type: ApplicationFiled: September 3, 2008Publication date: September 30, 2010Applicant: Hamamatsu PHOTONICS K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori, Masahiko Honda
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Publication number: 20100208113Abstract: A solid state imaging device 1 includes a photodetecting section 10, a signal readout section 20, a controlling section 30, and a correction processing section 40. In the photodetecting section 10, M×N pixel portions each including a photodiode which generates charges as much as an incident light intensity and a readout switch connected to the photodiode are two-dimensionally arrayed in M rows and N columns. Charges generated in each pixel portion Pm,n are input into an integration circuit Sn, through a readout wiring LO,n, and a voltage value output corresponding to the charge amount from the integration circuit Sn is output to an output wiring Lout through a holding circuit Hn. In the correction processing section 40, correction processing is performed for frame data repeatedly output from the signal readout section 20, and frame data after being subjected to the correction processing is output.Type: ApplicationFiled: September 3, 2008Publication date: August 19, 2010Applicant: Hamamatsu Photonics K.K.Inventors: Ryuji Kyushima, Harumichi Mori, Junichi Sawada, Kazuki Fujita, Masahiko Honda
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Publication number: 20100194937Abstract: A solid state imaging device 1 includes a photodetecting section 10, a signal readout section 20, a controlling section 30, and a correction processing section 40. In the photodetecting section 10, M×N pixel portions each including a photodiode which generates charges as much as an incident light intensity and a readout switch connected to the photodiode are two-dimensionally arrayed in M rows and N columns. Charges generated in each pixel portion Pm,n are input into an integration circuit Sn through a readout wiring LO,n, and a voltage value output corresponding to the charge amount from the integration circuit Sn is output to an output wiring Lout through a holding circuit Hn. In the correction processing section 40, correction processing is performed for frame data repeatedly output from the signal readout section 20, and frame data after being subjected to the correction processing is output.Type: ApplicationFiled: September 3, 2008Publication date: August 5, 2010Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Ryuji Kyushima, Harumichi Mori, Junichi Sawada, Kazuki Fujita, Masahiko Honda
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Publication number: 20100193692Abstract: A solid state imaging device 1 includes a photodetecting section 10, a signal readout section 20, a controlling section 30, dummy photodetecting sections 11 and 12 including dummy photodiodes, discharging means for discharging junction capacitance portions of the dummy photodiodes, and a scintillator layer 50 provided so as to cover the photodetecting section 10. The dummy photodetecting section 11 is disposed so as to neighbor the first row (the upper side of the photodetecting section 10) of the photodetecting section 10 and has a length equivalent to the length of the photodetecting section 10 in the left-right direction. The dummy photodetecting section 12 is disposed so as to neighbor the M-th column of the photodetecting section 10 (the lower side of the photodetecting section 10) and has a length equivalent to the length of the photodetecting section 10 in the left-right direction.Type: ApplicationFiled: September 24, 2008Publication date: August 5, 2010Inventors: Harumichi Mori, Kazuki Fujita, Ryuji Kyushima
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Patent number: 7728303Abstract: Wiring substrates 11 and 12 are positioned on a fixed base 10 in a manner such that there is a step between the wiring substrates, and radiation imaging elements 2 and 3, respectively having scintillators 25 and 35 deposited on photosensitive portions 21 and 31, are respectively mounted on the wiring substrates 11 and 12. The radiation imaging element 2 is positioned so that its setting surface protrudes beyond a radiation incident surface of the radiation imaging element 3, and the photosensitive portion 21 of the radiation imaging element 2 and the photosensitive portion 31 of the radiation imaging element 3 are juxtaposed to a degree to which the portions do not overlap. The photosensitive portion 21 of the radiation imaging element 2 extends close to an edge at the radiation imaging element 3 side and the scintillator 25 of substantially uniform thickness is formed up to this position.Type: GrantFiled: May 13, 2009Date of Patent: June 1, 2010Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Masahiko Honda, Ryuji Kyushima, Kazuki Fujita
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Publication number: 20090295954Abstract: For a solid-state image pickup device 1, a plurality of pixels are two dimensionally arranged in an imaging region 10, and two photodiodes PD1 and PD2 are included in each pixel Pm,n. An electric charge generated in the respective photodiodes PD1 and PD2 is input to a signal readout section 20, and a voltage according to an electric charge amount thereof is output from the signal output section 20. The voltage output from the signal readout section 20 is input to an A/D converting section 40, and a digital value according to the input voltage is output from the A/D converting section 40. In an adding section 50, a sum of digital values to be output from the A/D converting section 40 according to the amount of electric charge generated, for each pixel Pm,n of the imaging region 10, in the two respective photodiodes PD1 and PD2 included in the pixel is operated, and a digital value being a sum value thereof is output.Type: ApplicationFiled: July 3, 2007Publication date: December 3, 2009Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Harumichi Mori, Kazuki Fujita, Ryuji Kyushima, Masahiko Honda
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Publication number: 20090268867Abstract: The solid-state image pick-up device (1) includes a photodetecting section (10) which is formed by two-dimensionally aligning M×N (M and N are integers not less than 2) pixels in M rows and N columns and has a rectangular photodetecting surface. This solid-state image pick-up device (1) is supported rotatably by a rotation controlling section, and the rotation controlling section controls the rotation angle of the solid-state image pick-up device (1) so that the row direction or column direction of the photodetecting section (10) becomes parallel to the movement direction (B) of the solid-state image pick-up device (1) in one of the two imaging modes, and both of the row direction and the column direction of the photodetecting section (10) tilt with respect to the movement direction (B) of the solid-state image pick-up device (1) in the other imaging mode of the two imaging modes.Type: ApplicationFiled: April 22, 2009Publication date: October 29, 2009Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Harumichi MORI, Ryuji KYUSHIMA, Kazuki FUJITA