Patents by Inventor Kazuki Fukuoka

Kazuki Fukuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11675404
    Abstract: A semiconductor device includes: a plurality of cores configured to receive power from a power supply; a plurality of power switch circuits provided for each core and configured to control the power supplied to the corresponding cores; a compare circuit configured to receive power from the power supply and compare output data of the plurality of cores; and a core voltage monitor circuit configured to monitor a voltage of a node that connects the power supply and the compare circuit.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: June 13, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ryo Mori, Kazuki Fukuoka, Kenichi Shimada
  • Publication number: 20210365093
    Abstract: A semiconductor device includes: a plurality of cores configured to receive power from a power supply; a plurality of power switch circuits provided for each core and configured to control the power supplied to the corresponding cores; a compare circuit configured to receive power from the power supply and compare output data of the plurality of cores; and a core voltage monitor circuit configured to monitor a voltage of a node that connects the power supply and the compare circuit.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 25, 2021
    Inventors: Ryo MORI, Kazuki FUKUOKA, Kenichi SHIMADA
  • Patent number: 10911042
    Abstract: There is a need to provide a semiconductor device, a semiconductor system, and a semiconductor device manufacturing method capable of accurately monitoring a minimum operating voltage for a monitoring-targeted circuit. A monitor portion of a semiconductor system according to one embodiment includes a voltage monitor and a delay monitor. The voltage monitor is driven by power-supply voltage SVCC different from power-supply voltage VDD supplied to an internal circuit as a monitoring-targeted circuit and monitors power-supply voltage VDD. The delay monitor is driven by power-supply voltage VDD and monitors signal propagation time for a critical path in the internal circuit. The delay monitor is configured so that a largest on-resistance of on-resistances for a plurality of transistors configuring the delay monitor is smaller than a largest on-resistance of on-resistances for a plurality of transistors configuring the internal circuit.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: February 2, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kazuki Fukuoka, Toshifumi Uemura, Yuko Kitaji
  • Patent number: 10884035
    Abstract: A semiconductor device, a semiconductor system, and a control method of a semiconductor device are capable of accurately monitoring the lowest operating voltage of a circuit to be monitored. According to one embodiment, a monitor unit of a semiconductor system includes a voltage monitor that is driven by a second power supply voltage different from a first power supply voltage supplied to an internal circuit that is a circuit to be monitored and monitors the first power supply voltage, and a delay monitor that is driven by the first power supply voltage and monitors the signal propagation period of time of a critical path in the internal circuit.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: January 5, 2021
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuki Fukuoka, Toshifumi Uemura, Yuko Kitaji, Yosuke Okazaki, Akira Murayama
  • Patent number: 10782763
    Abstract: A semiconductor device includes a voltage sensor which samples a power supply voltage at a speed faster than fluctuations in the power supply voltage and encodes the power supply voltage into a voltage code value. A voltage drop determination circuit detects a voltage drop based on the voltage code value, and a clock control circuit generates a clock. The clock control circuit stops the clock when the voltage drop determination circuit detects the voltage drop. The voltage drop determination circuit includes a prediction computation circuit which looks ahead a voltage value from a history of the voltage code value and predicts a variation value, and the prediction computation circuit includes a circuit for masking a prediction value if a differential value of the prediction value is continuously negative for a predetermined cycle.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: September 22, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuko Kitaji, Kazuki Fukuoka, Ryo Mori, Toshifumi Uemura
  • Publication number: 20200041547
    Abstract: A semiconductor device, a semiconductor system, and a control method of a semiconductor device are capable of accurately monitoring the lowest operating voltage of a circuit to be monitored. According to one embodiment, a monitor unit of a semiconductor system includes a voltage monitor that is driven by a second power supply voltage different from a first power supply voltage supplied to an internal circuit that is a circuit to be monitored and monitors the first power supply voltage, and a delay monitor that is driven by the first power supply voltage and monitors the signal propagation period of time of a critical path in the internal circuit.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Inventors: Kazuki FUKUOKA, Toshifumi UEMURA, Yuko KITAJI, Yosuke OKAZAKI, Akira MURAYAMA
  • Patent number: 10481185
    Abstract: A semiconductor device, a semiconductor system, and a control method of a semiconductor device are capable of accurately monitoring the lowest operating voltage of a circuit to be monitored. According to one embodiment, a monitor unit of a semiconductor system includes a voltage monitor that is driven by a second power supply voltage different from a first power supply voltage supplied to an internal circuit that is a circuit to be monitored and monitors the first power supply voltage, and a delay monitor that is driven by the first power supply voltage and monitors the signal propagation period of time of a critical path in the internal circuit.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: November 19, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kazuki Fukuoka, Toshifumi Uemura, Yuko Kitaji, Yosuke Okazaki, Akira Murayama
  • Patent number: 10461721
    Abstract: A semiconductor apparatus includes an operation oscillator, a reference oscillator, a first operation switch connected in series with the operation oscillator between a power supply potential VDD and a ground potential GND, a first reference switch connected in series with the reference oscillator between the power supply potential VDD and the ground potential GND, a second reference switch connected in parallel with the reference oscillator between the power supply potential VDD and the ground potential GND, an operation counter configured to count the number of output pulses from the operation oscillator in a measurement period, and a reference counter configured to count the number of output pulses from the reference oscillator in the measurement period.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: October 29, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Toshifumi Uemura, Kazuki Fukuoka
  • Publication number: 20190129488
    Abstract: A semiconductor device includes a voltage sensor which samples a power supply voltage at a speed faster than fluctuations in the power supply voltage and encodes the power supply voltage into a voltage code value. A voltage drop determination circuit detects a voltage drop based on the voltage code value, and a clock control circuit generates a clock. The clock control circuit stops the clock when the voltage drop determination circuit detects the voltage drop. The voltage drop determination circuit includes a prediction computation circuit which looks ahead a voltage value from a history of the voltage code value and predicts a variation value, and the prediction computation circuit includes a circuit for masking a prediction value if a differential value of the prediction value is continuously negative for a predetermined cycle.
    Type: Application
    Filed: December 13, 2018
    Publication date: May 2, 2019
    Inventors: Yuko Kitaji, Kazuki Fukuoka, Ryo Mori, Toshifumi Uemura
  • Publication number: 20190074829
    Abstract: There is a need to provide a semiconductor device, a semiconductor system, and a semiconductor device manufacturing method capable of accurately monitoring a minimum operating voltage for a monitoring-targeted circuit. A monitor portion of a semiconductor system according to one embodiment includes a voltage monitor and a delay monitor. The voltage monitor is driven by power-supply voltage SVCC different from power-supply voltage VDD supplied to an internal circuit as a monitoring-targeted circuit and monitors power-supply voltage VDD. The delay monitor is driven by power-supply voltage VDD and monitors signal propagation time for a critical path in the internal circuit. The delay monitor is configured so that a largest on-resistance of on-resistances for a plurality of transistors configuring the delay monitor is smaller than a largest on-resistance of on-resistances for a plurality of transistors configuring the internal circuit.
    Type: Application
    Filed: July 25, 2018
    Publication date: March 7, 2019
    Inventors: Kazuki FUKUOKA, Toshifumi UEMURA, Yuko KITAJI
  • Patent number: 10222847
    Abstract: There is provided a semiconductor device that can follow a fast voltage change such as a large voltage drop occurring at the time of rapid load fluctuation. The semiconductor device includes a voltage sensor which monitors a power supply voltage at a sampling speed higher than the assumed frequency of power supply voltage fluctuation and outputs a voltage code value, a voltage drop determination circuit which determines, from the voltage code value, that a voltage drop causing a malfunction of a system occurs, and outputs a clock stop signal, and a clock control circuit which controls clock stop, restart, and frequency change.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: March 5, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuko Kitaji, Kazuki Fukuoka, Ryo Mori, Toshifumi Uemura
  • Patent number: 10199085
    Abstract: A semiconductor device capable of controlling a memory while preventing the functional deterioration of the memory and reducing the power consumption of the semiconductor device is provided. The semiconductor device includes a first semiconductor chip (logic chip) and a second semiconductor chip (memory chip). The first semiconductor chip includes a plurality of temperature sensors disposed in mutually different places, and a memory controller that controls each of a plurality of memory areas provided in the second semiconductor chip based on output results of a respective one of the plurality of temperature sensors.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: February 5, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Takao Nomura, Ryo Mori, Kazuki Fukuoka
  • Patent number: 10180711
    Abstract: There is provided a semiconductor device that can follow a fast voltage change such as a large voltage drop occurring at the time of rapid load fluctuation. The semiconductor device includes a voltage sensor which monitors a power supply voltage at a sampling speed higher than the assumed frequency of power supply voltage fluctuation and outputs a voltage code value, a voltage drop determination circuit which determines, from the voltage code value, that a voltage drop causing a malfunction of a system occurs, and outputs a clock stop signal, and a clock control circuit which controls clock stop, restart, and frequency change.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: January 15, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuko Kitaji, Kazuki Fukuoka, Ryo Mori, Toshifumi Uemura
  • Publication number: 20180095115
    Abstract: An object of the present invention is to provide a semiconductor device, a semiconductor system, and a control method of a semiconductor device capable of accurately monitoring the lowest operating voltage of a circuit to be monitored. According to one embodiment, a monitor unit of a semiconductor system includes a voltage monitor that is driven by a second power supply voltage different from a first power supply voltage supplied to an internal circuit that is a circuit to be monitored and monitors the first power supply voltage, and a delay monitor that is driven by the first power supply voltage and monitors the signal propagation period of time of a critical path in the internal circuit.
    Type: Application
    Filed: September 14, 2017
    Publication date: April 5, 2018
    Inventors: Kazuki FUKUOKA, Toshifumi UEMURA, Yuko KITAJI, Yosuke OKAZAKI, Akira MURAYAMA
  • Publication number: 20180032124
    Abstract: An object of the present invention is to finely adjust a voltage for each processor core. A semiconductor system includes a semiconductor device and a power supply device configured to supply a fixed voltage to a supply voltage line. The semiconductor device includes a plurality of power control controllers. Each of the plurality of power control controllers includes a processor core, a plurality of switch transistors connected in parallel between the supply voltage line and a control voltage line, the control voltage line supplying a power supply voltage to the processor core, an AD converter configured to convert a control voltage output from the control voltage line into a current voltage value, the current voltage value being a digital value, and a step-down controller configured to control the plurality of switch transistors in order to bring the converted current voltage value close to a target voltage value.
    Type: Application
    Filed: April 25, 2017
    Publication date: February 1, 2018
    Inventor: Kazuki FUKUOKA
  • Publication number: 20170141762
    Abstract: A semiconductor apparatus includes an operation oscillator 13, a reference oscillator 16, a first operation switch 11 connected in series with the operation oscillator 13 between a power supply potential VDD and a ground potential GND, a first reference switch 14 connected in series with the reference oscillator 16 between the power supply potential VDD and the ground potential GND, a second reference switch 15 connected in parallel with the reference oscillator 16 between the power supply potential VDD and the ground potential GND, an operation counter 26 configured to count the number of output pulses from the operation oscillator 13 in a measurement period, and a reference counter 25 configured to count the number of output pulses from the reference oscillator 16 in the measurement period.
    Type: Application
    Filed: November 11, 2016
    Publication date: May 18, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Toshifumi UEMURA, Kazuki FUKUOKA
  • Publication number: 20170075404
    Abstract: There is provided a semiconductor device that can follow a fast voltage change such as a large voltage drop occurring at the time of rapid load fluctuation. The semiconductor device includes a voltage sensor which monitors a power supply voltage at a sampling speed higher than the assumed frequency of power supply voltage fluctuation and outputs a voltage code value, a voltage drop determination circuit which determines, from the voltage code value, that a voltage drop causing a malfunction of a system occurs, and outputs a clock stop signal, and a clock control circuit which controls clock stop, restart, and frequency change.
    Type: Application
    Filed: July 29, 2016
    Publication date: March 16, 2017
    Inventors: Yuko KITAJI, Kazuki FUKUOKA, Ryo MORI, Toshifumi UEMURA
  • Publication number: 20160064063
    Abstract: A semiconductor device capable of controlling a memory while preventing the functional deterioration of the memory and reducing the power consumption of the semiconductor device is provided. The semiconductor device includes a first semiconductor chip (logic chip) and a second semiconductor chip (memory chip). The first semiconductor chip includes a plurality of temperature sensors disposed in mutually different places, and a memory controller that controls each of a plurality of memory areas provided in the second semiconductor chip based on output results of a respective one of the plurality of temperature sensors.
    Type: Application
    Filed: August 4, 2015
    Publication date: March 3, 2016
    Applicant: Renesas Electronics Corporation
    Inventors: Takao NOMURA, Ryo MORI, Kazuki FUKUOKA
  • Publication number: 20160027731
    Abstract: A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.
    Type: Application
    Filed: October 5, 2015
    Publication date: January 28, 2016
    Inventors: Ryo Mori, Kazuki Fukuoka, Naozumi Morino, Yoshinori Deguchi
  • Patent number: 9171767
    Abstract: A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.
    Type: Grant
    Filed: November 8, 2014
    Date of Patent: October 27, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ryo Mori, Kazuki Fukuoka, Naozumi Morino, Yoshinori Deguchi