Patents by Inventor Kazumitsu Miyakoshi

Kazumitsu Miyakoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4817025
    Abstract: A digital filter of linear phase non-cyclic type comprises a shift register composed of serially connected delay elements with a specified delay time. The outputs from the individual delay elements are multiplied and added so that the output sampling frequency is twice that of the input sampling frequency which enters the shift register. The number of multiplications is significantly reduced by making the number of output lines from the delay elements to be odd and by placing adders between the shift register and the device for carrying out multiplications. An alternative method is to use read only memories instead of the means for carrying out multiplications.
    Type: Grant
    Filed: February 5, 1988
    Date of Patent: March 28, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shin Asai, Kazumitsu Miyakoshi, Daisuke Mochisuki
  • Patent number: 4812815
    Abstract: A D/A converter system for converting digital signal to analog signal includes a circuit for converting digital signal such as PCM signal to pulse density modulation signal, and an analog low-pass filter for converting the pulse density modulation signal to analog signal by removing noise from the pulse density modulation signal.
    Type: Grant
    Filed: October 24, 1986
    Date of Patent: March 14, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazumitsu Miyakoshi, Mitsuyoshi Nakaya
  • Patent number: 4334279
    Abstract: A display circuit adapted for use in an electronic calculator comprises a circuit for enabling communication between the calculator and the operator to inquire as to the value of one or more variables and a circuit for pointing out the kind of a variable which is presently subject to inquiry and input data items entered by the operator. In another form of the present invention, the display circuit comprises a circuit for detecting a space or separable portion between two algebraic expressions, a circuit for terminating the indication just before the position of the space, and a circuit for subsequently initiating indications of items following the space from the top digit of a display.
    Type: Grant
    Filed: April 11, 1980
    Date of Patent: June 8, 1982
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazumitsu Miyakoshi, Koji Maekawa
  • Patent number: 4249245
    Abstract: A confirmation sound generation system for developing a confirmation sound upon actuation of keys included in a key input means of an electronic apparatus. A determination means is provided for determining whether the presently conducted key input operation is effective. The determination means develops a determination output for activating said confirmation sound generation system only when an effective key input operation is conducted.
    Type: Grant
    Filed: March 20, 1979
    Date of Patent: February 3, 1981
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Nakanishi, Kazumitsu Miyakoshi