Patents by Inventor Kazuo Asakawa

Kazuo Asakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7671017
    Abstract: A method of treating a patient having a HCV infection which method comprises administering to said patient a cyclosporin A or a cyclosporin A derivative in association with a conjugate of interferon to a water-soluble polymer in an amount effective to alleviate or eliminate one or more of the signs or symptoms of HCV.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: March 2, 2010
    Assignee: Novartis AG
    Inventors: Catherine Cornu-Artis, Guylaine Vachon, Yoko Uryuhara, Kazuo Asakawa, Reinhild Elisabeth Mertes, Shinsyou Yoshiba
  • Publication number: 20080138316
    Abstract: A method of treating a patient having a HCV infection which method comprises administering to said patient a cyclosporin A or a cyclosporin A derivative in association with a conjugate of interferon to a water-soluble polymer in an amount effective to alleviate or eliminate one or more of the signs or symptoms of HCV.
    Type: Application
    Filed: July 13, 2005
    Publication date: June 12, 2008
    Applicant: NOVARTIS AG
    Inventors: Catherine Cornu-Artis, Guylaine Vachon, Yoko Uryuhara, Kazuo Asakawa, Reinhild Elisabeth Mertes, Shinsyou Yoshiba
  • Publication number: 20060158064
    Abstract: An enclosure of a cellular phone is formed with a plurality of sound releasing holes. The inside of a portion where the sound releasing holes are provided defines an air chamber formed with a receiving portion for mounting a piezoelectric sounding element. The piezoelectric sounding element is of bimorph structure formed by adhering piezoelectric elements on both surfaces of a diaphragm, and serves as a speaker by hermetically fixing a peripheral edge of the diaphragm to the receiving portion. Acoustic characteristics of such a piezoelectric sounding body relates to the total sum S of side surface areas of the sound releasing holes. Therefore, by setting the total sum to a value from 1.5 mm to 60 mm2, variations in resonant frequency and lowering of the sound pressure are prevented, and hence the required acoustic characteristics can be secured while realizing reduction of the thickness of the wall of the enclosure.
    Type: Application
    Filed: December 1, 2005
    Publication date: July 20, 2006
    Inventors: Kazuo Asakawa, Tatsuyuki Ogawa, Yasukazu Tokuhisa, Yoshiyuki Watanabe
  • Patent number: 6456989
    Abstract: The present invention relates to a data processing system in a hierarchical network configuration for executing applicable data processes in a comprehensible and executable form. An object of the present invention is to allow data processing capabilities to be established with high precision in a short time based on a fuzzy-neuro-integrated concept. A fuzzy model is generated by a data processing system in the form of membership functions and fuzzy rules as technical information relating to a control target. According to this fuzzy model, a weight value of the connection between neurons is set and a pre-wired neural network is established. Then, the data of the control target are learned by the neural network. The connection state and a weight value of the neural network after the learning enable tuning of the fuzzy model.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: September 24, 2002
    Assignees: Fujitsu Limited, FFC Limited
    Inventors: Akira Kawamura, Ryushuke Masuoka, Yuri Owada, Kazuo Asakawa, Shigenori Matsuoka, Hiroyuki Okada
  • Patent number: 6023693
    Abstract: A learning system is used in a data processing apparatus for learning an input pattern by obtaining an internal-state value necessary for realizing a desired data conversion by performing a pattern conversion defined by the internal-state value and calculating an output pattern corresponding to the input pattern.
    Type: Grant
    Filed: October 6, 1995
    Date of Patent: February 8, 2000
    Assignee: Fujitsu Limited
    Inventors: Ryusuke Masuoka, Nobuo Watanabe, Takashi Kimoto, Akira Kawamura, Kazuo Asakawa, Jun'ichi Tanahashi
  • Patent number: 5875284
    Abstract: The present invention relates to a data processing system in a hierarchical network configuration for executing applicable data processes in a comprehensible and executable form. The present invention allows data processing capabilities to be established with high precision in a short time based on a fuzzy-neuro-integrated concept. A fuzzy model is generated by a data processing system in the form of membership functions and fuzzy rules as technical information relating to a control target. According to this fuzzy model, a weight value of the connection between neurons is set and a pre-wired neural network is established. Then, the data of the control target are learned by the neural network. The connection state and a weight value of the neural network after the learning enable tuning of the fuzzy model.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: February 23, 1999
    Assignee: Fujitsu Limited
    Inventors: Nobuo Watanabe, Akira Kawamura, Ryushuke Masuoka, Yuri Owada, Kazuo Asakawa, Shigenori Matsuoka, Hiroyuki Okada
  • Patent number: 5600843
    Abstract: A parallel data processing system comprises a plurality of data processing units each having at least one input and storing data of a matrix and a plurality of trays each having a first input and an output and for storing data of a vector, each of all or part of said trays having a second output connected to said first input of a respective one of said data processing units, and said trays being connected in cascade to form a shift register for performing data transfer between corresponding ones of the trays and the data processing units and data processing in the data processing units synchronously, thereby performing an operation of a matrix vector product or a neuron computer operation on analog signals.
    Type: Grant
    Filed: April 14, 1994
    Date of Patent: February 4, 1997
    Assignee: Fujitsu Limited
    Inventors: Hideki Kato, Hideki Yoshizawa, Hiroki Iciki, Kazuo Asakawa
  • Patent number: 5434883
    Abstract: An adaptive equalizer detects characteristics of a transmission line in radio and cable communications and equalizes received signals by using the detected results. Equalization is for not only linear distortion but also nonlinear distortion in accordance with variation of characteristics of the transmission line. The adaptive equalizer includes a characteristic detection unit 11 for detecting real part and imaginary parts of a transfer function by using an output signal corresponding to an input signal of an object to be equalized to compensate for deterioration, for example a transmission line; and an equalizing unit 12 for equalizing an output signal of the object to be equalized 10 in accordance with an unknown input signal by using the detected result of the characteristic detection unit 11.
    Type: Grant
    Filed: January 23, 1992
    Date of Patent: July 18, 1995
    Assignee: Fujitsu Limited
    Inventors: Takashi Kimoto, Yoshinori Yaginuma, Kazuo Asakawa, Shigemi Nagata
  • Patent number: 5410636
    Abstract: A learning system is used in a data processing apparatus for learning an input pattern by obtaining an internal-state value necessary for realizing a desired data conversion by performing a pattern conversion defined by the internal-state value and calculating an output pattern corresponding to the input pattern.
    Type: Grant
    Filed: August 27, 1993
    Date of Patent: April 25, 1995
    Assignee: Fujitsu Limited
    Inventors: Ryusuke Masuoka, Nobuo Watanabe, Takashi Kimoto, Akira Kawamura, Kazuo Asakawa, Jun'ichi Tanahashi
  • Patent number: 5333239
    Abstract: A learning process system is provided for a neural network. The neural network is a layered network comprising an input layer, an intermediate layer and an output layer formed of basic units. In the basic units, a plurality of inputs is multiplied by a weight signal and the products are accumulated, thereby supplying the sum of products. An output signal is obtained using a threshold value function in response to the sum of products. An error signal is generated by an error circuit in response to a difference between the output signal obtained from the output layer and a teacher signal. A weight updating signal is determined in a weight learning circuit by obtaining a weight value in which the sum of the error values falls within an allowable range. Thus, the learning is performed in the layered neural network through use of a back propagation method.
    Type: Grant
    Filed: January 11, 1993
    Date of Patent: July 26, 1994
    Assignee: Fujitsu Limited
    Inventors: Nobuo Watanabe, Takashi Kimoto, Akira Kawamura, Ryusuke Masuoka, Kazuo Asakawa
  • Patent number: 5297237
    Abstract: A learning system is used in a data processing apparatus for learning an input pattern by obtaining an internal-state value necessary for realizing a desired data conversion by performing a pattern conversion defined by the internal-state value and calculating an output pattern corresponding to the input pattern.
    Type: Grant
    Filed: July 17, 1992
    Date of Patent: March 22, 1994
    Assignee: Fujitsu Limited
    Inventors: Ryusuke Masuoka, Nobuo Watanabe, Takashi Kimoto, Akira Kawamura, Kazuo Asakawa, Jun'ichi Tanahashi
  • Patent number: 5272723
    Abstract: A waveform equalizer for equalizing a distorted signal, contains a sampling unit, a time series generating unit, and an equalization neural network unit. The sampling unit samples the level of a distorted signal at a predetermined rate. The time series generating unit serially receives the sampled level and outputs in parallel a predetermined number of the levels which have been last received. The equalization neural network unit receives the outputs of the time series generating unit, and generates an equalized signal of the distorted signal based on the outputs of the time series generating unit using a set of equalization network weights which are preset therein. The waveform equalizer may further contain a distortion characteristic detecting unit, an equalization network weight holding unit, and a selector unit. The distortion characteristic detecting unit detects a distortion characteristic of the distorted signal.
    Type: Grant
    Filed: April 26, 1991
    Date of Patent: December 21, 1993
    Assignee: Fujitsu Limited
    Inventors: Takashi Kimoto, Kazuo Asakawa, Kazuo Kawabata, Yasuyuki Oishi, Eisuke Fukuda, Takeshi Takano
  • Patent number: 5220559
    Abstract: An input analog data is applied to a plurality of neuron units in a time division manner. The analog input data is multiplied by digital weight data which can be changed in accordance with the data of the interconnection between units. The products of the time division analog input data and the digital weight data are added in an integrator. While the present sum of the products is output, the previous sum of the products is output simultaneously with the present data, thereby providing outputs in a pipe-line manner. When the output of the first neuron is produced, the second neuron in the same layer produces an output such that the output of the first layer is produced on the output analog bus in a time division manner. This analog neuron unit constitutes an intermediate layer and an output layer. One layer of neuron units can be repeatedly used by feeding back the output of one layer to the input of another layer, then the neuron system operates as a layered structure.
    Type: Grant
    Filed: August 30, 1989
    Date of Patent: June 15, 1993
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Tsuzuki, Hideichi Endo, Takashi Kawasaki, Toshiharu Matsuda, Kazuo Asakawa, Hideki Kato, Hideki Yoshizawa, Hiroki Iciki, Hiromu Iwamoto, Chikara Tsuchiya, Katsuya Ishikawa, Yoshihide Sugiura
  • Patent number: 5216746
    Abstract: An error absorbing system for absorbing errors through a weight correction is provided in a neuron computer for receiving an analog input signal through a first analog bus in a time divisional manner, performing a sum-of-the-products operation, and outputting an analog output signal to a second analog bus. The error absorbing system includes a dummy node for producing a fixed voltage to an analog bus in a test mode. The dummy node is connected to the analog bus of the neural network. An error measuring unit compulsorily inputs 0 volts to the first analog bus through the dummy node in a first state of a test mode and detects an offset voltage produced in an analog neuron processor through the second analog bus. A weight correcting unit, in a second state of the test mode, determines a temporary weight between the dummy node and the neuron processor. The temporary weight is multiplied by the fixed voltage produced by the dummy node, based on an offset voltage of respective neuron processors.
    Type: Grant
    Filed: February 28, 1990
    Date of Patent: June 1, 1993
    Assignee: Fujitsu Limited
    Inventors: Hideki Yoshizawa, Hiroki Iciki, Hideki Kato, Kazuo Asakawa, Yoshihide Sugiura, Hiroyuki Tsuzuki, Hideichi Endoh, Takashi Kawasaki, Toshiharu Matsuda, Hiromu Iwamoto, Chikara Tsuchiya, Katsuya Ishikawa
  • Patent number: 5207554
    Abstract: A supporting device comprising a first member which supports a springy means for resiliently supporting a second member. The supporting device comprises a detection means for detecting displacement of the springy means with respect to the first member in accordance with the movement of the second member and a biasing means which applies a force to the springy means from the same direction as or from a direction opposite to that of the displacement for changing the elasticity of the springy means in accordance with the movement of the second member.
    Type: Grant
    Filed: July 3, 1990
    Date of Patent: May 4, 1993
    Assignee: Fujitsu Limited
    Inventors: Kazuo Asakawa, Fumiaki Akiya, Fumio Tabata
  • Patent number: 5142666
    Abstract: A learning system in a neuron computer includes a neural network for receiving an analog signal from a first analog bus through an analog input port in a time divisional manner and performing a sum-of-the-products operation, and outputting an analog output signal to a second analog bus. A control pattern memory stores a pattern of a signal for controlling the neural network. A sequencer produces an address of the control pattern memory and a weight memory. The weight memory stores weight data of the neural network. A digital control unit controls the neural network, control pattern memory, sequencer, and weight memory, and executes a learning algorithm. The learning system further includes an input control unit provided on the input side of the neural network for selecting an input signal for executing the learning algorithm input from the digital control unit or an analog input signal input from the analog input port.
    Type: Grant
    Filed: February 28, 1990
    Date of Patent: August 25, 1992
    Assignee: Fujitsu Limited
    Inventors: Hideki Yoshizawa, Hiroki Iciki, Hideki Kato, Kazuo Asakawa, Yoshihide Sugiura, Hiroyuki Tsuzuki, Hideichi Endoh, Takashi Kawasaki, Toshiharu Matsuda, Hiromu Iwamoto, Chikara Tsuchiya, Katsuya Ishikawa
  • Patent number: 5131072
    Abstract: An analogue neuron processor (ANP) performs an operation of sum-of-products of a time divisional analog input signal sequentially input from an analog signal bus and weight data and output an analog signal to an analog signal bus through a nonlinear circuit. A layered type or a feedback type neural network is formed of ANPs. The neural network reads necessary control data from a control pattern memory under the control of micro sequencer and reads the necessary weight data from the weight memory thereby realizing a neuron computer. The neuron computer connects a plurality of ANPs by using a single analog bus, thereby greatly decreasing the number of the wires used for the neural network and also decreasing the size of the circuit. A plurality of ANPs in a single layer simultaneously receives analog signal from an analog bus and carries out a parallel operation in the same time period and ANPs in different layers perform a parallel operation in a pipeline manner, thereby increasing a speed of an operation.
    Type: Grant
    Filed: April 30, 1990
    Date of Patent: July 14, 1992
    Assignee: Fujitsu, Ltd.
    Inventors: Hideki Yoshizawa, Hiroki Iciki, Hideki Kato, Yoshihide Sugiura, Kazuo Asakawa, Hiroyuki Tsuzuki, Hideichi Endo, Takashi Kawasaki, Toshiharu Matsuda, Chikara Tsuchiya, Katsuya Ishikawa, Hiromu Iwamoto
  • Patent number: 5012591
    Abstract: In a force controlling system, a movable member fixed to an elastic member applies a force in correspondence with a force information signal to an object. At this time, an additional force is applied via a driver to the movable member by the positive feedback of the displacement of the elastic member to the driver, so that the reactive force due to the displacement of the elastic member is contradicted by the additional force. As a result, the movable member applies only a force in correspondence to the force information signal to the object.
    Type: Grant
    Filed: October 25, 1989
    Date of Patent: May 7, 1991
    Assignee: Fujitsu Limited
    Inventor: Kazuo Asakawa
  • Patent number: 4921396
    Abstract: A supporting device including a first member which supports a springy means for resiliently supporting a second member. The supporting device includes a detection for detecting displacements of the springy with respect to the first member in accordance with the movement of the second member and a biasing which applies a force to the springy from the same direction as or from a direction opposite to that of the displacement for changing the elasticity of the springy in accordance with the movement of the second member.
    Type: Grant
    Filed: February 16, 1988
    Date of Patent: May 1, 1990
    Assignee: Fujitsu Limited
    Inventors: Kazuo Asakawa, Fumiaki Akiya, Fumio Tabata
  • Patent number: 4872803
    Abstract: In a force controlling system, a movable member fixed to an elastic member applies a force to an object in correspondence with a force reference signal. At this time, an additional force is applied via a driver to the movable member by the positive feedback of the displacement of the elastic member to the driver, so that the reactive force due to the displacement of the elastic member is counteracted by the additional force. As a result, the movable memer applies only a force in correspondence to the force reference signal to the object.
    Type: Grant
    Filed: March 29, 1988
    Date of Patent: October 10, 1989
    Assignee: Fujitsu Limited
    Inventor: Kazuo Asakawa