Abstract: An electronic pen includes a tubular casing, a core body having an end that protrudes from opening in the casing, a strain generating body that receives a force applied to the core body, a plurality of strain sensitive elements arranged on a planar portion of the strain generating body, a control circuit that performs control based on a signal sensed using the plurality of strain sensitive elements, and an electrical conductor that extends in the axial direction of the casing and is electrically connected to a plurality of terminals of the plurality of strain sensitive elements. The plurality of strain sensitive elements is electrically connected to the control circuit via the electrical conductor.

Abstract: An electronic pen includes a tubular casing, a core body having an end that protrudes from opening in the casing, a strain generating body that receives a force applied to the core body, a plurality of strain sensitive elements arranged on a planar portion of the strain generating body, a control circuit that performs control based on a signal sensed using the plurality of strain sensitive elements, and an electrical conductor that extends in the axial direction of the casing and is electrically connected to a plurality of terminals of the plurality of strain sensitive elements. The plurality of strain sensitive elements is electrically connected to the control circuit via the electrical conductor.

Abstract: Provided is a substrate for a solar cell, wherein a flat chamfered portion is formed on one corner of a silicon substrate having a square shape in a planar view, or a notch is formed on the corner or close to the corner. This invention makes it possible to easily check the position of the substrate and determine the direction of the substrate in a solar cell manufacturing step, and suppresses failures generated due to the direction of the substrate.

Abstract: A position indicator includes a resonance circuit housed in a casing and having an inductance element and a capacitor variable in capacitance, such that the resonance circuit resonates at a predetermined frequency. The position indicator is electromagnetically coupled to a position detecting device. The capacitor includes a dielectric, an electrode disposed on one side of the dielectric, and a trimming electrode disposed on another side of the dielectric such that at least one part of a region of the trimming electrode is opposed to the electrode with the dielectric interposed in between, to form the capacitance of the capacitor. The capacitor is housed in the casing such that the at least one part can be exposed from the casing. The area of the at least one part exposed from the casing to the outside is changed so as to correspond to a resonance frequency desired for the resonance circuit.

Abstract: Provided is a substrate for a solar cell, wherein a flat chamfered portion is formed on one corner of a silicon substrate having a square shape in a planar view, or a notch is formed on the corner or close to the corner. This invention makes it possible to easily check the position of the substrate and determine the direction of the substrate in a solar cell manufacturing step, and suppresses failures generated due to the direction of the substrate.

Abstract: A splice housing projects from a bottom wall in a space on a side portion of a main pathway of a wire harness, the main pathway being bounded by the bottom wall and a circumferential wall of a main body of a protector. The splice housing includes an outer framing wall having two squared U-shaped side walls and a connecting wall, and further includes a medial dividing wall provided parallel to the two side walls. At least one flat board-shaped dividing plate configured with an insulating resin is provided fitted within the outer framing wall, the dividing plate including a through-hole for the medial dividing wall. Perpendicular walls, configured by the two side walls and the medial dividing wall of the splice housing, and horizontal walls, configured by the dividing plate, delimit a plurality of splice housing chambers provided on a plurality of vertical levels and rows.

Abstract: A splice housing projects from a bottom wall in a space on a side portion of a main pathway of a wire harness, the main pathway being bounded by the bottom wall and a circumferential wall of a main body of a protector. The splice housing includes dividing walls projecting at predetermined intervals and a sealing wall at one end of the dividing walls. A plurality of splice housing chambers are provided in alignment between the dividing walls. A side opposite the sealing wall of each of the splice housing chambers forms an opening for insertion. Each of the splice housing chambers has a height capable of accommodating splices on at least two vertical levels. Of the splices branching from the wire harness, splices having a splice sheet wrapped around an outer circumferential surface thereof and splices covered by an insulating resin cap are accommodated vertically adjacent.

Abstract: A position indicator includes a resonance circuit housed in a casing and having an inductance element and a capacitor variable in capacitance, such that the resonance circuit resonates at a predetermined frequency. The position indicator is electromagnetically coupled to a position detecting device. The capacitor includes a dielectric, an electrode disposed on one side of the dielectric, and a trimming electrode disposed on another side of the dielectric such that at least one part of a region of the trimming electrode is opposed to the electrode with the dielectric interposed in between, to form the capacitance of the capacitor. The capacitor is housed in the casing such that the at least one part can be exposed from the casing. The area of the at least one part exposed from the casing to the outside is changed so as to correspond to a resonance frequency desired for the resonance circuit.

Abstract: A splice housing projects from a bottom wall in a space on a side portion of a main pathway of a wire harness, the main pathway being bounded by the bottom wall and a circumferential wall of a main body of a protector. The splice housing includes an outer framing wall having two squared U-shaped side walls and a connecting wall, and further includes a medial dividing wall provided parallel to the two side walls. At least one flat board-shaped dividing plate configured with an insulating resin is provided fitted within the outer framing wall, the dividing plate including a through-hole for the medial dividing wall. Perpendicular walls, configured by the two side walls and the medial dividing wall of the splice housing, and horizontal walls, configured by the dividing plate, delimit a plurality of splice housing chambers provided on a plurality of vertical levels and rows.

Abstract: A splice housing projects from a bottom wall in a space on a side portion of a main pathway of a wire harness, the main pathway being bounded by the bottom wall and a circumferential wall of a main body of a protector. The splice housing includes dividing walls projecting at predetermined intervals and a sealing wall at one end of the dividing walls. A plurality of splice housing chambers are provided in alignment between the dividing walls. A side opposite the sealing wall of each of the splice housing chambers forms an opening for insertion. Each of the splice housing chambers has a height capable of accommodating splices on at least two vertical levels. Of the splices branching from the wire harness, splices having a splice sheet wrapped around an outer circumferential surface thereof and splices covered by an insulating resin cap are accommodated vertically adjacent.

Abstract: A single-nucleotide polymorphism in the UBE2E2 locus or C2CD4A-C2CD4B locus is analyzed and type II diabetes is examined based on the results of the analysis.

Abstract: Provided is a substrate for a solar cell, wherein a flat chamfered portion is formed on one corner of a silicon substrate having a square shape in a planar view, or a notch is formed on the corner or close to the corner. This invention makes it possible to easily check the position of the substrate and determine the direction of the substrate in a solar cell manufacturing step, and suppresses failures generated due to the direction of the substrate.

Abstract: Kits and methods for selectively assaying a target adiponectin multimer in a biological sample. Such methods accurately evaluate the relationship between a disease and adiponectin through selective assay of adiponectin multimers and provide information that cannot be obtained through measurement of the total amount of adiponectin alone. A method for selectively assaying a target adiponectin multimer in a biological sample comprising distinguishing target adiponectin multimer from the other adiponectin multimers by using a protease and/or an antibody.

Abstract: A resin sealing semiconductor device (2) having a structure in which a portion to be sealed of components including a plurality of chip mounting board, a semiconductor chip mounted to a front surface of each chip mounting board, and a plurality of leads provided correspondingly to each chip mounting board is embedded in resin molded portions (41 and 42) molded into a generally plate shape, and outer lead portions of the plurality of leads (16 and 17) are led out in line from a side surface at one end in a width direction of the resin molded portions, and back surfaces as exposed surfaces (11u1 to 11w1 and 12u1 to 12w1) of each chip mounting board are placed on one surfaces of the resin molded portions (41 and 42), wherein a plurality of positioning protrusions (50) are provided on one surfaces of the resin molded portions (41 and 42), and a protrusion height of the positioning protrusions is set so that a gap to be filled with insulating resin is formed between each part of the exposed surface of each chip mo

Abstract: A semiconductor device having a plurality of semiconductor chips mounted on a lead frame (10) and required portions covered with seal portions in which: the plurality of semiconductor chips are divided into a first group of semiconductor chips (Dx to Dz) and a second group of semiconductor chips (Du to Dw and Thx to Thz); both groups of semiconductor chips are mounted on the lead frame (10) at a distance from each other; the seal portions are comprised of first and second resin-seal portions (41 and 42) which cover the first and second groups of semiconductor chips, respectively, along with required portions of the lead frame; both resin-seal portions are mechanically coupled with each other by coupling portions; and a group of read terminals respectively connected to circuits within the first resin-seal portion and circuits within the second resin-seal portion are led out through a gap between the first resin-seal portion (41) and the second resin-seal portion (42).

Abstract: Kits and methods for selectively assaying a target adiponectin multimer in a biological sample. Such methods accurately evaluate the relationship between a disease and adiponectin through selective assay of adiponectin multimers and provide information that cannot be obtained through measurement of the total amount of adiponectin alone. A method for selectively assaying a target adiponectin multimer in a biological sample comprising distinguishing target adiponectin multimer from the other adiponectin multimers by using a protease and/or an antibody.

Abstract: Methods for selectively assaying a target adiponectin multimer in a biological sample. Such methods accurately evaluate the relationship between a disease and adiponectin through selective assay of adiponectin multimers and provide information that cannot be obtained through measurement of the total amount of adiponectin alone. A method for selectively assaying of a target adiponectin multimer in a biological sample comprising distinguishing target adiponectin multimer from the other adiponectin multimers by using a protease and/or an antibody.

Abstract: A resin sealing semiconductor device (2) having a structure in which a portion to be sealed of components including a plurality of chip mounting board, a semiconductor chip mounted to a front surface of each chip mounting board, and a plurality of leads provided correspondingly to each chip mounting board is embedded in resin molded portions (41 and 42) molded into a generally plate shape, and outer lead portions of the plurality of leads (16 and 17) are led out in line from a side surface at one end in a width direction of the resin molded portions, and back surfaces as exposed surfaces (11u1 to 11w1 and 12u1 to 12w1) of each chip mounting board are placed on one surfaces of the resin molded portions (41 and 42), wherein a plurality of positioning protrusions (50) are provided on one surfaces of the resin molded portions (41 and 42), and a protrusion height of the positioning protrusions is set so that a gap to be filled with insulating resin is formed between each part of the exposed surface of each chip mo

Abstract: A vehicle steering control device is provided that suppresses changes in the steering force accompanying the shock transmitted from the road surface during the steering wheel return operation. The vehicle steering device is a steer-by-wire steering device where a steering wheel receiving the steering input which is transmitted electronically to the steering unit which turns steered road wheels of the vehicle. The steering reaction force correction (Gf×F) corresponding to road surface reaction force F is applied to the steering wheel. The device includes a turn/return sensor that senses turn/return of the steering wheel, and during return of steering wheel, road surface reaction force feedback gain Gf is made smaller than the initial turning.

Abstract: A semiconductor device having a plurality of semiconductor chips mounted on a lead frame (10) and required portions covered with seal portions in which: the plurality of semiconductor chips are divided into a first group of semiconductor chips (Dx to Dz) and a second group of semiconductor chips (Du to Dw and Thx to Thz); both groups of semiconductor chips are mounted on the lead frame (10) at a distance from each other; the seal portions are comprised of first and second resin-seal portions (41 and 42) which cover the first and second groups of semiconductor chips, respectively, along with required portions of the lead frame; both resin-seal portions are mechanically coupled with each other by coupling portions; and a group of read terminals respectively connected to circuits within the first resin-seal portion and circuits within the second resin-seal portion are led out through a gap between the first resin-seal portion (41) and the second resin-seal portion (42).