Abstract: A semiconductor device includes a semiconductor substrate; a metal electrode wiring laminate on the semiconductor substrate, the metal electrode wiring laminate being patterned with a predetermined wiring pattern; the metal electrode wiring laminate including an undercoating barrier metal laminate and aluminum or aluminum alloy film on the undercoating barrier metal laminate; and organic passivation film covering the metal electrode wiring laminate, wherein the barrier metal laminate is a three-layered laminate including titanium films sandwiching a titanium nitride film. The semiconductor device according to the invention facilitates improving the moisture resistance of the portion of the barrier metal laminate exposed temporarily in the manufacturing process, facilitates employing only one passivation film, facilitates preventing the failures caused by cracks from occurring and the failures caused by Si nodules remaining in the aluminum alloy from increasing.

Abstract: A semiconductor device includes a semiconductor substrate; a metal electrode wiring laminate on the semiconductor substrate, the metal electrode wiring laminate being patterned with a predetermined wiring pattern; the metal electrode wiring laminate including an undercoating barrier metal laminate and aluminum or aluminum alloy film on the undercoating barrier metal laminate; and organic passivation film covering the metal electrode wiring laminate, wherein the barrier metal laminate is a three-layered laminate including titanium films sandwiching a titanium nitride film. The semiconductor device according to the invention facilitates improving the moisture resistance of the portion of the barrier metal laminate exposed temporarily in the manufacturing process, facilitates employing only one passivation film, facilitates preventing the failures caused by cracks from occurring and the failures caused by Si nodules remaining in the aluminum alloy from increasing.

Abstract: A semiconductor device includes a semiconductor substrate; a metal electrode wiring laminate on the semiconductor substrate, the metal electrode wiring laminate being patterned with a predetermined wiring pattern; the metal electrode wiring laminate including an undercoating barrier metal laminate and aluminum or aluminum alloy film on the undercoating barrier metal laminate; and organic passivation film covering the metal electrode wiring laminate, wherein the barrier metal laminate is a three-layered laminate including titanium films sandwiching a titanium nitride film. The semiconductor device according to the invention facilitates improving the moisture resistance of the portion of the barrier metal laminate exposed temporarily in the manufacturing process, facilitates employing only one passivation film, facilitates preventing the failures caused by cracks from occurring and the failures caused by Si nodules remaining in the aluminum alloy from increasing.

Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: A semiconductor device includes a semiconductor substrate; a metal electrode wiring laminate on the semiconductor substrate, the metal electrode wiring laminate being patterned with a predetermined wiring pattern; the metal electrode wiring laminate including an undercoating barrier metal laminate and aluminum or aluminum alloy film on the undercoating barrier metal laminate; and organic passivation film covering the metal electrode wiring laminate, wherein the barrier metal laminate is a three-layered laminate including titanium films sandwiching a titanium nitride film. The semiconductor device according to the invention facilitates improving the moisture resistance of the portion of the barrier metal laminate exposed temporarily in the manufacturing process, facilitates employing only one passivation film, facilitates preventing the failures caused by cracks from occurring and the failures caused by Si nodules remaining in the aluminum alloy from increasing.

Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: On top of a silicon substrate, a polyimide film with a thickness of 10 ?m is formed. On top of this, a magnetic thin film that is a polyimide film containing Fe fine particles and that has a thickness of 20 ?m is formed. On top of this magnetic thin film, a patterned Ti/Au film and a Ti/Au connection conductor are formed. On top of this, a polyimide film with a thickness of 10 ?m, and a Cu coil with a height 35 ?m, width 90 ?m, space 25 ?m, and a polyimide layer that fills the spaces in the Cu coil are formed. On top of this, via a polyimide film with a thickness of 10 ?m, a magnetic thin film that is a polyimide film containing Fe particles and that has a thickness of 20 ?m is formed. This thin film inductor has a small alternating current resistance. The present invention provides a magnetic thin film that is well suited for mass production, can be manufactured easily, can be made into a thick film, has soft magnetic qualities, and is inexpensive.

Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: On top of a silicon substrate, a polyimide film with a thickness of 10 &mgr;m is formed. On top of this, a magnetic thin film that is a polyimide film containing Fe fine particles and that has a thickness of 20 &mgr;m is formed. On top of this magnetic thin film, a patterned Ti/Au film and a Ti/Au connection conductor are formed. On top of this, a polyimide film with a thickness of 10 &mgr;m, and a Cu coil with a height 35 &mgr;m, width 90 &mgr;m, space 25 &mgr;m, and a polyimide layer that fills the spaces in the Cu coil are formed. On top of this, via a polyimide film with a thickness of 10 &mgr;m, a magnetic thin film that is a polyimide film containing Fe particles and that has a thickness of 20 &mgr;m is formed. This thin film inductor has a small alternating current resistance. The present invention provides a magnetic thin film that is well suited for mass production, can be manufactured easily, can be made into a thick film, has soft magnetic qualities, and is inexpensive.

Abstract: In the surface layer of an n-type semiconductor substrate 1, an n+ cathode region 2 and a p+ anode region 3 are formed, on which a cathode electrode 5 and an anode electrode 6 are formed, respectively. An oxide film 4 serving as a surface protection film is formed partially on the n+ cathode region 2, p+ anode region 3 and n-type semiconductor substrate 1 sandwiched by these regions. On the oxide film 4, a semi-insulating silicon nitride film 10 having a thickness of 1 &mgr;m is deposited by the plasma CVD technique. The film composition of the surface layer of the semi-insulating silicon nitride film 10 is changed into silicon nitride film (Si3N4) having a thickness of about 0.1 &mgr;m to form an insulating silicon nitride film 8. Then, the composition of the underlying semi-insulating silicon nitride film is not changed. The semi-insulating silicon nitride film serves as a field plate so that concentration of the electric field on the surface can be relaxed.

Abstract: On top of a silicon substrate, a polyimide film with a thickness of 10 &mgr;m is formed. On top of this, a magnetic thin film that is a polyimide film containing Fe fine particles and that has a thickness of 20 &mgr;m is formed. On top of this magnetic thin film, a patterned Ti/Au film and a Ti/Au connection conductor are formed. On top of this, a polyimide film with a thickness of 10 &mgr;m, and a Cu coil with a height 35 &mgr;m, width 90 &mgr;m, space 25 &mgr;m, and a polyimide layer that fills the spaces in the Cu coil are formed. On top of this, via a polyimide film with a thickness of 10 &mgr;m, a magnetic thin film that is a polyimide film containing Fe particles and that has a thickness of 20 &mgr;m is formed. This thin film inductor has a small alternating current resistance. The present invention provides a magnetic thin film that is well suited for mass production, can be manufactured easily, can be made into a thick film, has soft magnetic qualities, and is inexpensive.

Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.

Abstract: In a comb-like or wedge-like electron emitting device, an emitter or both an emitter and an anode electrode are processed from a single-crystal silicon thin film of an SOI wafer. The single-crystal silicon thin film in portions other than the processed portion is removed so that the silicon oxide layer is dug down further slightly. A gate electrode for applying an electric field in order to draw electrons out of the emitter is provided in the dug-down portion. When the end and side faces of the emitter are formed as (111) faces by anisotropic etching in the condition that the single-crystal silicon thin film is oriented to a (100) face, the emitter has a sharp edge at about 55.degree. with respect to the substrate. In a conical electron emitting device, the gate electrode is constituted by a single-crystal silicon thin film of an SOI wafer so that a pyramid surrounded by the (111) faces is formed on the single-crystal silicon substrate.

Abstract: A battery mounted integrated circuit device comprises a semiconductor chip in which an integrated circuit including a plurality of power receiving circuits with different operating voltages is formed; a thin film laminated battery made of a solid electrolytic film mounted on the semiconductor chip for producing a plurality of voltages; and a power source switch incorporated in said integrated circuit for connecting said battery to the power receiving circuits to supply the plurality of voltages from the battery to the power receiving circuits on demand.

Abstract: In a comb-like or wedge-like electron emitting device, an emitter or both an emitter and an anode electrode are processed from a single-crystal silicon thin film of an SOI wafer. The single-crystal silicon thin film in portions other than the processed portion is removed so that the silicon oxide layer is dug down further slightly. A gate electrode for applying an electric field in order to draw electrons out of the emitter is provided in the dug-down portion. When the end and side faces of the emitter are formed as (111) faces by anisotropic etching in the condition that the single-crystal silicon thin film is oriented to a (100) face, the emitter has a sharp edge at about 55.degree. with respect to the substrate. In a conical electron emitting device, the gate electrode is constituted by a single-crystal silicon thin film of an SOI wafer so that a pyramid surrounded by the (111) faces is formed on the single-crystal silicon substrate.

Abstract: A lateral semiconductor device with enhanced breakdown characteristics includes a semiconductor substrate composite of first and second semiconductor substrates bonded to one another via an oxide film. An insulation film is buried in a separation trench which extends from a major surface of the first semiconductor substrate to the oxide film. An element region of greater than 10 .mu.m in thickness is isolated by the separation trench from other element regions. First and second diffusion regions of opposite conductivity type are formed on the element region. The potential of the second substrate is fixed at one-third of the designed maximum breakdown voltage of the lateral semiconductor device. Alternatively, if the element region is 10 .mu.m or less in thickness, the potential of the second substrate is fixed at one-half of the designed maximum breakdown voltage of the lateral semiconductor device.

Abstract: A switching apparatus obtains a large switching current by multiplying the number of electrons emitted by field emission from a cold cathode. The switching apparatus is driven by an optical wave and includes a recess portion of an insulation layer formed on a silicon substrate, a cold cathode formed on the insulation layer comprising many comb-tooth like tips extending from one side above the recess portion, a gate electrode disposed on the recess portion on the side of the cold cathode, an anode formed on the insulation layer and extending from another side opposed facing to the one side above the recess portion, an optically transparent sealing member comprising a recess portion on its under surface for enclosing a dilute nitrogen gas in a vacuum space, and a semiconductor laser, supported on the sealing member by a support member, for irradiating a laser beam through the sealing member into the space.

Abstract: A lateral semiconductor device with enhanced breakdown characteristics includes a semiconductor substrate composite of first and second semiconductor substrates bonded to one another via an oxide film. An insulation film is buried in a separation trench which extends from a major surface of the first semiconductor substrate to the oxide film. An element region of 10 .mu.m or more in thickness is isolated by the separation trench from other element regions. First and second diffusion regions of opposite conductivity type are formed on the element region. The potential of the second substrate is fixed at one-third of the designed maximum breakdown voltage of the lateral semiconductor device. Alternatively, if the element region is 10 .mu.m or less in thickness, the potential of the second substrate is fixed at one-half of the designed maximum breakdown voltage of the lateral semiconductor device.