Patents by Inventor Kazuo Tanaka

Kazuo Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240321155
    Abstract: A display device includes a display panel including: a first subpixel including a first light-emitting element; and a second subpixel adjacent to the first subpixel and including a second light-emitting element. The display device includes a circuit unit calculating a degradation amount of the first light-emitting element in accordance with a light-emission state of the second light-emitting element, and calculating a compensation value of the first light-emitting element in accordance with the calculated degradation amount of the first light-emitting element.
    Type: Application
    Filed: December 29, 2020
    Publication date: September 26, 2024
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: TATSUHIKO SUYAMA, KAZUO NAKAMURA, NORIYUKI TANAKA, KAZUKI TAKAHASHI
  • Patent number: 12058835
    Abstract: An information processing apparatus comprises a first heat generation circuit, a second heat generation circuit, a blocking assembly, and a processor. The blocking assembly performs a first operation of blocking air flowing from the first heat generation circuit toward the second heat generation circuit or a second operation of passing the air, and the processor is configure to instruct the blocking assembly to perform the first operation in a case where a temperature of the air is higher than a predetermined value, and instruct the blocking assembly to perform the second operation in a case where the temperature of the air is lower than the predetermined value.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: August 6, 2024
    Assignee: FUJITSU LIMITED
    Inventors: Kiichi Koyama, Tatsuya Sudo, Kazuo Tanaka, Hirotaka Shikada, Hiroshi Nagaoka, Hirofumi Konno, Takatoshi Katou, Nobuyoshi Aida, Masafumi Asano, Kazuo Kubo
  • Publication number: 20230036035
    Abstract: An information processing apparatus comprises a first heat generation circuit, a second heat generation circuit, a blocking assembly, and a processor. The blocking assembly performs a first operation of blocking air flowing from the first heat generation circuit toward the second heat generation circuit or a second operation of passing the air, and the processor is configure to instruct the blocking assembly to perform the first operation in a case where a temperature of the air is higher than a predetermined value, and instruct the blocking assembly to perform the second operation in a case where the temperature of the air is lower than the predetermined value.
    Type: Application
    Filed: April 27, 2022
    Publication date: February 2, 2023
    Applicant: FUJITSU LIMITED
    Inventors: Kiichi KOYAMA, Tatsuya SUDO, Kazuo TANAKA, Hirotaka SHIKADA, Hiroshi NAGAOKA, Hirofumi KONNO, Takatoshi KATOU, Nobuyoshi AIDA, Masafumi ASANO, Kazuo KUBO
  • Patent number: 11538981
    Abstract: A vibration element includes: a base; a first arm continuous with the base; a second arm that is continuous with the base and is adjacent to the first arm; a first electrode disposed on the first arm, the second arm, and the base; a first piezoelectric layer that has a first polarity and that is disposed on the first electrode on the first arm; a second piezoelectric layer that has a second polarity different from the first polarity and that is disposed on the first electrode on the second arm; an insulating layer disposed on the first electrode on the base; and a second electrode disposed on the first piezoelectric layer, the second piezoelectric layer, and the insulating layer.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: December 27, 2022
    Inventors: Kenichi Kurokawa, Yukio Kitahara, Kazuo Tanaka
  • Patent number: 11376564
    Abstract: A method for manufacturing a carbon dioxide adsorbent includes: forming a kneaded product containing a hydrophilic fiber, a powdery porous material, and an aqueous hydrophilic binder dispersion into particles and drying the particles to generate porous material particles containing the hydrophilic fiber and the powdery porous material combined by the hydrophilic binder; and preparing an aqueous amine solution having an amine concentration of 5% or more and 70% or less and a temperature of 10° C. or higher and 100° C. or lower, impregnating the aqueous amine solution into the porous material particles, and aeration-drying the porous material particles impregnating the amine. The carbon dioxide adsorbent contains the porous material particles and the amine carried by the porous material particles, the porous material particles containing the hydrophilic fiber and the powdery porous material combined by the hydrophilic binder.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: July 5, 2022
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Masahiro Negami, Takeshi Okumura, Ikuo Shimomura, Katsuhiro Yoshizawa, Yoshimichi Nomura, Kazuo Tanaka, Shohei Nishibe
  • Patent number: 11291949
    Abstract: A carbon dioxide separation recovery method includes: bringing a particulate carbon dioxide adsorbent and a treatment target gas containing carbon dioxide into contact with each other to make the carbon dioxide adsorbent adsorb the carbon dioxide contained in the treatment target gas; and bringing the carbon dioxide adsorbent which has adsorbed the carbon dioxide and superheated steam into contact with each other to desorb the carbon dioxide from the carbon dioxide adsorbent and thereby regenerate the carbon dioxide adsorbent, and recovering the desorbed carbon dioxide. A saturation temperature of the superheated steam which is brought into contact with the carbon dioxide adsorbent is not more than a temperature of the carbon dioxide adsorbent which contacts the superheated steam. The regenerated carbon dioxide adsorbent is utilized for adsorption of the carbon dioxide again without being subjected to a drying step.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: April 5, 2022
    Assignees: RESEARCH INSTITUTE OF INNOVATIVE TECHNOLOGY FOR THE EARTH, KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Shin Yamamoto, Hidetaka Yamada, Katsunori Yogo, Shohei Nishibe, Kazuo Tanaka, Katsuhiro Yoshizawa, Takeshi Okumura, Ryohei Numaguchi
  • Patent number: 11285438
    Abstract: A carbon dioxide separation recovery method includes: bringing a particulate carbon dioxide adsorbent and a treatment target gas containing carbon dioxide into contact with each other to make the carbon dioxide adsorbent adsorb the carbon dioxide contained in the treatment target gas; and bringing the carbon dioxide adsorbent which has adsorbed the carbon dioxide and desorption steam into contact with each other to desorb the carbon dioxide from the carbon dioxide adsorbent, and thereby, regenerate the carbon dioxide adsorbent and recover the desorbed carbon dioxide. The step of recovering the carbon dioxide includes utilizing a recovery gas as a heat source of a heat exchanger, the recovery gas containing the desorption steam which has contacted the carbon dioxide adsorbent and the carbon dioxide which has been desorbed from the carbon dioxide adsorbent.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: March 29, 2022
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Shohei Nishibe, Kazuo Tanaka, Katsuhiro Yoshizawa, Takeshi Okumura, Ryohei Numaguchi
  • Publication number: 20210229032
    Abstract: A carbon dioxide separation recovery method includes: bringing a particulate carbon dioxide adsorbent and a treatment target gas containing carbon dioxide into contact with each other to make the carbon dioxide adsorbent adsorb the carbon dioxide contained in the treatment target gas; and bringing the carbon dioxide adsorbent which has adsorbed the carbon dioxide and superheated steam into contact with each other to desorb the carbon dioxide from the carbon dioxide adsorbent and thereby regenerate the carbon dioxide adsorbent, and recovering the desorbed carbon dioxide. A saturation temperature of the superheated steam which is brought into contact with the carbon dioxide adsorbent is not more than a temperature of the carbon dioxide adsorbent which contacts the superheated steam. The regenerated carbon dioxide adsorbent is utilized for adsorption of the carbon dioxide again without being subjected to a drying step.
    Type: Application
    Filed: October 29, 2019
    Publication date: July 29, 2021
    Applicants: RESEARCH INSTITUTE OF INNOVATIVE TECHNOLOGY FOR THE EARTH, KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Shin YAMAMOTO, Hidetaka YAMADA, Katsunori YOGO, Shohei NISHIBE, Kazuo TANAKA, Katsuhiro YOSHIZAWA, Takeshi OKUMURA, Ryohei NUMAGUCHI
  • Publication number: 20210187438
    Abstract: A carbon dioxide separation recovery method includes: bringing a particulate carbon dioxide adsorbent and a treatment target gas containing carbon dioxide into contact with each other to make the carbon dioxide adsorbent adsorb the carbon dioxide contained in the treatment target gas; and bringing the carbon dioxide adsorbent which has adsorbed the carbon dioxide and desorption steam into contact with each other to desorb the carbon dioxide from the carbon dioxide adsorbent, and thereby, regenerate the carbon dioxide adsorbent and recover the desorbed carbon dioxide. The step of recovering the carbon dioxide includes utilizing a recovery gas as a heat source of a heat exchanger, the recovery gas containing the desorption steam which has contacted the carbon dioxide adsorbent and the carbon dioxide which has been desorbed from the carbon dioxide adsorbent.
    Type: Application
    Filed: October 29, 2019
    Publication date: June 24, 2021
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Shohei NISHIBE, Kazuo TANAKA, Katsuhiro YOSHIZAWA, Takeshi OKUMURA, Ryohei NUMAGUCHI
  • Publication number: 20200411746
    Abstract: A vibration element includes: a base; a first arm continuous with the base; a second arm that is continuous with the base and is adjacent to the first arm; a first electrode disposed on the first arm, the second arm, and the base; a first piezoelectric layer that has a first polarity and that is disposed on the first electrode on the first arm; a second piezoelectric layer that has a second polarity different from the first polarity and that is disposed on the first electrode on the second arm; an insulating layer disposed on the first electrode on the base; and a second electrode disposed on the first piezoelectric layer, the second piezoelectric layer, and the insulating layer.
    Type: Application
    Filed: June 25, 2020
    Publication date: December 31, 2020
    Inventors: Kenichi KUROKAWA, Yukio KITAHARA, Kazuo TANAKA
  • Publication number: 20200197905
    Abstract: A method for manufacturing a carbon dioxide adsorbent includes: forming a kneaded product containing a hydrophilic fiber, a powdery porous material, and an aqueous hydrophilic binder dispersion into particles and drying the particles to generate porous material particles containing the hydrophilic fiber and the powdery porous material combined by the hydrophilic binder; and preparing an aqueous amine solution having an amine concentration of 5% or more and 70% or less and a temperature of 10° C. or higher and 100° C. or lower, impregnating the aqueous amine solution into the porous material particles, and aeration-drying the porous material particles impregnating the amine. The carbon dioxide adsorbent contains the porous material particles and the amine carried by the porous material particles, the porous material particles containing the hydrophilic fiber and the powdery porous material combined by the hydrophilic binder.
    Type: Application
    Filed: April 26, 2018
    Publication date: June 25, 2020
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Masahiro NEGAMI, Takeshi OKUMURA, Ikuo SHIMOMURA, Katsuhiro YOSHIZAWA, Yoshimichi NOMURA, Kazuo TANAKA, Shohei NISHIBE
  • Publication number: 20180197850
    Abstract: A semiconductor integrated circuit device with a “PAD on I/O cell” structure in which a pad lead part is disposed almost in the center of an I/O part so as to reduce the chip layout area. In the I/O part, a transistor lies nearest to the periphery of the semiconductor chip. When seen in a plan view of the I/O part, a resistance lies above the transistor and a first and a second diode lie above the resistance; a second transistor lies above the diodes; and a logic block lies above the second transistor with a pad lead part, for example, formed in a metal wiring layer, therebetween. This permits the pad through the second transistor to be on the same node and therefore the pad lead part can be disposed almost in the center of the I/O part.
    Type: Application
    Filed: March 12, 2018
    Publication date: July 12, 2018
    Inventors: Takeo TOBA, Kazuo TANAKA, Hiroyasu ISHIZUKA
  • Patent number: 9987579
    Abstract: An oil separator includes a plurality of separation discs rotatable together with a spindle and layered in an axis direction of the spindle, a nozzle that protrudes from a lower circumferential face of the spindle and configured to rotate the spindle by injection of an oil, a lower case has a gas inflow part into which blow-by gas flows, an oil discharge part into which an oil after separation is discharged, an upper case that sections together with the lower case a housing chamber in which spindle, separation discs and nozzle are housed, and a sectioning member that sections the housing chamber into a primary separation chamber, configured to primarily separate the oil mist, and a secondary separation chamber that secondarily separates the oil mist included in the gas after primary separation, and forms between the nozzle and the separation discs a communication opening that guides the gas being treated.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: June 5, 2018
    Assignee: Tokyo Roki Co., Ltd.
    Inventors: Kosaku Ishida, Yoshitaka Watanabe, Kazuo Tanaka, Takayuki Hoshi, Takatsugu Kurosawa
  • Patent number: 9947651
    Abstract: A semiconductor integrated circuit device with a “PAD on I/O cell” structure in which a pad lead part is disposed almost in the center of an I/O part so as to reduce the chip layout area. In the I/O part, a transistor lies nearest to the periphery of the semiconductor chip. When seen in a plan view of the I/O part, a resistance lies above the transistor and a first and a second diode lie above the resistance; a second transistor lies above the diodes; and a logic block lies above the second transistor with a pad lead part, for example, formed in a metal wiring layer, therebetween. This permits the pad through the second transistor to be on the same node and therefore the pad lead part can be disposed almost in the center of the I/O part.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: April 17, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Takeo Toba, Kazuo Tanaka, Hiroyasu Ishizuka
  • Patent number: 9515019
    Abstract: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: December 6, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Takahiro Hayashi, Shunsuke Toyoshima, Kazuo Sakamoto, Naozumi Morino, Kazuo Tanaka
  • Patent number: 9458852
    Abstract: A centrifugal fan includes an impeller, a motor portion, and a housing. The housing includes an upper plate portion, a lower plate portion arranged to have the motor portion fixed thereto; and a side wall portion. A flow control member is arranged to extend in a line along a boundary between an inside surface of the side wall portion and one of a lower surface of the upper plate portion and an upper surface of the lower plate portion. The flow control member includes a flow control surface arranged to extend radially outward from the one of the lower surface of the upper plate portion and the upper surface of the lower plate portion to the inside surface of the side wall portion while becoming more distant from the one of the lower surface of the upper plate portion and the upper surface of the lower plate portion.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: October 4, 2016
    Assignee: NIDEC CORPORATION
    Inventors: Seung-sin Yoo, Tomohiro Hasegawa, Shunji Matsumoto, Kazuo Tanaka, Takuro Kawano, Yuji Katsurayama, Atsushi Mukai, Noriaki Yamamoto
  • Patent number: 9418881
    Abstract: Provided is a substrate processing apparatus capable of suppressing inferiority when heat treatment is controlled using a temperature sensor.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: August 16, 2016
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Shinobu Sugiura, Masaaki Ueno, Kazuo Tanaka, Masashi Sugishita, Hideto Yamaguchi, Kenji Shirako
  • Publication number: 20160233154
    Abstract: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.
    Type: Application
    Filed: April 14, 2016
    Publication date: August 11, 2016
    Inventors: Takahiro Hayashi, Shunsuke Toyoshima, Kazuo Sakamoto, Naozumi Morino, Kazuo Tanaka
  • Patent number: 9379100
    Abstract: A semiconductor integrated circuit device comprises I/O cells arranged around a core region. Each of the I/O cells comprises a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in which the I/O buffer circuit is arranged overlap with a region in which a pad for the I/O cell is arranged. The I/O logic region and the I/O buffer region are arranged side by side in a direction parallel to a side of the core region.
    Type: Grant
    Filed: November 28, 2015
    Date of Patent: June 28, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuo Sakamoto, Naozumi Morino, Kazuo Tanaka, Hiroyasu Ishizuka
  • Patent number: 9343460
    Abstract: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: May 17, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Takahiro Hayashi, Shunsuke Toyoshima, Kazuo Sakamoto, Naozumi Morino, Kazuo Tanaka