Patents by Inventor Kazuo Watanabe

Kazuo Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200304073
    Abstract: A power amplifier circuit includes an amplifier transistor having a first terminal supplied with a power supply voltage that changes in accordance with an amplitude level of an input signal, and a second terminal supplied with the input signal and a bias current, an amplified signal obtained by amplifying the input signal being outputted from the first terminal, a bias circuit that outputs the bias current from an output terminal thereof in accordance with a reference current supplied to an input terminal thereof, and a regulation circuit that generates a regulation current for regulating the bias current in accordance with a change in the power supply voltage. The regulation current increases with an increase in the power supply voltage, and decreases with a decrease in the power supply voltage. The regulation circuit extracts the regulation current from at least one of the reference current or the bias current.
    Type: Application
    Filed: March 17, 2020
    Publication date: September 24, 2020
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Satoshi ARAYASHIKI
  • Patent number: 10715084
    Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: July 14, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Masatoshi Hase, Norio Hayashi, Kazuo Watanabe, Yuuri Honda
  • Publication number: 20200212846
    Abstract: A power amplifier circuit includes a first transistor; a first bias circuit that supplies a first bias current or voltage; a capacitor; a first inductor; a second inductor; a second transistor; a second bias circuit that supplies a second bias current or voltage; a third inductor; a third transistor; a third bias circuit that supplies a third bias current or voltage; and a fourth inductor.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 2, 2020
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Satoshi ARAYASHIKI
  • Patent number: 10693418
    Abstract: The present disclosure is to improve the power added efficiency of a power amplifier at high output power. The power amplifier includes: a first capacitor with a radio frequency signal input to one end thereof; a first transistor whose base is connected to the other end of the first capacitor to amplify the radio frequency signal; a bias circuit for supplying bias to the base of the first transistor; and a second capacitor with one end connected to the base of the first transistor and the other end connected to the emitter of the first transistor.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: June 23, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Watanabe, Satoshi Tanaka, Norio Hayashi, Kazuma Sugiura
  • Publication number: 20200195210
    Abstract: A power amplifier circuit includes a lower-stage transistor having a first power supply voltage supplied to a first terminal, a second terminal connected to ground, and a first signal supplied to a third terminal; an upper-stage transistor having a second power supply voltage supplied to a first terminal, a second signal obtained by amplifying the first signal being output from the first terminal, a second terminal connected to the first terminal of the lower-stage transistor via a first capacitor, and a third terminal connected to ground via a ground path; an inductor that connects the second terminal of the upper-stage transistor to ground; and an adjustment circuit that adjusts impedance seen from the third terminal of the upper-stage transistor. The adjustment circuit includes a second capacitor and at least one resistance element connected in series with the ground path between the third terminal of the upper-stage transistor and ground.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 18, 2020
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Norio HAYASHI, Makoto ITOU
  • Publication number: 20200083845
    Abstract: A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
    Type: Application
    Filed: August 13, 2019
    Publication date: March 12, 2020
    Inventors: Satoshi TANAKA, Satoshi ARAYASHIKI, Kazuo WATANABE
  • Publication number: 20200076384
    Abstract: A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.
    Type: Application
    Filed: August 23, 2019
    Publication date: March 5, 2020
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Yusuke Tanaka, Satoshi Arayashiki
  • Publication number: 20200014344
    Abstract: A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.
    Type: Application
    Filed: May 21, 2019
    Publication date: January 9, 2020
    Inventors: Satoshi ARAYASHIKI, Kazuo WATANABE, Satoshi TANAKA
  • Publication number: 20200004057
    Abstract: A laser processing apparatus disclosed in the present application includes: an optical deflection unit capable of changing a deflection direction of and outgoing energy of an incoming laser pulse by changes of a frequency of and an amplitude of a driving signal to be supplied; and a control unit configured to supply driving signals with amplitudes corresponding to respective frequencies. In a laser processing apparatus configured to process a workpiece by leading outgoing laser pulse of the optical deflection unit to the workpiece and irradiating the workpiece with the laser pulse, as the amplitude corresponding to each of the frequencies, the control unit supplies an amplitude having the ratio that is close to the lowest ratio among ratios of the outgoing energy with respect to the incoming energy of the laser pulse at an amplitude having the largest outgoing energy of the optical deflection unit.
    Type: Application
    Filed: June 20, 2019
    Publication date: January 2, 2020
    Applicant: Via Mechanics, Ltd.
    Inventors: Kazuya MATSUMOTO, Kazuo WATANABE, Atsushi SAKAMOTO, Masanori SATO, Mitsuru KATO, Masaru KIKUCHI
  • Publication number: 20190326857
    Abstract: A power amplifier circuit includes a first transistor, a second transistor, a first bias circuit supplying a first bias current or voltage, a second bias circuit supplying a second bias current or voltage, a first inductor, and a first capacitor. A power supply voltage is supplied to a collector of the first transistor, and an emitter thereof is grounded. A radio frequency signal and the first bias current or voltage are supplied to a base of the first transistor. The power supply voltage is supplied to a collector of the second transistor, and an emitter thereof is connected to the collector of the first transistor via the first capacitor and is grounded via the first inductor. The second bias current or voltage is supplied to a base of the second transistor. An amplified radio frequency signal is output from the collector of the second transistor.
    Type: Application
    Filed: July 1, 2019
    Publication date: October 24, 2019
    Inventors: SATOSHI TANAKA, MASATOSHI HASE, YURI HONDA, KAZUO WATANABE, TAKASHI SOGA
  • Patent number: 10389307
    Abstract: A power amplifier circuit includes a first transistor, a second transistor, a first bias circuit supplying a first bias current or voltage, a second bias circuit supplying a second bias current or voltage, a first inductor, and a first capacitor. A power supply voltage is supplied to a collector of the first transistor, and an emitter thereof is grounded. A radio frequency signal and the first bias current or voltage are supplied to a base of the first transistor. The power supply voltage is supplied to a collector of the second transistor, and an emitter thereof is connected to the collector of the first transistor via the first capacitor and is grounded via the first inductor. The second bias current or voltage is supplied to a base of the second transistor. An amplified radio frequency signal is output from the collector of the second transistor.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: August 20, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Masatoshi Hase, Yuri Honda, Kazuo Watanabe, Takashi Soga
  • Publication number: 20190190547
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20190190546
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Inventors: Satoshi TANAKA, Kazuo WATANABE, Tetsuaki ADACHI, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Patent number: 10284150
    Abstract: A power amplification module includes: a first transistor that amplifies a first radio frequency signal and outputs a second radio frequency signal; a second transistor that amplifies the second radio frequency signal and outputs a third radio frequency signal; and first and second bias circuits that supply first and second bias currents to bases of the first and second transistors. The first bias circuit includes a third transistor that outputs the first bias current from its emitter or source, a capacitor that is input with the first radio frequency signal and connected to the base of the first transistor, a first resistor connected between the emitter or source of the third transistor and the base of the first transistor, a second resistor connected between the capacitor and the emitter or source of the third transistor, and a third resistor connected between the capacitor and the base of the first transistor.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: May 7, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Watanabe, Satoshi Tanaka, Kazuhito Nakai, Takayuki Tsutsui
  • Patent number: 10256849
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 10256848
    Abstract: A communication unit includes the following elements. A first transmit circuit outputs a first signal or a second signal from a first input signal. A first amplifier amplifies the first signal and outputs a first amplified signal. A first signal generating circuit generates a third signal having a frequency higher than a frequency of the second signal, based on the second signal and a first reference signal. A first filter circuit receives the third signal and allows one of a frequency component representing a sum of the frequency of the second signal and a frequency of the first reference signal and a frequency component representing a difference therebetween to pass through the first filter circuit and attenuates the other one of the frequency components. A second amplifier amplifies the third signal output from the first filter circuit and outputs a second amplified signal.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 9, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Tetsuaki Adachi, Masahito Numanami, Yasuhisa Yamamoto
  • Publication number: 20190103841
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Satoshi TANAKA, Tetsuaki ADACHI, Kazuo WATANABE, Masahito NUMANAMI, Yasuhisa YAMAMOTO
  • Publication number: 20190089307
    Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 21, 2019
    Inventors: Satoshi Tanaka, Masatoshi Hase, Norio Hayashi, Kazuo Watanabe, Yuuri Honda
  • Patent number: 10236828
    Abstract: A power amplifier has improved power added efficiency at high output power. The power amplifier includes: a first transistor for amplifying an input signal input to the base thereof and outputting the amplified signal from the collector thereof; a second transistor with power-supply voltage applied to the collector thereof to supply bias voltage or bias current from the emitter thereof to the base of the first transistor; a third transistor whose collector is connected to the collector of the first transistor to amplify the input signal input to the base thereof and output the amplified signal from a collector thereof; a fourth transistor whose base and collector are connected to supply bias from the emitter thereof to the base of the third transistor; and a first resistor with bias control voltage applied to one end thereof and the other end connected to the bases of the second and fourth transistors.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: March 19, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuma Sugiura, Takashi Yamada, Norio Hayashi, Satoshi Tanaka, Kenichi Shimamoto, Kazuo Watanabe
  • Patent number: 10177724
    Abstract: A power amplifier circuit includes first and second transistors and a first voltage output circuit. A radio frequency signal is input into a base of the first transistor. The first voltage output circuit outputs a first voltage in accordance with a power supply voltage. The first voltage is supplied to a base or a gate of the second transistor. An emitter or a source of the second transistor is connected to a collector of the first transistor. A first amplified signal generated by amplifying the radio frequency signal is output from a collector or a drain of the second transistor.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Takayuki Tsutsui, Masao Kondo, Satoshi Arayashiki, Fumio Harima, Masatoshi Hase