Patents by Inventor Kazushi Yamayoshi

Kazushi Yamayoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10797086
    Abstract: A liquid crystal display panel includes a semiconductor film, source and drain electrodes, a planarizing insulating film, first and second transparent conductive films, an insulating film, a pixel electrode, and a counter electrode. The semiconductor film overlaps a gate electrode on a substrate across a gate insulating film. The source and drain electrodes are separately provided on the semiconductor film. The planarizing insulating film includes an opening for partially exposing the source and drain electrodes on its bottom. The first and second transparent conductive films respectively come in contact with surfaces of the source and drain electrodes. The insulating film is provided on the planarizing insulating film so as to cover the opening and the first and second transparent conductive films. The pixel electrode is provided on the insulating film and is electrically connected to the drain electrode via the second transparent conductive film. The counter electrode is opposed to the pixel electrode.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: October 6, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kazushi Yamayoshi
  • Patent number: 10656482
    Abstract: A channel layer is formed of an oxide semiconductor. A first insulating film is provided on the channel layer, a source line, and a drain electrode, and includes a drain contact hole which reaches the drain electrode. A pixel electrode is provided on the first insulating film, includes a connection conductive layer which is connected to the drain electrode by the drain contact hole, and is formed of a transparent conductive material. The pixel electrode is covered with a second insulating film. A common electrode is provided on the second insulating film, includes an opening which faces the pixel electrode in a thickness direction, and is formed of a transparent conductive material. A metal layer, in conjunction with a part of the common electrode, forms a laminated structure, and includes a light-shield part which overlaps the channel layer at least partially in plan view.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: May 19, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinji Kawabuchi, Naruhito Hoka, Kazushi Yamayoshi, Akihiko Hosono, Kenichi Miyamoto
  • Publication number: 20190172851
    Abstract: A liquid crystal display panel includes a semiconductor film, source and drain electrodes, a planarizing insulating film, first and second transparent conductive films, an insulating film, a pixel electrode, and a counter electrode. The semiconductor film overlaps a gate electrode on a substrate across a gate insulating film. The source and drain electrodes are separately provided on the semiconductor film. The planarizing insulating film includes an opening for partially exposing the source and drain electrodes on its bottom. The first and second transparent conductive films respectively come in contact with surfaces of the source and drain electrodes. The insulating film is provided on the planarizing insulating film so as to cover the opening and the first and second transparent conductive films. The pixel electrode is provided on the insulating film and is electrically connected to the drain electrode via the second transparent conductive film. The counter electrode is opposed to the pixel electrode.
    Type: Application
    Filed: November 5, 2018
    Publication date: June 6, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kazushi YAMAYOSHI
  • Patent number: 10168851
    Abstract: A touch panel includes: an transparent substrate; an X wiring line; a Y wiring line; and an inter-layer insulating film which electrically separates the X wiring line and the Y wiring line at an intersection at which the X wiring line and the Y wiring line intersect in a plan view. At the intersection, the bottom layer of one wiring line of the X wiring line and the Y wiring line continues on the lower surface side of the inter-layer insulating film, and layers of the one wiring line except the bottom layer are divided. Further, at the intersection, layers of the other wiring line of the X wiring line and the Y wiring line except the top layer of the other wiring line are divided, and the top layer of the other wiring line continues on the upper surface side.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 1, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kazushi Yamayoshi
  • Patent number: 9911765
    Abstract: A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel layer that is formed at a position on the first insulating film overlapping the gate electrode and formed of an oxide semiconductor, a second insulating film formed on the channel layer, and a third insulating film formed so as to cover the second insulating film. A source electrode and a drain electrode are formed on the third insulating film. Each of the source electrode and the drain electrode is connected to the channel layer through the corresponding one of contact holes penetrating the second insulating film and the third insulating film.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: March 6, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ken Imamura, Kazushi Yamayoshi, Kazunori Inoue
  • Publication number: 20170344160
    Abstract: A touch panel includes: an transparent substrate; an X wiring line; a Y wiring line; and an inter-layer insulating film which electrically separates the X wiring line and the Y wiring line at an intersection at which the X wiring line and the Y wiring line intersect in a plan view. At the intersection, the bottom layer of one wiring line of the X wiring line and the Y wiring line continues on the lower surface side of the inter-layer insulating film, and layers of the one wiring line except the bottom layer are divided. Further, at the intersection, layers of the other wiring line of the X wiring line and the Y wiring line except the top layer of the other wiring line are divided, and the top layer of the other wiring line continues on the upper surface side.
    Type: Application
    Filed: May 22, 2017
    Publication date: November 30, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kazushi YAMAYOSHI
  • Publication number: 20170329176
    Abstract: A channel layer is formed of an oxide semiconductor. A first insulating film is provided on the channel layer, a source line, and a drain electrode, and includes a drain contact hole which reaches the drain electrode. A pixel electrode is provided on the first insulating film, includes a connection conductive layer which is connected to the drain electrode by the drain contact hole, and is formed of a transparent conductive material. The pixel electrode is covered with a second insulating film. A common electrode is provided on the second insulating film, includes an opening which faces the pixel electrode in a thickness direction, and is formed of a transparent conductive material. A metal layer, in conjunction with a part of the common electrode, forms a laminated structure, and includes a light-shield part which overlaps the channel layer at least partially in plan view.
    Type: Application
    Filed: May 8, 2017
    Publication date: November 16, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinji KAWABUCHI, Naruhito HOKA, Kazushi YAMAYOSHI, Akihiko HOSONO, Kenichi MIYAMOTO
  • Publication number: 20170278877
    Abstract: A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel layer that is formed at a position on the first insulating film overlapping the gate electrode and formed of an oxide semiconductor, a second insulating film formed on the channel layer, and a third insulating film formed so as to cover the second insulating film. A source electrode and a drain electrode are formed on the third insulating film. Each of the source electrode and the drain electrode is connected to the channel layer through the corresponding one of contact holes penetrating the second insulating film and the third insulating film.
    Type: Application
    Filed: June 8, 2017
    Publication date: September 28, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ken IMAMURA, Kazushi YAMAYOSHI, Kazunori INOUE
  • Patent number: 9733530
    Abstract: The present invention includes a thin-film transistor, a flattened film having a flattened top surface and having a contact hole formed thereon, and a pixel electrode and a common line which are disposed on the top surface of the flattened film. The common line includes a common metal line, and the pixel electrode has a connection portion formed in the contact hole and electrically connected to the thin-film transistor. The connection portion of the pixel electrode includes a connection metal film made of the material same as the material for the common metal line of the common line.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: August 15, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushi Yamayoshi, Naruhito Hoka, Osamu Miyakawa, Shinsuke Ogata
  • Patent number: 9716118
    Abstract: A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel layer that is formed at a position on the first insulating film overlapping the gate electrode and formed of an oxide semiconductor, a second insulating film formed on the channel layer, and a third insulating film formed so as to cover the second insulating film. A source electrode and a drain electrode are formed on the third insulating film. Each of the source electrode and the drain electrode is connected to the channel layer through the corresponding one of contact holes penetrating the second insulating film and the third insulating film.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: July 25, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ken Imamura, Kazushi Yamayoshi, Kazunori Inoue
  • Patent number: 9690154
    Abstract: A liquid crystal display panel includes: a transparent insulating substrate; a signal line and a scanning line arranged in a display region on the transparent insulating substrate and crossing each other in a matrix; a protective insulating film arranged so as to cover at least the signal line and the scanning line from above; a first insulating film that covers the protective insulating film from above; and a first contact hole that penetrates at least the first insulating film and the protective insulating film to reach a surface of a common interconnect. The first contact hole has a bottom and an inner side surface covered with a first stacked film composed of a first transparent conductive film made of the same material as the lower electrode and a second transparent conductive film made of the same material as the upper electrode.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: June 27, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushi Yamayoshi, Osamu Miyakawa, Takeshi Sonoda, Shinsuke Ogata, Takeshi Shimamura, Naruhito Hoka
  • Patent number: 9564459
    Abstract: The organic insulating film has an opening through which the drain electrode is partially exposed. The opening has a side wall extending from above the drain electrode. The pixel electrode has a contact portion that is in contact with the drain electrode in the opening of the organic insulating film, a wiring portion that extends directly on the side wall of the organic insulating film from the contact portion, and a body portion that is linked to the wiring portion and is located on the organic insulating film. The interlayer insulating film covers the pixel electrode. The interlayer insulating film covers the source electrode and directly covers the semiconductor film between the source-electrode side surface and the drain-electrode side surface. The common electrode has fringes opposed to the pixel electrode via the interlayer insulating film.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: February 7, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushi Yamayoshi, Takeshi Sonoda, Shinsuke Ogata
  • Publication number: 20160190184
    Abstract: A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel layer that is formed at a position on the first insulating film overlapping the gate electrode and formed of an oxide semiconductor, a second insulating film formed on the channel layer, and a third insulating film formed so as to cover the second insulating film. A source electrode and a drain electrode are formed on the third insulating film. Each of the source electrode and the drain electrode is connected to the channel layer through the corresponding one of contact holes penetrating the second insulating film and the third insulating film.
    Type: Application
    Filed: November 13, 2015
    Publication date: June 30, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ken IMAMURA, Kazushi YAMAYOSHI, Kazunori INOUE
  • Patent number: 9323067
    Abstract: A method of manufacturing a display apparatus having a display material provided between a pair of substrates arranged to face each other, the method comprises: bonding a first mother substrate and a second mother substrate to form a cell substrate from which one or more panels are bring out; thinning one of the first mother substrate and the second mother substrate after forming the cell substrate; forming a parallax barrier layer that separates a display image and a light transmission layer to be stacked on the parallax barrier layer on a surface of the one of the first mother substrate and the second mother substrate at an outer-side face of the cell substrate; and dividing the cell substrate into one or more panels.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: April 26, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazushi Yamayoshi, Junichi Tsuchimichi, Hiromasa Morita
  • Patent number: 9285619
    Abstract: A liquid crystal display panel includes a thin film transistor disposed on an insulating substrate in a display region, an external wiring for connecting the thin film transistor to a terminal electrode, and a planarized film disposed on the thin film transistor, and having a planarized upper surface. The planarized film is not disposed, or a planarized film having a smaller film thickness than that of the planarized film in the display region is disposed, above the external wiring in a frame region.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: March 15, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushi Yamayoshi, Takeshi Sonoda, Koichi Takai, Osamu Miyakawa, Shinsuke Ogata, Takeshi Shimamura
  • Publication number: 20160062193
    Abstract: The present invention includes a thin-film transistor, a flattened film having a flattened top surface and having a contact hole formed thereon, and a pixel electrode and a common line which are disposed on the top surface of the flattened film. The common line includes a common metal line, and the pixel electrode has a connection portion formed in the contact hole and electrically connected to the thin-film transistor. The connection portion of the pixel electrode includes a connection metal film made of the material same as the material for the common metal line of the common line.
    Type: Application
    Filed: August 14, 2015
    Publication date: March 3, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazushi YAMAYOSHI, Naruhito HOKA, Osamu MIYAKAWA, Shinsuke OGATA
  • Patent number: 9188805
    Abstract: A liquid crystal display includes: first and second transparent substrates located such that inner main surfaces face each other with a gap being provided therebetween and a liquid crystal layer is held between the substrates; a parallax barrier provided on an outer main surface of the first transparent substrate and optically separating pixels displaying an image into pixels visually recognized in a specific direction and pixels visually recognized in another specific direction; and a plurality of switching elements, arrayed on the inner main surface of the second transparent substrate, for applying voltage to drive the liquid crystal; wherein the parallax barrier includes a plurality of transmissive portions arrayed to transmit light and a plurality of light blocking portions provided respectively around the transmissive portions to block light, and each of the light blocking portions includes two or more layered light blocking films.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: November 17, 2015
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Syuuichi Kira, Akio Nakayama, Kazushi Yamayoshi
  • Patent number: 9161439
    Abstract: A display device includes a laminated wiring formed of a low-resistance conductive film, and a low-reflection film mainly containing Al and functioning as an antireflective film which are sequentially arranged on a transparent substrate, a wiring terminal part provided at an end part of the laminated wiring and has the same laminated structure as that of the laminated wiring, and an insulating film for covering the laminated wiring and the wiring terminal part, in which the insulating film side serves as a display surface side, the wiring terminal part has a first opening part penetrating the insulating film and the low-reflection film and reaching the low-resistance conductive film, and an outer peripheral portion of the first opening part has a laminated structure of the low-resistance conductive film, the low-reflection film, and the insulating film, in at least one part.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: October 13, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Kenichi Miyamoto, Kazushi Yamayoshi, Junichi Tsuchimichi
  • Publication number: 20150216041
    Abstract: A display device includes a laminated wiring formed of a low-resistance conductive film, and a low-reflection film mainly containing Al and functioning as an antireflective film which are sequentially arranged on a transparent substrate, a wiring terminal part provided at an end part of the laminated wiring and has the same laminated structure as that of the laminated wiring, and an insulating film for covering the laminated wiring and the wiring terminal part, in which the insulating film side serves as a display surface side, the wiring terminal part has a first opening part penetrating the insulating film and the low-reflection film and reaching the low-resistance conductive film, and an outer peripheral portion of the first opening part has a laminated structure of the low-resistance conductive film, the low-reflection film, and the insulating film, in at least one part.
    Type: Application
    Filed: April 3, 2015
    Publication date: July 30, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masami HAYASHI, Kenichi MIYAMOTO, Kazushi YAMAYOSHI, Junichi TSUCHIMICHI
  • Patent number: 9040992
    Abstract: A display device includes a laminated wiring formed of a low-resistance conductive film, and a low-reflection film mainly containing Al and functioning as an antireflective film which are sequentially arranged on a transparent substrate, a wiring terminal part provided at an end part of the laminated wiring and has the same laminated structure as that of the laminated wiring, and an insulating film for covering the laminated wiring and the wiring terminal part, in which the insulating film side serves as a display surface side, the wiring terminal part has a first opening part penetrating the insulating film and the low-reflection film and reaching the low-resistance conductive film, and an outer peripheral portion of the first opening part has a laminated structure of the low-resistance conductive film, the low-reflection film, and the insulating film, in at least one part.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: May 26, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Kenichi Miyamoto, Kazushi Yamayoshi, Junichi Tsuchimichi