Patents by Inventor Kazutaka Kobayashi

Kazutaka Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230410733
    Abstract: The present technology relates to a signal processing apparatus, a signal processing method, and a display apparatus that are able to provide suitable functionality according to applications. The signal processing apparatus provided by the present technology includes a signal processing section that acquires at least one of first information regarding a color of a video to be displayed on a panel section, second information regarding brightness of a screen of the panel section, and third information measured as a physical quantity related to the panel section, and that performs, on the basis of the acquired information, adaptive control of a voltage according to a load on and an application of the panel section. The voltage is used for driving the panel section. The present technology is applicable, for example, to a self-luminous display apparatus.
    Type: Application
    Filed: August 31, 2023
    Publication date: December 21, 2023
    Applicant: Sony Group Corporation
    Inventors: Masao Zen, Tetsuo Ikeyama, Daisuke Miki, Syunsuke Kikuchi, Kazuhiro Nukiyama, Kazutaka Kobayashi, Yasushi Konuma, Kazuki Uchida, Masayoshi Sasaki, Masayuki Okochi
  • Publication number: 20230402003
    Abstract: The present technology relates to a signal processing apparatus, a signal processing method, and a display apparatus that may reduce the effect of deterioration in element of a display panel. Provided is a signal processing apparatus including a signal processing unit configured to acquire, in changing a video signal from a low luminance display signal to a high luminance display signal by luminance enhancement, an accumulated load increase amount obtained by measuring and accumulating amounts of increase in load on a display panel caused by luminance enhancement, and adaptively control, in reference to the accumulated load increase amount acquired, a first gain for improving luminance of the video signal, according to a degree of effect of deterioration in element of the display panel. The present technology is applicable to self-luminous display apparatuses, for example.
    Type: Application
    Filed: August 28, 2023
    Publication date: December 14, 2023
    Applicant: Sony Group Corporation
    Inventors: Masao Zen, Syunsuke Kikuchi, Daisuke Miki, Kazuhiro Nukiyama, Kazutaka Kobayashi, Yasushi Konuma, Kazuki Uchida
  • Patent number: 11817048
    Abstract: The present technology relates to a signal processing apparatus, a signal processing method, and a display apparatus that are able to provide suitable functionality according to applications. The signal processing apparatus provided by the present technology includes a signal processing section that acquires at least one of first information regarding a color of a video to be displayed on a panel section, second information regarding brightness of a screen of the panel section, and third information measured as a physical quantity related to the panel section, and that performs, on the basis of the acquired information, adaptive control of a voltage according to a load on and an application of the panel section. The voltage is used for driving the panel section. The present technology is applicable, for example, to a self-luminous display apparatus.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: November 14, 2023
    Inventors: Masao Zen, Tetsuo Ikeyama, Daisuke Miki, Syunsuke Kikuchi, Kazuhiro Nukiyama, Kazutaka Kobayashi, Yasushi Konuma, Kazuki Uchida, Masayoshi Sasaki, Masayuki Okochi
  • Patent number: 11790843
    Abstract: The present technology relates to a signal processing apparatus, a signal processing method, and a display apparatus that may reduce the effect of deterioration in element of a display panel. Provided is a signal processing apparatus including a signal processing unit configured to acquire, in changing a video signal from a low luminance display signal to a high luminance display signal by luminance enhancement, an accumulated load increase amount obtained by measuring and accumulating amounts of increase in load on a display panel caused by luminance enhancement, and adaptively control, in reference to the accumulated load increase amount acquired, a first gain for improving luminance of the video signal, according to a degree of effect of deterioration in element of the display panel. The present technology is applicable to self-luminous display apparatuses, for example.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: October 17, 2023
    Inventors: Masao Zen, Syunsuke Kikuchi, Daisuke Miki, Kazuhiro Nukiyama, Kazutaka Kobayashi, Yasushi Konuma, Kazuki Uchida
  • Publication number: 20230140888
    Abstract: The present technology relates to a signal processing apparatus, a signal processing method, and a display apparatus that may reduce the effect of deterioration in element of a display panel. Provided is a signal processing apparatus including a signal processing unit configured to acquire, in changing a video signal from a low luminance display signal to a high luminance display signal by luminance enhancement, an accumulated load increase amount obtained by measuring and accumulating amounts of increase in load on a display panel caused by luminance enhancement, and adaptively control, in reference to the accumulated load increase amount acquired, a first gain for improving luminance of the video signal, according to a degree of effect of deterioration in element of the display panel. The present technology is applicable to self-luminous display apparatuses, for example.
    Type: Application
    Filed: April 19, 2021
    Publication date: May 11, 2023
    Applicant: Sony Group Corporation
    Inventors: Masao Zen, Syunsuke Kikuchi, Daisuke Miki, Kazuhiro Nukiyama, Kazutaka Kobayashi, Yasushi Konuma, Kazuki Uchida
  • Publication number: 20230125418
    Abstract: The present technology relates to a signal processing apparatus, a signal processing method, and a display apparatus that are able to provide suitable functionality according to applications. The signal processing apparatus provided by the present technology includes a signal processing section that acquires at least one of first information regarding a color of a video to be displayed on a panel section, second information regarding brightness of a screen of the panel section, and third information measured as a physical quantity related to the panel section, and that performs, on the basis of the acquired information, adaptive control of a voltage according to a load on and an application of the panel section. The voltage is used for driving the panel section. The present technology is applicable, for example, to a self-luminous display apparatus.
    Type: Application
    Filed: April 19, 2021
    Publication date: April 27, 2023
    Applicant: Sony Group Corporation
    Inventors: Masao Zen, Tetsuo Ikeyama, Daisuke Miki, Syunsuke Kikuchi, Kazuhiro Nukiyama, Kazutaka Kobayashi, Yasushi Konuma, Kazuki Uchida, Masayoshi Sasaki, Masayuki Okochi
  • Patent number: 10128139
    Abstract: A substrate holding method is to horizontally hold a substrate, and includes a positioning step of positioning a substrate by moving a substrate transfer mechanism and by allowing the peripheral edge of the substrate to come into contact with the plurality of positioning pins, a substrate grasping step of bringing the plurality of grasping pins into a closed state after completing the positioning step so that the substrate held by the plurality of positioning pins and the plurality of grasping pins, and a transfer mechanism receding step of allowing the substrate transfer mechanism to recede from above the spin base after completing the substrate grasping step.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: November 13, 2018
    Assignee: SCREEN Holdings Co., Ltd.
    Inventors: Kazutaka Kobayashi, Hiroshi Kato
  • Patent number: 9837337
    Abstract: A wiring substrate includes an electronic component mounting pad, an electrode pad arranged at an outer side of the electronic component mounting pad, a first insulation layer formed on the electronic component mounting pad and the electrode pad, an opening formed in the first insulation layer on the electronic component mounting pad, a connection hole formed in the first insulation layer on the electrode pad, and recess portions formed at the electronic component mounting pad in the opening and at the electrode pad in the connection hole, respectively.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: December 5, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kazutaka Kobayashi
  • Patent number: 9685391
    Abstract: A wiring board includes a substrate having first and second opposite surfaces, a first adhesive layer on the first surface of the substrate, a thermal diffusion metal pattern on the first adhesive layer, multiple vias vertically extending from the thermal diffusion metal pattern into the substrate through the first adhesive layer with a gap around each of the vias in the substrate and the first adhesive layer, and a second adhesive layer on the second surface of the substrate. The thermal diffusion metal pattern is not to be electrically connected to a semiconductor device to be mounted. The second adhesive layer fills in the gap around each of the vias within the substrate and the first adhesive layer. The gap includes a first gap and a second gap in the substrate and the first adhesive layer, respectively. The second gap is greater in lateral size than the first gap.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: June 20, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kazutaka Kobayashi
  • Patent number: 9655238
    Abstract: A wiring board includes a heat dissipation plate, a heat-conductive adhesive layer, an insulating layer, a thermal via, a heat dissipation metal terminal, and electrodes. The heat-conductive adhesive layer is disposed on the heat dissipation plate. The insulating layer is disposed on the heat-conductive adhesive layer. The insulating layer is formed with an opening portion. The thermal via is disposed in the opening portion of the insulating layer. The heat dissipation metal terminal is disposed on the thermal via and electrically connected to the heat dissipation plate. The electrodes are disposed on the insulating layer. The electrodes are to be connected to an electronic component.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: May 16, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kazutaka Kobayashi
  • Publication number: 20160307814
    Abstract: A wiring board includes a substrate having first and second opposite surfaces, a first adhesive layer on the first surface of the substrate, a thermal diffusion metal pattern on the first adhesive layer, multiple vias vertically extending from the thermal diffusion metal pattern into the substrate through the first adhesive layer with a gap around each of the vias in the substrate and the first adhesive layer, and a second adhesive layer on the second surface of the substrate. The thermal diffusion metal pattern is not to be electrically connected to a semiconductor device to be mounted. The second adhesive layer fills in the gap around each of the vias within the substrate and the first adhesive layer. The gap includes a first gap and a second gap in the substrate and the first adhesive layer, respectively. The second gap is greater in lateral size than the first gap.
    Type: Application
    Filed: April 5, 2016
    Publication date: October 20, 2016
    Inventor: Kazutaka KOBAYASHI
  • Publication number: 20160284585
    Abstract: A substrate holding method is to horizontally hold a substrate, and includes a positioning step of positioning a substrate by moving a substrate transfer mechanism and by allowing the peripheral edge of the substrate to come into contact with the plurality of positioning pins, a substrate grasping step of bringing the plurality of grasping pins into a closed state after completing the positioning step so that the substrate held by the plurality of positioning pins and the plurality of grasping pins, and a transfer mechanism receding step of allowing the substrate transfer mechanism to recede from above the spin base after completing the substrate grasping step.
    Type: Application
    Filed: March 25, 2016
    Publication date: September 29, 2016
    Inventors: Kazutaka KOBAYASHI, Hiroshi KATO
  • Publication number: 20160157345
    Abstract: A wiring substrate includes an electronic component mounting pad, an electrode pad arranged at an outer side of the electronic component mounting pad, a first insulation layer formed on the electronic component mounting pad and the electrode pad, an opening formed in the first insulation layer on the electronic component mounting pad, a connection hole formed in the first insulation layer on the electrode pad, and recess portions formed at the electronic component mounting pad in the opening and at the electrode pad in the connection hole, respectively.
    Type: Application
    Filed: November 24, 2015
    Publication date: June 2, 2016
    Inventor: Kazutaka Kobayashi
  • Patent number: 9282629
    Abstract: A wiring substrate includes a heat spreader, a first insulating layer provided on the heat spreader via an adhesion layer, the first insulating layer, a plurality of through wirings formed to fill through holes provided at the first insulating layer, respectively, a thermal diffusion wiring provided on the first insulating layer so as to be connected to the through wirings, the thermal diffusion wiring being configured not to be electrically connected to a semiconductor device, an electrical connection wiring provided on the first insulating layer, the electrical connection wiring being configured to be electrically connected to the semiconductor device, wherein the heat spreader is provided with a projection portion, made of a composition same as the heat spreader, at a surface of the heat spreader on which the adhesion layer is formed, the projection portion being aimed at least at an area overlapping the through wirings in a plan view.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: March 8, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yasuyoshi Horikawa, Tatsuaki Denda, Hiroshi Shimizu, Kazutaka Kobayashi
  • Patent number: 9192049
    Abstract: A wiring substrate for a semiconductor device includes a heat spreader; a polyimide layer provided with through holes and provided on the heat spreader via an adhesion layer; through wirings formed to fill the through holes of the polyimide layer; a thermal diffusion wiring provided on the polyimide layer and is configured not to be electrically connected to the semiconductor device; an electrical connection wiring provided on the polyimide layer at a same plane with the thermal diffusion wiring and is configured to be electrically connected to the semiconductor device; and an insulating layer provided on the polyimide layer with a first open portion and a second open portion that expose the electrical connection wiring and the thermal diffusion wiring, respectively, the thermal diffusion wiring being formed to extend at an outer side of the second open portion and have a larger area than the electrical connection wiring.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: November 17, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tatsuaki Denda, Kazutaka Kobayashi
  • Publication number: 20150319841
    Abstract: A wiring board includes a heat dissipation plate, a heat-conductive adhesive layer, an insulating layer, a thermal via, a heat dissipation metal terminal, and electrodes. The heat-conductive adhesive layer is disposed on the heat dissipation plate. The insulating layer is disposed on the heat-conductive adhesive layer. The insulating layer is formed with an opening portion. The thermal via is disposed in the opening portion of the insulating layer. The heat dissipation metal terminal is disposed on the thermal via and electrically connected to the heat dissipation plate. The electrodes are disposed on the insulating layer. The electrodes are to be connected to an electronic component.
    Type: Application
    Filed: April 28, 2015
    Publication date: November 5, 2015
    Inventor: Kazutaka Kobayashi
  • Patent number: 9137890
    Abstract: There is provided a wiring board. The wiring board includes: a first insulating layer; a plurality of wiring patterns on the first insulating layer so as to be spaced apart from each other; a plating layer on at least one of the wiring patterns; a second insulating layer containing silicone therein and having an opening, wherein an outermost surface of the plating layer is exposed from the opening and serves as a connection pad; and a silica film on the outermost surface of the plating layer.
    Type: Grant
    Filed: February 11, 2014
    Date of Patent: September 15, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazutaka Kobayashi, Mitsuhiro Aizawa, Hiroshi Shimizu, Mina Iwai
  • Publication number: 20150230328
    Abstract: A wiring substrate includes a heat spreader; a first insulating layer provided on the heat spreader via an adhesion layer, the first insulating layer; a plurality of through wirings formed to fill through holes provided at the first insulating layer, respectively; a thermal diffusion wiring provided on the first insulating layer so as to be connected to the through wirings, the thermal diffusion wiring being configured not to be electrically connected to a semiconductor device; an electrical connection wiring provided on the first insulating layer, the electrical connection wiring being configured to be electrically connected to the semiconductor device, wherein the heat spreader is provided with a projection portion, made of a composition same as the heat spreader, at a surface of the heat spreader on which the adhesion layer is formed, the projection portion being formed at least at an area overlapping the through wirings in a plan view.
    Type: Application
    Filed: December 26, 2014
    Publication date: August 13, 2015
    Inventors: Yasuyoshi HORIKAWA, Tatsuaki DENDA, Hiroshi SHIMIZU, Kazutaka KOBAYASHI
  • Publication number: 20150200337
    Abstract: A wiring substrate for a semiconductor device includes a heat spreader; a polyimide layer provided with through holes and provided on the heat spreader via an adhesion layer; through wirings formed to fill the through holes of the polyimide layer; a thermal diffusion wiring provided on the polyimide layer and is configured not to be electrically connected to the semiconductor device; an electrical connection wiring provided on the polyimide layer at a same plane with the thermal diffusion wiring and is configured to be electrically connected to the semiconductor device; and an insulating layer provided on the polyimide layer with a first open portion and a second open portion that expose the electrical connection wiring and the thermal diffusion wiring, respectively, the thermal diffusion wiring being formed to extend at an outer side of the second open portion and have a larger area than the electrical connection wiring.
    Type: Application
    Filed: November 10, 2014
    Publication date: July 16, 2015
    Inventors: Tatsuaki DENDA, Kazutaka KOBAYASHI
  • Patent number: 9061685
    Abstract: A drive state control apparatus is applied to a vehicle which has not only a transfer including a multi-disc clutch mechanism but also a changeover mechanism interposed in an axle and which can be switched between 2WD and 4WD. When a 2WD-to-4WD changeover condition is satisfied, the multi-disc clutch is immediately switched from a “decoupled state” to a “coupled state.” Meanwhile, a connecting operation of the changeover mechanism is started upon establishment of a state in which left and right rear wheels have no acceleration slippage, and a state in which rotational speeds of first and second axles on opposite sides of the changeover mechanism are approximately equal to each other. In addition, in the case where the left and right rear wheels have acceleration slippage after the 2WD-to-4WD changeover condition has been satisfied, an E/G output reduction control is executed. Thus, the connecting operation can be performed smoothly.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: June 23, 2015
    Assignees: Aisin AI Co., Ltd., JTEKT Corporation
    Inventors: Kazutaka Kobayashi, Yoshiyuki Aoyama, Takeshige Miyazaki, Akihiro Ohno, Ryohei Shigeta, Tomoaki Kato, Go Nagayama