Patents by Inventor Kazuya Ikeda

Kazuya Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11945056
    Abstract: A gas shielded arc welding wire contains, based on total mass of the wire in terms of mass %: C: 0.01% to 0.50%; Si: 0.01% to 1.50%; Mn: 0.10% to 2.50%; Cr: 5% to 15%; Ni: 0.05% to 1.50%; Mo: 0.1% to 2.0%; V: 0.1% to 1.0%; Nb: 0.01% to 0.20%; REM: 0.001% to 0.050%; S: 0.0010% to 0.0200%; and O: 0.025% or less (including 0%), which satisfies the following relationship: 3.0?(Nb+10×REM)/(S+O)?200.0.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: April 2, 2024
    Assignee: Kobe Steel, Ltd.
    Inventors: Kazuya Ikai, Tetsunao Ikeda
  • Patent number: 11920841
    Abstract: An air-conditioning apparatus includes a main circuit in which a compressor, a flow switching device, an indoor heat exchanger, a pressure reducing device, and a plurality of parallel heat exchangers connected in parallel with each other are connected by pipes, a bypass pipe, a flow control device provided to the bypass pipe and configured to adjust a flow rate of refrigerant flowing through the bypass pipe, an evaporating pressure sensor configured to measure an evaporating pressure of the refrigerant, and a controller. The air-conditioning apparatus is configured to operate in a normal heating operation mode and a heating-defrosting operation mode. When an operation associated with the normal heating operation mode is switched to an operation associated with the heating-defrosting operation mode, the controller adjusts an opening degree of the flow control device using the evaporating pressure in the parallel heat exchanger and a driving frequency of the compressor.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: March 5, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shohei Ishimura, Soshi Ikeda, Kazuya Watanabe, Hideto Nakao, Masakazu Kondo, Yasuhide Hayamaru, Yusuke Tashiro, Masakazu Sato, Atsushi Kawashima
  • Publication number: 20230348932
    Abstract: A method for scarless genome editing is disclosed. In particular, the method provides scarless genome modification by using homology directed repair (HDR) steps to genetically modify cells and remove unwanted sequences. This method can be used for genome editing, including introducing mutations, deletions, or insertions at any position in the genome without leaving silent mutations, selection marker sequences, or other additional undesired sequences in the genome.
    Type: Application
    Filed: May 18, 2023
    Publication date: November 2, 2023
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Kazuya Ikeda, Matthew H. Porteus
  • Patent number: 11692202
    Abstract: A method for scarless genome editing is disclosed. In particular, the method provides scarless genome modification by using homology directed repair (HDR) steps to genetically modify cells and remove unwanted sequences. This method can be used for genome editing, including introducing mutations, deletions, or insertions at any position in the genome without leaving silent mutations, selection marker sequences, or other additional undesired sequences in the genome.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: July 4, 2023
    Assignee: THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY
    Inventors: Kazuya Ikeda, Matthew H. Porteus
  • Patent number: 11073624
    Abstract: A radiographic imaging apparatus, includes: a planar-shaped flexible scintillator board that emits light at an intensity according to a radiation dose of received radiation; a flexible photoelectric conversion panel that includes a plurality of photodetection elements formed so as to be distributed two-dimensionally on a surface of a flexible support board, and is arranged such that an element-formed surface on which the photodetection elements are formed faces the scintillator board, the photodetection elements generating charges according to an intensity of the received radiation; and a moisture barrier layer that is formed of a material having characteristics of preventing moisture from passing therethrough, and covers a surface of the scintillator board opposite to a surface facing the photodetection elements, a side surface of the scintillator board, and a surface of the photoelectric conversion panel opposite to the element-formed surface.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: July 27, 2021
    Assignee: KONICA MINOLTA, INC.
    Inventors: Yoshito Yamamoto, Kazuya Ikeda, Yasuhito Kuwahara
  • Publication number: 20210135591
    Abstract: This power conversion device converts AC power to DC power and is provided with: a rectifier unit including a thyristor; a capacitor provided at a stage subsequent to the rectifier unit; and a control unit for controlling the firing of the thyristor. The control unit fires the thyristor after a predetermined time from when a zero-cross point where the voltage of the AC power is zero has been reached, thereby supplying power to the capacitor, said predetermined time being determined in accordance with a predetermined frequency of the AC power. The control unit also sets the predetermined time short every time when firing the thyristor and, when the frequency of the AC power has deviated from the predetermined frequency, performs control so as not to fire the thyristor after the predetermined time determined in accordance with the predetermined frequency.
    Type: Application
    Filed: January 11, 2021
    Publication date: May 6, 2021
    Inventor: Kazuya IKEDA
  • Publication number: 20200319354
    Abstract: A radiographic imaging apparatus, includes: a planar-shaped flexible scintillator board that emits light at an intensity according to a radiation dose of received radiation; a flexible photoelectric conversion panel that includes a plurality of photodetection elements formed so as to be distributed two-dimensionally on a surface of a flexible support board, and is arranged such that an element-formed surface on which the photodetection elements are formed faces the scintillator board, the photodetection elements generating charges according to an intensity of the received radiation; and a moisture barrier layer that is formed of a material having characteristics of preventing moisture from passing therethrough, and covers a surface of the scintillator board opposite to a surface facing the photodetection elements, a side surface of the scintillator board, and a surface of the photoelectric conversion panel opposite to the element-formed surface.
    Type: Application
    Filed: April 3, 2020
    Publication date: October 8, 2020
    Inventors: Yoshito YAMAMOTO, Kazuya IKEDA, Yasuhito KUWAHARA
  • Publication number: 20200265510
    Abstract: In the case of financing across countries, a credit application will be circulated across a plurality of countries, a plurality of branches, and a plurality of departments. Therefore, while a credit application is being circulated, the credit data of a financing related party may be updated. Therefore, there is a need for a method and system capable of decision on a credit application and in turn executing a loan on the basis of the latest credit data. There are provided a method and system capable of reflecting the credit data of a financing related party when updated even before decision, on a credit application, and capable of decision on a credit application and in turn executing a loan on the basis of the latest credit data.
    Type: Application
    Filed: July 31, 2015
    Publication date: August 20, 2020
    Inventors: Kiyonori UGAJIN, Kazuya IKEDA, Fumitaka KATO, Yoshiaki YODA, Masato HAYASHI, Takuya MIZUGUCHI, Sho MATSUO, Masato KANO
  • Publication number: 20200208172
    Abstract: A method for scarless genome editing is disclosed. In particular, the method provides scarless genome modification by using homology directed repair (HDR) steps to genetically modify cells and remove unwanted sequences. This method can be used for genome editing, including introducing mutations, deletions, or insertions at any position in the genome without leaving silent mutations, selection marker sequences, or other additional undesired sequences in the genome.
    Type: Application
    Filed: January 10, 2020
    Publication date: July 2, 2020
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Kazuya Ikeda, Matthew H. Porteus
  • Publication number: 20190149258
    Abstract: A transmission and reception apparatus, includes a processor and a processing device coupled to the processor, wherein the processor is configured to detect insertion of a pluggable module, issue, when the insertion of the pluggable module is detected, an instruction to the processing device to generate a first test signal to be supplied to the pluggable module, extract an alternating current component from a first monitoring result of the first test signal by the pluggable module and acquiring pulse width information at a plurality of phase points, and set a phase point determined based on the pulse width information as an optimum phase value to the processing device.
    Type: Application
    Filed: November 15, 2018
    Publication date: May 16, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Hirofumi Araki, Hisayuki Ojima, Yasushi YOSHINO, Satoru Saitoh, KAZUYA IKEDA, TAICHI ISHIKAWA
  • Publication number: 20180122003
    Abstract: A credit administration management system includes: a control card storage unit that stores a credit application number, a scheduled signing date, a scheduled credit issuance date, a status, and check completion flags for a plurality of bank rule items in each predetermined term, while associating them with a control card code; and a control card creation unit that registers a record in the control card storage unit in response to reception of the credit application number, a credit application condition part containing a condition for conditionally approving a credit application, and a fulfillment deadline, and a terms and conditions part containing a condition required for lending, the control card creation unit storing a value indicating incompletion in an item to be checked among the plurality of bank rule items based on the credit application condition part and the terms and conditions part.
    Type: Application
    Filed: March 31, 2015
    Publication date: May 3, 2018
    Inventors: Kiyonori UGAJIN, Kazuya IKEDA, Tomoo YAMADA, Masato HAYASHI, Masato KANO
  • Publication number: 20180068383
    Abstract: A bank system for corporate finance overseas credit management includes: first storage storing customer information sharable by a plurality of entities; second storage storing information relating to a credit transaction management unit (Deal), approval means for approving execution of a credit transaction described in a credit application, the approval means having customer information and Deal information at the time of creation of the credit application and generating a first signal at the time of approval of the credit application; and control card generating means for generating a control card in response to the first signal, the control card indicating progress status of ancillary processes of the approved credit transaction. The Deal information has information of lending office(s) and information of borrower(s), the borrower(s) being associated with the customer information. The customer information and the Deal information are maintained by a first entity.
    Type: Application
    Filed: March 31, 2015
    Publication date: March 8, 2018
    Inventors: Kiyonori UGAJIN, Kazuya IKEDA, Fumitaka KATO, Yoshiaki YODA, Masato HAYASHI, Takuya MIZUGUCHI, Sho MATSUO, Masato KANO
  • Patent number: 9703753
    Abstract: An apparatus for updating a device, includes: a card configured to include a first device; a controller configured to acquire first circuit data from the card and to update a second device by using the first circuit data; and a storage unit configured to store, from the card, second circuit data for updating the first device, wherein the controller acquires the second circuit data stored in the storage unit and updates the first device by using the second circuit data.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: July 11, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kazuya Ikeda, Masato Kobayashi
  • Publication number: 20140289506
    Abstract: An apparatus for updating a device, includes: a card configured to include a first device; a controller configured to acquire first circuit data from the card and to update a second device by using the first circuit data; and a storage unit configured to store, from the card, second circuit data for updating the first device, wherein the controller acquires the second circuit data stored in the storage unit and updates the first device by using the second circuit data.
    Type: Application
    Filed: January 14, 2014
    Publication date: September 25, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Kazuya IKEDA, Masato KOBAYASHI
  • Patent number: 8822941
    Abstract: A radiation detecting panel and a radiographic detector are shown. According to one implementation, a radiation detecting panel includes a device substrate and a scintillator. The device substrate includes a two-dimensional array of photoelectric transducers on a first surface of the device substrate. The scintillator substrate includes a scintillator on a first surface of the scintillator substrate. The scintillator converts radiation to light and irradiates the light onto the photoelectric transducers. The device substrate and the scintillator substrate are bonded together such that the photoelectric transducers face the scintillator. A resin layer disposed between the photoelectric transducers and the scintillator has a glass-transition temperature of 60° C. or higher.
    Type: Grant
    Filed: July 1, 2013
    Date of Patent: September 2, 2014
    Assignee: Konica Minolta, Inc.
    Inventors: Kazuya Ikeda, Michihide Murase
  • Publication number: 20140014843
    Abstract: A radiation detecting panel and a radiographic detector are shown. According to one implementation, a radiation detecting panel includes a device substrate and a scintillator. The device substrate includes a two-dimensional array of photoelectric transducers on a first surface of the device substrate. The scintillator substrate includes a scintillator on a first surface of the scintillator substrate. The scintillator converts radiation to light and irradiates the light onto the photoelectric transducers. The device substrate and the scintillator substrate are bonded together such that the photoelectric transducers face the scintillator. A resin layer disposed between the photoelectric transducers and the scintillator has a glass-transition temperature of 60° C. or higher.
    Type: Application
    Filed: July 1, 2013
    Publication date: January 16, 2014
    Inventors: Kazuya IKEDA, Michihide MURASE
  • Patent number: 7133370
    Abstract: A network topology collection device determining a network topology which indicates a connection state of a route prepares opposed topology information which indicates the connection state between a collection node to which the network topology collection device itself belongs and opposed nodes which respectively terminate routes terminated by the collection node, collects opposed topology information of a node directly or indirectly routed to the collection node, and determines a topology of an entire network based on the opposed topology information collected. Also, in a hierarchized route, the collection device determines a network topology of a route in a specific hierarchy based on opposed topology information in the hierarchy and opposed topology information of a route in another hierarchy.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: November 7, 2006
    Assignee: Fujitsu Limited
    Inventors: Kazuya Ikeda, Katsuichi Ohara, Masanobu Miyamoto
  • Publication number: 20030063571
    Abstract: A network topology collection device determining a network topology which indicates a connection state of a route prepares opposed topology information which indicates the connection state between a collection node to which the network topology collection device itself belongs and opposed nodes which respectively terminate routes terminated by the collection node, collects opposed topology information of a node directly or indirectly routed to the collection node, and determines a topology of an entire network based on the opposed topology information collected. Also, in a hierarchized route, the collection device determines a network topology of a route in a specific hierarchy based on opposed topology information in the hierarchy and opposed topology information of a route in another hierarchy.
    Type: Application
    Filed: March 13, 2002
    Publication date: April 3, 2003
    Inventors: Kazuya Ikeda, Katsuichi Ohara, Masanobu Miyamoto
  • Patent number: 5818089
    Abstract: In a memory cell region, there are formed a pair of driver transistors and a pair of access transistors. On an insulating layer covering these transistors, there are formed a pair of high resistances. To cover the high resistances, there is formed an insulating layer. On the insulating layer, there is formed a word line. To cover the word line, there is formed an insulating layer and, on the insulating layer, there are formed a GND wiring and bit lines. Thereby, a semiconductor memory device capable of stabilized operation even when a lowered power source voltage is used can be obtained.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: October 6, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuyuki Kokubo, Kazuya Ikeda
  • Patent number: 5486717
    Abstract: A memory cell region is provided with a pair of driver transistors as well as a pair of access transistors. Each of the access transistors is formed of a field effect transistor having a gate electrode layer. An insulating layer is formed over the driver transistors and access transistors, and is provided with contact holes located within the memory cell region and reaching the gate electrode layers. Conductive layers are formed on the insulating layer, and are in contact with the gate electrode layers through the contact holes. Thereby, a memory cell structure of an SRAM has a small planar layout area and thus is suitable to high integration.
    Type: Grant
    Filed: September 21, 1994
    Date of Patent: January 23, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Nobuyuki Kokubo, Kazuya Ikeda