Patents by Inventor Kazuyoshi Serizawa

Kazuyoshi Serizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11467865
    Abstract: In the present invention, when an abnormality occurs in a task, regardless of whether a critical section is being executed, timeout detection is realized by determining whether the critical section (CS) is necessary for the design in a preset task execution time and a certain period of time to distinguish between necessary interrupt disable and abnormal interrupt disable. A vehicle control device includes task execution means for causing a system to execute a task, and interrupt processing means for performing an interrupt process at the time of execution of the task. A maskable interrupt and a non-maskable interrupt that is commanded to execute after the maskable interrupt are included, the maskable interrupt is commanded to execute during an interrupt disable time, and then the non-maskable interrupt is executed.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 11, 2022
    Assignee: HITACHI ASTEMO, LTD.
    Inventors: Tsunamichi Tsukidate, Tasuku Ishigooka, Tomohito Ebina, Kazuyoshi Serizawa
  • Publication number: 20220261262
    Abstract: A hypervisor of an embedded device switches CPU resources allocated to each virtual machine. CPU cores are allocated to the respective virtual machines so as to overlap each other by an adjustment margin between the guest OSs for which the number of CPU cores needs to be adjusted. For the CPU cores allocated in an overlapping manner, a CPU time is given to only one OS (the other OS is not operated). When the load between the guest OSs changes, the guest OS/virtual machine to which the CPU time is given is switched. Further, for example, control of allocating a dummy process is performed so that the guest OS to which it is not possible to allocate a CPU time due to switching does not allocate a real process.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 18, 2022
    Applicant: Hitachi Astemo, Ltd.
    Inventors: Kazuyoshi SERIZAWA, Tomohito EBINA
  • Patent number: 11392368
    Abstract: The present invention makes it possible to reduce the volume of communication data necessary for updating the configuration of a circuit unit of a reconfigurable circuit device. In an vehicle control system 10 including an FPGA 3, the FPGA 3 includes a circuit unit including a reconfigurable circuit and a circuit SRAM that stores configuration information of the circuit unit. A transfer check unit that acquires a difference command regarding a change part of a circuit element in the circuit unit, and a data conversion unit 4 that updates the configuration information based on the difference command are provided. Further, in the vehicle control system 10, a non-volatile memory 6 that stores the configuration information to be stored in the circuit SRAM is further provided. The data conversion unit 4 may update the configuration information stored in the non-volatile memory 6 based on the difference command acquired by the transfer check unit.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: July 19, 2022
    Assignee: HITACHI ASTEMO, LTD.
    Inventors: Tetsuya Yamada, Tomohito Ebina, Kazuyoshi Serizawa, Hiromichi Ito, Hidetoshi Teraoka, Kohei Sakurai
  • Publication number: 20220214993
    Abstract: The computing efficiency of an electronic computing device is improved. HPCs 20 to 23 include arithmetic processing units HA0 to HA3, respectively. Each of the arithmetic processing units HA0 to HA3 executes arithmetic processing in parallel. LPCs 30 to 33 includes management processing units LB0 to LB3, respectively. Each of the management processing units LB0 to LB3 manages execution of specific processing by an accelerator 6 when each of the arithmetic processing units HA0 to HA3 causes the accelerator 6 to execute the specific processing, and performs a series of commands for causing the accelerator 6 to execute the specific processing on a DMA controller 5 and the accelerator 6.
    Type: Application
    Filed: March 25, 2020
    Publication date: July 7, 2022
    Applicant: Hitachi Astemo, Ltd.
    Inventors: Tatsuya HORIGUCHI, Tasuku ISHIGOOKA, Kazuyoshi SERIZAWA, Tsunamichi TSUKIDATE
  • Publication number: 20220204007
    Abstract: Provided are a vehicle control device and a computer program capable of simplifying design of state transition. An intermediate layer constituting an ECU divides a state of a lower-layer state machine for each function of a vehicle system in association with the state of the lower-layer state machine, and outputs the state to an upper-layer state machine, a state transition table of the upper-layer state machine includes, as a condition of state transition of the upper-layer state machine, a current state of a lower-layer state machine or a state to transition, and the upper-layer state machine receives the state of the lower-layer state machine input from the intermediate layer, refers to the state transition table, and outputs a signal for controlling the vehicle system.
    Type: Application
    Filed: April 3, 2020
    Publication date: June 30, 2022
    Applicant: Hitachi Astemo, Ltd.
    Inventors: Ryo TSUCHIYA, Kazuyoshi SERIZAWA, Tomohito EBINA
  • Patent number: 11372706
    Abstract: This invention detects deviations from design without hindering the real-time nature of interrupt processing, and assists in analyzing the impact of faults caused by unintentional interrupt processing, with the goal of curbing erroneous detection. In order to resolve this problem, this vehicle control device comprises; a deviation determination unit 129 which determines if execution timing of an execution body has deviated from design settings, and transitions to a monitoring state; and a run-time verification unit 130 which verifies the impact of deviation at timing which differs from that of the interrupt processing.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: June 28, 2022
    Assignee: HITACHI ASTEMO, LTD.
    Inventors: Tasuku Ishigooka, Tomohito Ebina, Kazuyoshi Serizawa
  • Publication number: 20220035954
    Abstract: The present invention provides a software management device capable of converting a term used in a model and an abstraction level thereof. A software management device 1 includes: an input unit 2 that inputs a target model; a storage unit 3 that hierarchically stores functions and/or names constituting the model; and an in-model name replacement unit 6 that selects a corresponding function and/or name from the storage unit 3 according to the input model input from the input unit 2, and replaces a function and/or a name in the input model with the selected function and/or name.
    Type: Application
    Filed: October 16, 2019
    Publication date: February 3, 2022
    Applicant: Hitachi Astemo, Ltd.
    Inventors: Hiroki MAEHAMA, Fumio NARISAWA, Satoshi OTSUKA, Kazuyoshi SERIZAWA
  • Publication number: 20210248395
    Abstract: image data captured from a traveling vehicle is considered, and it is not possible to reduce the transmission band of the image data. It is assumed that a radar 4 mounted in a traveling vehicle 10 detects a certain distant three-dimensional object at a time T in a direction of a distance d1 [m] and an angle ?1 . Since the vehicle 10 travels at a vehicle speed Y [km/h], it is predicted that a camera 3 is capable of capturing the distant three-dimensional object at a time (T+?T) and an angle ?1 or at a distance d2 [m]. Therefore, if a control unit 2 outputs a request to the camera 3 in advance, so as to cut out an image of the angle ?1 or the distance d2 [m] at the time (T+?T), when the time (T+?T) comes, the camera 3 transfers a whole image and a high-resolution image being a cutout image of only a partial image, to the control unit 2.
    Type: Application
    Filed: June 3, 2019
    Publication date: August 12, 2021
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Tetsuya YAMADA, Teppei HIROTSU, Tomohito EBINA, Kazuyoshi SERIZAWA, Shouji MURAMATSU
  • Patent number: 10967813
    Abstract: The present invention provides a vehicle control device capable of realizing access authority definitions by the number equal to or greater than the number of access control registers provided in a memory protection device. In the vehicle control device according to the present invention, the whole or a part of a storage device that stores the access authority definitions used by the memory protection device to control the access authorities, is allocated fixedly to a memory area in advance and the rest is allocated dynamically.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: April 6, 2021
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Tasuku Ishigooka, Tomohito Ebina, Kazuyoshi Serizawa
  • Publication number: 20210070321
    Abstract: An abnormality related to control of automatic driving of a vehicle can be easily and appropriately diagnosed. In a vehicle control system 1000, a plurality of risk information generation units (CPUs 10A and 10B that execute risk map creation program 112A and 112B) that generates risk map which is used for automatic driving control of a vehicle when the vehicle moves based on sensor information related to an object around the vehicle is provided. Diagnosis units (CPUs 10A and 10B that execute diagnosis (risk map comparison) programs 113A and 113B)) that diagnose whether or not an abnormality occurs in the generated risk information based on a plurality pieces of risk information generated by the plurality of risk information generation units is provided.
    Type: Application
    Filed: March 4, 2019
    Publication date: March 11, 2021
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Kazuyoshi SERIZAWA, Tomohito EBINA, Fumio NARISAWA
  • Publication number: 20210061194
    Abstract: An in-vehicle network system includes a control unit, a plurality of gateway devices, and a plurality of sensors that collect ambient vehicle information. Each sensor communicates with the control unit via at least one gateway device. The control unit includes a mode management unit that determines an operation mode in a plurality of operation modes associated with the sensor, and a sleep instruction control unit that specifies a gateway device, which is the gateway device in which the connected sensor does not operate, and does not need to relay a sensor, based on the operation mode, and transitions the gateway device having no need to relay the sensor to a low power state in which a processing capacity is lowered. The gateway device is connected to the plurality of sensors which do not operate in any one of the same operation modes without passing through the other gateway devices.
    Type: Application
    Filed: December 21, 2018
    Publication date: March 4, 2021
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Jun SUGAWA, Kazuyoshi SERIZAWA, Shuhei KANEKO, Kenichi OSADA
  • Publication number: 20210036814
    Abstract: There are provided a vehicle control device and a control method thereof capable of improving safety and reliability with a simple configuration. A vehicle control device 1 that controls a vehicle includes an execution management unit P3 that manages execution of predetermined processing, an execution state recording unit P5 that records a history of execution states of the predetermined processing, and a setting information management unit P4 that manages setting information related to the execution of the predetermined processing. The setting information includes a jitter tolerance which is a tolerance of a jitter. The execution management unit P3 adjusts an execution timing of processing to be adjusted, which is included in the predetermined processing and in which the jitter is generated, based on the jitter tolerance of the processing to be adjusted.
    Type: Application
    Filed: March 6, 2019
    Publication date: February 4, 2021
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Tsunamichi TSUKIDATE, Tomohito EBINA, Kazuyoshi SERIZAWA, Kosei GOTO
  • Publication number: 20210004278
    Abstract: To be capable of concurrent execution of a function group not in data conflict by a plurality of cores and to execute a function pair in data conflict in a temporal separation manner. A process barrier 20 includes N?1 checker functions 22 and one limiter function 23, where the number of cores capable of concurrently executing the functions is N (N is an integer equal to or greater than 2), the checker functions 22 determine whether the head entry of a lock-free function queue LFQ1 is either the checker function 22 or the limiter function 23, and repeats reading of the head entry of the lock-free function queue LFQ1 if either, and ends processing if neither, and the limiter function 23 is an empty function ending without performing any processing.
    Type: Application
    Filed: January 23, 2019
    Publication date: January 7, 2021
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Masataka NISHI, Tomohito EBINA, Kazuyoshi SERIZAWA
  • Patent number: 10860577
    Abstract: An intermediate device is disposed between a host and a search target. Search requests of m-multiplicity (requests involving a data transfer amount that is unknown to the host) for at least one among n-processes (n is an integer equal to or more than 1) to be executed by the host are issued as requests from the host to the intermediate device. A temporary area associated with the search requests is allocated in the host. For each of the search requests, the intermediate device recognizes a hit data volume in accordance with the search request within a search scope. For each of the search, the hit data is written in an area of the temporary area that corresponds to a write destination address. The write destination address is updated for each of the search requests on the basis of the recognized hit data volume.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: December 8, 2020
    Assignee: HITACHI, LTD.
    Inventors: Koji Hosogi, Akifumi Suzuki, Kazuyoshi Serizawa, Akira Yamamoto
  • Publication number: 20200183733
    Abstract: In the present invention, when an abnormality occurs in a task, regardless of whether a critical section is being executed, timeout detection is realized by determining whether the critical section (CS) is necessary for the design in a preset task execution time and a certain period of time to distinguish between necessary interrupt disable and abnormal interrupt disable. A vehicle control device includes task execution means for causing a system to execute a task, and interrupt processing means for performing an interrupt process at the time of execution of the task. A maskable interrupt and a non-maskable interrupt that is commanded to execute after the maskable interrupt are included, the maskable interrupt is commanded to execute during an interrupt disable time, and then the non-maskable interrupt is executed.
    Type: Application
    Filed: June 28, 2018
    Publication date: June 11, 2020
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Tsunamichi TSUKIDATE, Tasuku ISHIGOOKA, Tomohito EBINA, Kazuyoshi SERIZAWA
  • Publication number: 20200174783
    Abstract: The present invention makes it possible to reduce the volume of communication data necessary for updating the configuration of a circuit unit of a reconfigurable circuit device. In an vehicle control system 10 including an FPGA 3, the FPGA 3 includes a circuit unit including a reconfigurable circuit and a circuit SRAM that stores configuration information of the circuit unit. A transfer check unit that acquires a difference command regarding a change part of a circuit element in the circuit unit, and a data conversion unit 4 that updates the configuration information based on the difference command are provided. Further, in the vehicle control system 10, a non-volatile memory 6 that stores the configuration information to be stored in the circuit SRAM is further provided. The data conversion unit 4 may update the configuration information stored in the non-volatile memory 6 based on the difference command acquired by the transfer check unit.
    Type: Application
    Filed: June 25, 2018
    Publication date: June 4, 2020
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Tetsuya YAMADA, Tomohito EBINA, Kazuyoshi SERIZAWA, Hiromichi ITO, Hidetoshi TERAOKA, Kohei SAKURAI
  • Publication number: 20190354424
    Abstract: This invention detects deviations from design without hindering the real-time nature of interrupt processing, and assists in analyzing the impact of faults caused by unintentional interrupt processing, with the goal of curbing erroneous detection. In order to resolve this problem, this vehicle control device comprises; a deviation determination unit 129 which determines if execution timing of an execution body has deviated from design settings, and transitions to a monitoring state; and a run-time verification unit 130 which verifies the impact of deviation at timing which differs from that of the interrupt processing.
    Type: Application
    Filed: March 15, 2018
    Publication date: November 21, 2019
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Tasuku ISHIGOOKA, Tomohito EBINA, Kazuyoshi SERIZAWA
  • Publication number: 20190232891
    Abstract: The present invention provides a vehicle control device capable of realizing access authority definitions by the number equal to or greater than the number of access control registers provided in a memory protection device. In the vehicle control device according to the present invention, the whole or a part of a storage device that stores the access authority definitions used by the memory protection device to control the access authorities, is allocated fixedly to a memory area in advance and the rest is allocated dynamically.
    Type: Application
    Filed: October 24, 2017
    Publication date: August 1, 2019
    Inventors: Tasuku ISHIGOOKA, Tomohito EBINA, Kazuyoshi SERIZAWA
  • Publication number: 20180239799
    Abstract: An intermediate device is disposed between a host and a search target. Search requests of m-multiplicity (requests involving a data transfer amount that is unknown to the host) for at least one among n-processes (n is an integer equal to or more than 1) to be executed by the host are issued as requests from the host to the intermediate device. A temporary area associated with the search requests is allocated in the host. For each of the search requests, the intermediate device recognizes a hit data volume in accordance with the search request within a search scope. For each of the search, the hit data is written in an area of the temporary area that corresponds to a write destination address. The write destination address is updated for each of the search requests on the basis of the recognized hit data volume.
    Type: Application
    Filed: December 24, 2015
    Publication date: August 23, 2018
    Applicant: HITACHI, LTD.
    Inventors: Koji HOSOGI, Akifumi SUZUKI, Kazuyoshi SERIZAWA, Akira YAMAMOTO
  • Patent number: 9785381
    Abstract: A computer system with a plurality of storage systems connected to each other via a network, each storage system including a virtual machine whose data is stored in hierarchized storage areas. When a virtual machine of a first storage system is migrated from the first storage system to a second storage system, the second storage system stores data of the virtual machine of the first storage system as well as data of its own virtual machine, in the hierarchized storage areas in the second storage system.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: October 10, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Shiga, Kazuyoshi Serizawa