Patents by Inventor Kazuyuki Mikubo

Kazuyuki Mikubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020053726
    Abstract: A semiconductor device includes two or more semiconductor modules which are stacked up into three-dimensional structure. Each semiconductor module includes a wiring board, one or more IC chips which are mounted on the wiring board, and one or more heat sinks which are attached to the IC chips via a thermal-conductive adhesive and are forcedly cooled by a coolant flowing through channels which are formed therein. The wiring board of each semiconductor module is provided with sockets having I/O pins and concavities. Electrical connection between adjacent semiconductor modules of the semiconductor device is established by inserting the I/O pins of the sockets of one semiconductor module into the concavities of the sockets of the other semiconductor module. The channels in the heat sink are implemented by a plurality of channel grooves which are generated between a plurality of fins which are formed in a cavity inside the heat sink at predetermined intervals.
    Type: Application
    Filed: November 8, 2001
    Publication date: May 9, 2002
    Inventors: Kazuyuki Mikubo, Sakae Kitajo
  • Publication number: 20010048708
    Abstract: The thermal resistance of an entire semiconductor package with a semiconductor chip and radiation fins is calculated based on thermal resistance of resin between the semiconductor chip and case, thermal resistance of the radiation fins, and thermal resistance of three heat radiation paths in the semiconductor package. One of said three heat radiation paths is passing through the bottom surface of the case. The other of said three radiation paths is passing through the leadframe. The other of three radiation paths is passing through sides of the case other than the leadframe.
    Type: Application
    Filed: March 28, 2001
    Publication date: December 6, 2001
    Inventors: Kazuyuki Mikubo, Sakae Kitajo
  • Patent number: 6238086
    Abstract: The thermal resistance of an entire semiconductor package with a semiconductor chip and radiation fins is calculated based on thermal resistance of resin between the semiconductor chip and case, thermal resistance of the radiation fins, and thermal resistance of three heat radiation paths in the semiconductor package. One of said three heat radiation paths is passing through the bottom surface of the case. The other of said three radiation paths is passing through the leadframe. The other of three radiation paths is passing through sides of the case other than the leadframe.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: May 29, 2001
    Assignee: NEC Corporation
    Inventors: Kazuyuki Mikubo, Sakae Kitajo
  • Patent number: 6194787
    Abstract: The present invention adopts a circuit pattern in which in a carrier of a package for coupling semiconductor devices at multistage, drawing out lines for selecting individual semiconductor devices are coupled in parallel. Thus, the present invention achieves the multistage coupling semiconductor device which can be completed with a circuit pattern of one kind regardless of the number of stages of a multistage. Using the carrier having the foregoing structure, the semiconductor device is assembled and is subjected to characteristic inspections. Thereafter, the circuit patterns, coupled in parallel, having good electrical characteristics are partially cut by either laser, sand-blast, or etching. The products can be specified according to the circuit pattern which is cut.
    Type: Grant
    Filed: April 4, 1997
    Date of Patent: February 27, 2001
    Assignee: NEC Corporation
    Inventors: Naoji Senba, Kazuyuki Mikubo
  • Patent number: 6014314
    Abstract: A semiconductor package structure comprising the following elements. A printed board has a first surface on which a plurality of first heat-conductive patterns are provided and a second surface on which a plurality of second heat-conductive patterns are provided. The printed board has heat-conductive through holes connecting the first and second heat-conductive patterns. A multi-chip module has a plurality of semiconductor packages and is provided on the first surface of the printed board. A plurality of heat-conductive supporting members are provided on the first heat-conductive patterns. A heat radiator structure is provided which has at least two heat radiation fins and at least a heat radiation groove defined by the heat radiation fins. The heat radiator structure is provided on the multi-chip module.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: January 11, 2000
    Assignee: NEC Corporation
    Inventor: Kazuyuki Mikubo