Patents by Inventor Kazuyuki Sugahara
Kazuyuki Sugahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230293124Abstract: A CPU of a console includes a status recognition unit and a projector controller. The status recognition unit acquires subject position information, an adjustment end signal, and an irradiation end signal, which are progress status information indicating a progress status of radiography. The projector controller performs control of causing a projector to project guide information which is related to imaging aimed at a subject, the guide information corresponding to the progress status information, onto a preset projection surface of a radiography room.Type: ApplicationFiled: February 24, 2023Publication date: September 21, 2023Inventors: Hisatsugu HORIUCHI, Koji TANINAI, Masataka SUGAHARA, Kazuyuki OGI, Atsushi ONODA
-
Publication number: 20230293134Abstract: A CPU of an imaging management device has a status recognition unit, an entrance control unit, a speaker control unit, and a monitor control unit. The status recognition unit acquires progress status information indicating a progress status of radiography at each of the plurality of radiography rooms, such as subject position information indicating a position of a subject in the radiography room. The entrance control unit performs entrance control of the subject into the radiography room based on the progress status information. The speaker control unit and the monitor control unit perform output control of guide voice and guide information regarding imaging toward the subject. The entrance control by the entrance control unit and the output control by the speaker control unit and the monitor control unit are performed, thereby shifting the timing of the radiography at the plurality of radiography rooms.Type: ApplicationFiled: March 10, 2023Publication date: September 21, 2023Inventors: Hisatsugu HORIUCHI, Koji TANINAI, Masataka SUGAHARA, Kazuyuki OGI, Atsushi ONODA
-
Publication number: 20230047789Abstract: Provided is a semiconductor device capable of suppressing an Al slide at a time of an operation under a high temperature in a laminated structure of an aluminum electrode layer and a copper electrode layer. Accordingly, in the semiconductor device according to the present disclosure, a first copper electrode layer includes a plurality of protruding regions as regions protruding toward the aluminum electrode layer in an interface with the aluminum electrode layer.Type: ApplicationFiled: April 6, 2020Publication date: February 16, 2023Applicant: Mitsubishi Electric CorporationInventors: Motoru YOSHIDA, Yuji SATO, Kazuyuki SUGAHARA
-
Patent number: 11407217Abstract: A printing device includes a coating material scooping unit configured to scoop a coating material on a mask, and a controller configured or programmed to determine whether or not the coating material scooping unit performs collecting operation to collect the coating material on the mask when the mask is replaced.Type: GrantFiled: June 5, 2018Date of Patent: August 9, 2022Assignee: YAMAHA HATSUDOKI KABUSHIKI KAISHAInventors: Takeshi Fujimoto, Kazuyuki Sugahara, Takeshi Miwa, Jinok Park
-
Patent number: 11158511Abstract: A semiconductor device that includes a semiconductor layer disposed on a semiconductor substrate, a first semiconductor region provided in an upper layer portion of the semiconductor layer, a second semiconductor region provided in an upper layer portion of the first semiconductor region, a gate insulation film, a gate electrode, a first main electrode that is provided on an interlayer insulation film that covers the gate electrode and that is electrically connected to the second semiconductor region via a contact hole, and a second main electrode disposed on a second main surface of the semiconductor substrate. The first main electrode includes an underlying electrode film connected to the second semiconductor region via the contact hole, and a copper film provided on the underlying electrode film. The copper film includes at least a portion that serves as a stress relaxation layer having a smaller grain size than the other portion of the copper film.Type: GrantFiled: February 2, 2017Date of Patent: October 26, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Kazuyuki Sugahara, Hiroaki Okabe, Motoru Yoshida
-
Patent number: 11117365Abstract: A printing device includes a controller configured or programmed to acquire, based on a width of a coating material that has been measured, at least one of a start position, an end position, or an amount of movement of a coating material scooping unit in coating material scooping operation.Type: GrantFiled: June 5, 2018Date of Patent: September 14, 2021Assignee: YAMAHA HATSUDOKI KABUSHIKI KAISHAInventors: Takeshi Fujimoto, Katsumi Totani, Takeshi Miwa, Kazuyuki Sugahara
-
Publication number: 20210237425Abstract: A printing device includes a controller configured or programmed to acquire, based on a width of a coating material that has been measured, at least one of a start position, an end position, or an amount of movement of a coating material scooping unit in coating material scooping operation.Type: ApplicationFiled: June 5, 2018Publication date: August 5, 2021Applicant: YAMAHA HATSUDOKI KABUSHIKI KAISHAInventors: Takeshi FUJIMOTO, Katsumi TOTANI, Takeshi MIWA, Kazuyuki SUGAHARA
-
Patent number: 11063122Abstract: In a termination region of a SiC-MOSFET, suppressing operation of a p-n diode between a well and a drift layer sometimes decreases reliability during high-speed switching. In a termination region of a SiC-MOSFET with a built-in SBD are provided second well region having an impurity concentration lower than the impurity concentration in a well region in an active region, and a high-concentration region that is formed on a surface layer of the second well region, has an impurity concentration higher than the impurity concentration in the well region in the active region, and is ohmic-connected to a source electrode.Type: GrantFiled: October 24, 2017Date of Patent: July 13, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yusuke Yamashiro, Kazuyuki Sugahara, Hiroshi Watanabe, Kohei Ebihara
-
Publication number: 20210122152Abstract: A printing device includes a coating material scooping unit configured to scoop a coating material on a mask, and a controller configured or programmed to determine whether or not the coating material scooping unit performs collecting operation to collect the coating material on the mask when the mask is replaced.Type: ApplicationFiled: June 5, 2018Publication date: April 29, 2021Applicant: YAMAHA HATSUDOKI KABUSHIKI KAISHAInventors: Takeshi FUJIMOTO, Kazuyuki SUGAHARA, Takeshi MIWA, Jinok PARK
-
Patent number: 10707146Abstract: Provided is a semiconductor device having high heat conductivity and high productivity. A semiconductor device includes an insulating substrate, a semiconductor element, a die-bond material, a joining material, and a cooler. The insulating substrate has an insulating ceramic, a first conductive plates disposed on one surface of the insulating ceramic, and a second conductive plate disposed on another surface of the insulating ceramic. The semiconductor element is disposed on the first conductive plate through the die-bond material. The die-bond material contains sintered metal. The semiconductor element has a bending strength degree of 700 MPa or more, and has a thickness of 0.05 mm or more and 0.1 mm or less. The cooler is joined to the second conductive plate through the joining material.Type: GrantFiled: October 31, 2016Date of Patent: July 7, 2020Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Motoru Yoshida, Yoshiyuki Suehiro, Kazuyuki Sugahara, Yosuke Nakanishi, Yoshinori Yokoyama, Shinnosuke Soda, Komei Hayashi
-
Publication number: 20200127098Abstract: In a termination region of a SiC-MOSFET, suppressing operation of a p-n diode between a well and a drift layer sometimes decreases reliability during high-speed switching. In a termination region of a SiC-MOSFET with a built-in SBD are provided second well region having an impurity concentration lower than the impurity concentration in a well region in an active region, and a high-concentration region that is formed on a surface layer of the outer periphery second well region, has an impurity concentration higher than the impurity concentration in the well region in the active region, and is ohmic-connected to a source electrode.Type: ApplicationFiled: October 24, 2017Publication date: April 23, 2020Applicant: Mitsubishi Electric CorporationInventors: Yusuke YAMASHIRO, Kazuyuki SUGAHARA, Hiroshi WATANABE, Kohei EBIHARA
-
Patent number: 10276502Abstract: A method for manufacturing a semiconductor device includes: a process of forming a Cu wiring electrode by a plating method above a semiconductor element using a wide bandgap semiconductor as a base material; a reducing process of reducing the Cu wiring electrode under a NH3 atmosphere; a heating process of heating the Cu wiring electrode at the same time as the reducing process; a process of forming a diffusion prevention film covering the Cu wiring electrode after the heating process; and a sealing process of covering the diffusion prevention film with an organic resin film.Type: GrantFiled: November 27, 2015Date of Patent: April 30, 2019Assignee: Mitsubishi Electric CorporationInventors: Motoru Yoshida, Hiroaki Okabe, Kazuyuki Sugahara
-
Publication number: 20190122955Abstract: Provided is a semiconductor device having high heat conductivity and high productivity. A semiconductor device includes an insulating substrate, a semiconductor element, a die-bond material, a joining material, and a cooler. The insulating substrate has an insulating ceramic, a first conductive plates disposed on one surface of the insulating ceramic, and a second conductive plate disposed on another surface of the insulating ceramic. The semiconductor element is disposed on the first conductive plate through the die-bond material. The die-bond material contains sintered metal. The semiconductor element has a bending strength degree of 700 MPa or more, and has a thickness of 0.05 mm or more and 0.1 mm or less. The cooler is joined to the second conductive plate through the joining material.Type: ApplicationFiled: October 31, 2016Publication date: April 25, 2019Applicant: Mitsubishi Electric CorporationInventors: Motoru YOSHIDA, Yoshiyuki SUEHIRO, Kazuyuki SUGAHARA, Yosuke NAKANISHI, Yoshinori YOKOYAMA, Shinnosuke SODA, Komei HAYASHI
-
Publication number: 20190057873Abstract: A semiconductor device that includes a semiconductor layer disposed on a semiconductor substrate, a first semiconductor region provided in an upper layer portion of the semiconductor layer, a second semiconductor region provided in an upper layer portion of the first semiconductor region, a gate insulation film, a gate electrode, a first main electrode that is provided on an interlayer insulation film that covers the gate electrode and that is electrically connected to the second semiconductor region via a contact hole, and a second main electrode disposed on a second main surface of the semiconductor substrate. The first main electrode includes an underlying electrode film connected to the second semiconductor region via the contact hole, and a copper film provided on the underlying electrode film. The copper film includes at least a portion that serves as a stress relaxation layer having a smaller grain size than the other portion of the copper film.Type: ApplicationFiled: February 2, 2017Publication date: February 21, 2019Applicant: Mitsubishi Electric CorporationInventors: Kazuyuki SUGAHARA, Hiroaki OKABE, Motoru YOSHIDA
-
Publication number: 20180040563Abstract: A method for manufacturing a semiconductor device includes: a process of forming a Cu wiring electrode by a plating method above a semiconductor element using a wide bandgap semiconductor as a base material; a reducing process of reducing the Cu wiring electrode under a NH3 atmosphere; a heating process of heating the Cu wiring electrode at the same time as the reducing process; a process of forming a diffusion prevention film covering the Cu wiring electrode after the heating process; and a sealing process of covering the diffusion prevention film with an organic resin film.Type: ApplicationFiled: November 27, 2015Publication date: February 8, 2018Applicant: Mitsubishi Electric CorporationInventors: Motoru YOSHIDA, Hiroaki OKABE, Kazuyuki SUGAHARA
-
Patent number: 9842738Abstract: A method of manufacturing a silicon carbide semiconductor device is provided. The method suppresses the increase in the number of manufacturing steps and is capable of suppressing the degradation of ohmic characteristics of an alloy layer with respect to a semiconductor substrate. The method includes a step of forming a metal layer made of a first metal on a semiconductor substrate made of silicon carbide; a step of forming a metal nitride film obtained by nitriding a second metal on the metal layer; a step of directing a laser light through the metal nitride film to form a layer of an alloy of silicon carbide in the semiconductor substrate and the first metal in the metal layer; and a step of forming an electrode on the metal nitride film.Type: GrantFiled: April 9, 2014Date of Patent: December 12, 2017Assignee: Mitsubishi Electric CorporationInventors: Yosuke Nakanishi, Hiroaki Okabe, Motoru Yoshida, Kazuyuki Sugahara, Takaaki Tominaga
-
Patent number: 9721915Abstract: A semiconductor device capable of inhibiting oxidation of a Cu wiring even in a high temperature operation. The semiconductor device includes a semiconductor substrate having a main surface, a Cu electrode which is selectively formed on a side of the main surface of the semiconductor substrate, an antioxidant film formed on an upper surface of the Cu electrode except an end portion thereof, an organic resin film which is formed on the main surface of the semiconductor substrate and covers a side surface of the Cu electrode and the end portion of the upper surface thereof, and a diffusion prevention film formed between the organic resin film and the main surface of the semiconductor substrate and between the organic resin film and the side surface and the end portion of the upper surface of the Cu electrode, being in contact therewith.Type: GrantFiled: February 16, 2015Date of Patent: August 1, 2017Assignee: Mitsubishi Electric CorporationInventors: Motoru Yoshida, Kazuyo Endo, Jun Fujita, Hiroaki Okabe, Kazuyuki Sugahara
-
Publication number: 20170032968Abstract: A method of manufacturing a silicon carbide semiconductor device is provided. The method suppresses the increase in the number of manufacturing steps and is capable of suppressing the degradation of ohmic characteristics of an alloy layer with respect to a semiconductor substrate. The method includes a step of forming a metal layer made of a first metal on a semiconductor substrate made of silicon carbide; a step of forming a metal nitride film obtained by nitriding a second metal on the metal layer; a step of directing a laser light through the metal nitride film to form a layer of an alloy of silicon carbide in the semiconductor substrate and the first metal in the metal layer; and a step of forming an electrode on the metal nitride film.Type: ApplicationFiled: April 9, 2014Publication date: February 2, 2017Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Yosuke NAKANISHI, Hiroaki OKABE, Motoru YOSHIDA, Kazuyuki SUGAHARA, Takaaki TOMINAGA
-
Publication number: 20160358874Abstract: A semiconductor device capable of inhibiting oxidation of a Cu wiring even in a high temperature operation. The semiconductor device includes a semiconductor substrate having a main surface, a Cu electrode which is selectively formed on a side of the main surface of the semiconductor substrate, an antioxidant film formed on an upper surface of the Cu electrode except an end portion thereof, an organic resin film which is formed on the main surface of the semiconductor substrate and covers a side surface of the Cu electrode and the end portion of the upper surface thereof, and a diffusion prevention film formed between the organic resin film and the main surface of the semiconductor substrate and between the organic resin film and the side surface and the end portion of the upper surface of the Cu electrode, being in contact therewith.Type: ApplicationFiled: February 16, 2015Publication date: December 8, 2016Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Motoru YOSHIDA, Kazuyo ENDO, Jun FUJITA, Hiroaki OKABE, Kazuyuki SUGAHARA
-
Patent number: 9120631Abstract: A board working system includes a board working apparatus working on a board and a board conveying apparatus including a first board conveying portion, connected to the board working apparatus. The board conveying apparatus is provided with a shutter device closing such that the maximum interval of an opening gap leading from the first board conveying portion to the board working apparatus is not more than a prescribed value when setup for the first board conveying portion is performed.Type: GrantFiled: November 14, 2013Date of Patent: September 1, 2015Assignee: Yamaha Hatsudoki Kabushiki KaishaInventors: Kazuyuki Sugahara, Toshihiko Ohata