Patents by Inventor Keiichi Hatakeyama

Keiichi Hatakeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220389517
    Abstract: An object of the present invention is to provide a method for predicting a risk of developing cancer. DNA samples were prepared from blood and cancer tissues of 2480 cancer patients and analyzed for the nucleotide sequences of exon regions using NGS. As a result, among the cancer patients, 7 patients were confirmed to have D49H mutation or A159D mutation which is a germ cell mutation.
    Type: Application
    Filed: July 26, 2022
    Publication date: December 8, 2022
    Inventors: Ken YAMAGUCHI, Masatoshi KUSUHARA, Masakuni SERIZAWA, Tohru MOCHIZUKI, Keiichi OHSHIMA, Keiichi HATAKEYAMA, Kenichi URAKAMI, Shumpei OHNAMI, Yasuto AKIYAMA, Kouji MARUYAMA, Kengo INOUE, Yuji SHIMODA, Takeshi NAGASHIMA, Yoshinobu ISHIKAWA
  • Publication number: 20200255901
    Abstract: An object of the present invention is to provide a method for predicting a risk of developing cancer. DNA samples were prepared from blood and cancer tissues of 2480 cancer patients and analyzed for the nucleotide sequences of exon regions using NGS. As a result, among the cancer patients, 7 patients were confirmed to have D49H mutation or A159D mutation which is a germ cell mutation.
    Type: Application
    Filed: August 3, 2017
    Publication date: August 13, 2020
    Inventors: Ken YAMAGUCHI, Masatoshi KUSUHARA, Masakuni SERIZAWA, Tohru MOCHIZUKI, Keiichi OHSHIMA, Keiichi HATAKEYAMA, Kenichi URAKAMI, Shumpei OHNAMI, Yasuto AKIYAMA, Kouji MARUYAMA, Kengo INOUE, Yuji SHIMODA, Takeshi NAGASHIMA, Yoshinobu ISHIKAWA
  • Patent number: 10641773
    Abstract: An object of the present invention is to provide a method for collecting highly accurate data for diagnosis, useful in diagnosing the presence or absence of extrahepatic bile duct carcinoma, intrahepatic bile duct carcinoma, or gallbladder carcinoma, and a kit for diagnosis. When the concentration of CEACAM1 in a blood sample collected from a test subject is detected using a kit for diagnosis comprising an antibody specifically binding to CEACAM1 or a labeled product thereof, or the like and the CEACAM1 concentration is higher than the concentration of CEACAM1 in a blood sample derived from a non-carcinoma control subject or higher than a certain threshold value (cutoff value), data can be collected for diagnosing the test subject as having a high possibility of having extrahepatic bile duct carcinoma, intrahepatic bile duct carcinoma, or gallbladder carcinoma.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: May 5, 2020
    Assignee: SHIZUOKA PREFECTURE
    Inventors: Tohru Mochizuki, Keiichi Ohshima, Keiichi Hatakeyama, Ken Yamaguchi, Kanako Nakao
  • Patent number: 10018539
    Abstract: A protein retrieval treatment system used for activating proteins contained in a deparaffinized tissue section obtained by removing paraffin from a formalin-fixed paraffin embedded tissue section. The protein retrieval treatment system includes: a dispensing unit for dispensing a retrieval treatment solution over a dispensing area including a measurement area on the deparaffinized tissue section; and a moist-heat treatment unit for heating, in a saturated water vapor, the deparaffinized tissue section with the dispensing area covered with the retrieval treatment solution.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: July 10, 2018
    Assignees: SHIMADZU CORPORATION, SHIZUOKA PREFECTURE
    Inventors: Yutaka Aoki, Yukari Umino, Taka-Aki Sato, Isamu Hayashi, Keiichi Hatakeyama, Shun-ichiro Ogura
  • Publication number: 20180080935
    Abstract: An object of the present invention is to provide a method for collecting highly accurate data for diagnosis, useful in diagnosing the presence or absence of extrahepatic bile duct carcinoma, intrahepatic bile duct carcinoma, or gallbladder carcinoma, and a kit for diagnosis. When the concentration of CEACAM1 in a blood sample collected from a test subject is detected using a kit for diagnosis comprising an antibody specifically binding to CEACAM1 or a labeled product thereof, or the like and the CEACAM1 concentration is higher than the concentration of CEACAM1 in a blood sample derived from a non-carcinoma control subject or higher than a certain threshold value (cutoff value), data can be collected for diagnosing the test subject as having a high possibility of having extrahepatic bile duct carcinoma, intrahepatic bile duct carcinoma, or gallbladder carcinoma.
    Type: Application
    Filed: July 21, 2017
    Publication date: March 22, 2018
    Inventors: Tohru MOCHIZUKI, Keiichi OHSHIMA, Keiichi HATAKEYAMA, Ken YAMAGUCHI, Kanako NAKAO
  • Publication number: 20160153872
    Abstract: A protein retrieval treatment system used for activating proteins contained in a deparaffinized tissue section obtained by removing paraffin from a formalin-fixed paraffinembedded tissue section. The protein retrieval treatment system includes: a dispensing unit for dispensing a retrieval treatment solution over a dispensing area including a measurement area on the deparaffinized tissue section; and a moist-heat treatment unit for heating, in a saturated water vapor, the deparaffinized tissue section with the dispensing area covered with the retrieval treatment solution.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 2, 2016
    Applicants: SHIMADZU CORPORATION, SHIZUOKA PREFECTURE
    Inventors: Yutaka AOKI, Yukari UMINO, Taka-Aki SATO, Isamu HAYASHI, Keiichi HATAKEYAMA, Shun-ichiro OGURA
  • Publication number: 20150179494
    Abstract: A method for producing a semiconductor device having a semiconductor element obtained by dividing a semiconductor wafer comprises a temporary securing step of arranging a temporary securing film between a support member and the semiconductor wafer so as to temporarily secure the support member and the semiconductor wafer to each other; a grinding step of grinding a surface on the side opposite from the temporary securing film of the semiconductor wafer temporarily secured to the support member, and a semiconductor wafer peeling step of peeling the temporary securing film from the ground semiconductor wafer, wherein a semiconductor wafer edge-trimmed on an outer peripheral part of a surface opposing the support member is used as the semiconductor wafer, and the temporary securing step arranges the temporary securing film on the inside of the edge-trimmed part.
    Type: Application
    Filed: June 26, 2013
    Publication date: June 25, 2015
    Inventors: Takashi Kawamori, Tatsuya Makino, Shogo Young Sobue, Keiichi Hatakeyama, Takayuki Matsuzaki
  • Publication number: 20140332984
    Abstract: Disclosed is an adhesive composition which includes (a) an epoxy resin, (b) a curing agent and (c) a polymer compound incompatible with said epoxy resin, and further optionally includes (d) a filler and/or (e) a curing accelerator. Also disclosed are a process for producing an adhesive composition, including mixing (a) the epoxy resin and (b) the curing agent with (d) the filler, followed by mixing the resultant mixture with (c) the polymer compound incompatible with the epoxy resin; an adhesive film including the above-mentioned adhesive composition formed into a film; a substrate for mounting a semiconductor including a wiring board and the above-mentioned adhesive film disposed thereon on its side where chips are to be mounted; and a semiconductor device which includes the above-mentioned adhesive film or the substrate for mounting a semiconductor.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Inventors: Teiichi INADA, Keiji SUMIYA, Takeo TOMIYAMA, Tetsurou IWAKURA, Hiroyuki KAWAKAMI, Masao SUZUKI, Takayuki MATSUZAKI, Youichi HOSOKAWA, Keiichi HATAKEYAMA, Yasushi SHIMADA, Yuuko TANAKA, Hiroyuki KURIYA
  • Publication number: 20140220624
    Abstract: A protein retrieval treatment system used for activating proteins contained in a deparaffinized tissue section obtained by removing paraffin from a formalin-fixed paraffin-embedded tissue section. The protein retrieval treatment system includes: a dispensing unit for dispensing a retrieval treatment solution over a dispensing area including a measurement area on the deparaffinized tissue section; and a moist-heat treatment unit for heating, in a saturated water vapor, the deparaffinized tissue section with the dispensing area covered with the retrieval treatment solution.
    Type: Application
    Filed: April 25, 2012
    Publication date: August 7, 2014
    Applicants: SHIZUOKA PREFECTURE, SHIMADZU CORPORATION
    Inventors: Yutaka Aoki, Yukari Umino, Taka-Aki Sato, Isamu Hayashi, Keiichi Hatakeyama, Shun-ichiro Ogura
  • Patent number: 8404564
    Abstract: There is provided an adhesive film for a semiconductor, which can be attached to a semiconductor wafer at low temperature and which allows semiconductor chips to be obtained at high yield from the semiconductor wafer while sufficiently inhibiting generation of chip cracks and burrs. The adhesive film for a semiconductor comprises a polyimide resin that can be obtained by reaction between a tetracarboxylic dianhydride containing 4,4?-oxydiphthalic dianhydride represented by chemical formula (I) below and a diamine containing a siloxanediamine represented by the following general formula (II) below, and that can be attached to a semiconductor wafer at 100° C. or below.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: March 26, 2013
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Yuuki Nakamura, Tsutomu Kitakatsu, Youji Katayama, Keiichi Hatakeyama
  • Publication number: 20120295400
    Abstract: The method for producing a semiconductor chip with an adhesive film includes preparing a laminate of a divided semiconductor wafer, an adhesive film and a dicing tape, the adhesive film having a thickness in the range of 1 to 15 ?m and a tensile elongation at break of less than 5%, and the tensile elongation at break being less than 110% of the elongation at a maximum load; and dividing the adhesive film for a semiconductor by picking up the plurality of semiconductor chips in a laminating direction of the laminate. The divided semiconductor wafer has been obtained by cutting the semiconductor wafer in a thickness less than that of the semiconductor wafer and by grinding the other side of the semiconductor wafer on which no cut is formed to reach the cut.
    Type: Application
    Filed: May 18, 2012
    Publication date: November 22, 2012
    Inventors: Keiichi Hatakeyama, Yuuki Nakamura
  • Publication number: 20120244347
    Abstract: There is an adhesive film for a semiconductor for use in a method for manufacturing a semiconductor chip. The method includes preparing a laminated body having a semiconductor wafer, an adhesive film for a semiconductor and dicing tape laminated in that order. The adhesive film for a semiconductor has a tensile breaking elongation of less than 5%, and the tensile breaking elongation is less than 110% of the elongation at maximum load. The semiconductor wafer is partitioned into multiple semiconductor chips and notches are formed from the semiconductor wafer side so that at least a portion of the adhesive film for a semiconductor remains uncut in its thickness direction. The method also includes stretching out the dicing tape in a direction so that the multiple semiconductor chips are separated apart, to separate the adhesive film for a semiconductor along the notches.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 27, 2012
    Inventors: Yuuki Nakamura, Tsutomu Kitakatsu, Youji Katayama, Keiichi Hatakeyama
  • Patent number: 8232185
    Abstract: There is provided a method that allows semiconductor chips to be obtained from a semiconductor wafer at high yield, while sufficiently inhibiting generation of chip cracks and burrs. The method for manufacturing a semiconductor chip comprises a step of preparing a laminated body having a semiconductor wafer, an adhesive film for a semiconductor and dicing tape laminated in that order, the semiconductor wafer being partitioned into multiple semiconductor chips and notches being formed from the semiconductor wafer side so that at least a portion of the adhesive film for a semiconductor remains uncut in its thickness direction, and a step of stretching out the dicing tape in a direction so that the multiple semiconductor chips are separated apart, to separate the adhesive film for a semiconductor along the notches. The adhesive film for a semiconductor has a tensile breaking elongation of less than 5% and the tensile breaking elongation of less than 110% of the elongation at maximum load.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 31, 2012
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Yuuki Nakamura, Tsutomu Kitakatsu, Youji Katayama, Keiichi Hatakeyama
  • Patent number: 8198176
    Abstract: The method for producing a semiconductor chip with an adhesive film of the present invention comprises steps of preparing a laminate in which at least a divided semiconductor wafer comprising a plurality of semiconductor chips, obtained by forming a cut which separates the semiconductor wafer into a plurality of semiconductor chips on one side of the semiconductor wafer in a thickness less than that of the semiconductor wafer and by grinding the other side of the semiconductor wafer on which no cut is formed to reach the cut, an adhesive film for a semiconductor and a dicing tape are laminated, the adhesive film for a semiconductor having a thickness in the range of 1 to 15 ?m and a tensile elongation at break of less than 5%, and the tensile elongation at break being less than 110% of the elongation at a maximum load; and dividing the adhesive film for a semiconductor by picking up the plurality of semiconductor chips in a laminating direction of the laminate, thereby preparing a semiconductor chip with an a
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: June 12, 2012
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Keiichi Hatakeyama, Yuuki Nakamura
  • Publication number: 20120080808
    Abstract: Disclosed is an adhesive composition which includes (a) an epoxy resin, (b) a curing agent and (c) a polymer compound incompatible with said epoxy resin, and further optionally includes (d) a filler and/or (e) a curing accelerator. Also disclosed are a process for producing an adhesive composition, including mixing (a) the epoxy resin and (b) the curing agent with (d) the filler, followed by mixing the resultant mixture with (c) the polymer compound incompatible with the epoxy resin; an adhesive film including the above-mentioned adhesive composition formed into a film; a substrate for mounting a semiconductor including a wiring board and the above-mentioned adhesive film disposed thereon on its side where chips are to be mounted; and a semiconductor device which includes the above-mentioned adhesive film or the substrate for mounting a semiconductor.
    Type: Application
    Filed: December 12, 2011
    Publication date: April 5, 2012
    Inventors: Teiichi Inada, Keiji Sumiya, Takeo Tomiyama, Tetsurou Iwakura, Hiroyuki Kawakami, Masao Suzuki, Takayuki Matsuzaki, Youichi Hosokawa, Keiichi Hatakeyama, Yasushi Shimada, Yuuko Tanaka, Hiroyuki Kuriya
  • Patent number: 8119737
    Abstract: Disclosed is an adhesive composition which includes (a) an epoxy resin, (b) a curing agent and (c) a polymer compound incompatible with said epoxy resin, and further optionally includes (d) a filler and/or (e) a curing accelerator. Also disclosed are a process for producing an adhesive composition, including mixing (a) the epoxy resin and (b) the curing agent with (d) the filler, followed by mixing the resultant mixture with (c) the polymer compound incompatible with the epoxy resin; an adhesive film including the above-mentioned adhesive composition formed into a film; a substrate for mounting a semiconductor including a wiring board and the above-mentioned adhesive film disposed thereon on its side where chips are to be mounted; and a semiconductor device which includes the above-mentioned adhesive film or the substrate for mounting a semiconductor.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: February 21, 2012
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Teiichi Inada, Keiji Sumiya, Takeo Tomiyama, Tetsurou Iwakura, Hiroyuki Kawakami, Masao Suzuki, Takayuki Matsuzaki, Youichi Hosokawa, Keiichi Hatakeyama, Yasushi Shimada, Yuuko Tanaka, Hiroyuki Kuriya
  • Publication number: 20110318879
    Abstract: A method for producing a semiconductor chip with an adhesive film, which includes: preparing a laminate in which a semiconductor wafer, an adhesive film and a dicing tape are laminated in that order, the adhesive film having a thickness in the range of 1 to 15 ?m and a tensile elongation at break of less than 5%, and the tensile elongation at break being less than 110% of the elongation at a maximum load, and the semiconductor wafer having a section, for dividing the semiconductor wafer into a plurality of semiconductor chips, which is formed by irradiating with laser light; dividing the semiconductor wafer into a plurality of semiconductor chips without dividing the adhesive film, by expanding the dicing tape; and dividing the adhesive film by picking up the plurality of semiconductor chips.
    Type: Application
    Filed: September 9, 2011
    Publication date: December 29, 2011
    Inventors: Keiichi HATAKEYAMA, Yuuki Nakamura
  • Patent number: 8071465
    Abstract: A method for producing a semiconductor chip with an adhesive film, which includes: preparing a laminate in which a semiconductor wafer, an adhesive film and a dicing tape are laminated in that order, the adhesive film having a thickness in the range of 1 to 15 ?m and a tensile elongation at break of less than 5%, and the tensile elongation at break being less than 110% of the elongation at a maximum load, and the semiconductor wafer having a section, for dividing the semiconductor wafer into a plurality of semiconductor chips, which is formed by irradiating with laser light; dividing the semiconductor wafer into a plurality of semiconductor chips without dividing the adhesive film, by expanding the dicing tape; and dividing the adhesive film by picking up the plurality of semiconductor chips.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: December 6, 2011
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Keiichi Hatakeyama, Yuuki Nakamura
  • Patent number: 8034659
    Abstract: To provide a method of manufacturing semiconductor devices, the method being capable of efficiently obtaining a singulated semiconductor chip upon which an adhesive is adhered and also capable of excellently bonding a semiconductor chip to a wiring substrate, and provide an adhesive film. A layered product 60 in which a dicing tape 9, an adhesive layer 3, and a semiconductor wafer 6 are stacked in this order so that a circuit surface 6a of the semiconductor wafer 6 may face the dicing tape 9 side. A cutting position is recognized by recognizing a circuit pattern P in the circuit surface 6a from a rear surface 6b of the semiconductor wafer 6. At least the semiconductor wafer 6 and the adhesive layer 3 are cut in the thickness direction of the layered product 60. The dicing tape 9 is cured to peel off the dicing tape 9 and the adhesive layer 3. A projection electrode 4 of a semiconductor chip 26 is aligned with a wiring 12 of a wiring substrate 40.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: October 11, 2011
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Akira Nagai, Masaaki Yasuda, Keiichi Hatakeyama, Tetsuya Enomoto
  • Publication number: 20110193244
    Abstract: An object of the present invention is to provide a die-adhering adhesive film which can be laminated on a back of a wafer at a temperature lower than a softening temperature of a protecting tape for an ultra-thin wafer, or a dicing tape to be laminated, can reduce a thermal stress such as warpage of a wafer, can simplify a step of manufacturing a semiconductor device, and is excellent in heat resistance and humidity resistance reliance, an adhesive sheet in which the adhesive film and a dicing tape are laminated, as well as a semiconductor device.
    Type: Application
    Filed: February 11, 2011
    Publication date: August 11, 2011
    Inventors: Takashi MASUKO, Keisuke Ookubo, Keiichi Hatakeyama, Masami Yusa