Patents by Inventor Keiji Sato

Keiji Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120129287
    Abstract: According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide, concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
    Type: Application
    Filed: January 30, 2012
    Publication date: May 24, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Toru Takayama, Naoya Sakamoto, Kengo Akimoto, Keiji Sato, Tetsunori Maruyama
  • Publication number: 20120073281
    Abstract: A drive apparatus for a vehicle includes an engine output system that outputs power from an engine and a power transmission system that transmits the power from the engine output system to a driving wheel. A power transmission path including a chain mechanism and a one-way clutch is provided between an oil pump and a turbine shaft that is part of the engine output system. Another power transmission path including a corresponding chain mechanism and a corresponding one-way clutch is provided between the oil pump and a primary shaft that is part of the power transmission system.
    Type: Application
    Filed: September 21, 2011
    Publication date: March 29, 2012
    Applicant: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Takashi Hirose, Keiji Sato, Keiichi Maruyama, Shogo Oki, Satoshi Inoue
  • Patent number: 8129900
    Abstract: According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: March 6, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Naoya Sakamoto, Kengo Akimoto, Keiji Sato, Tetsunori Maruyama
  • Publication number: 20120044025
    Abstract: An electronic device is provided which includes a base, a through-electrode that passes through the base and from which an insulating material on an end face thereof is removed by polishing, a circuit pattern that is formed on an end face of the through-electrode, an electronic component that is disposed via an internal wiring formed on the circuit pattern, an electrode pattern that is formed on the surface of the base opposite to the surface on which the electronic component is disposed and that is connected to the other end face of the through-electrode, an external electrode that is formed on the electrode pattern, and a cap that is bonded to the base so as to protect the electronic component on the base.
    Type: Application
    Filed: May 25, 2011
    Publication date: February 23, 2012
    Inventors: Takahiko Nakamura, Keiji Sato, Hitoshi Takeuchi, Kiyoshi Aratake, Masashi Numata
  • Patent number: 8097360
    Abstract: A method for producing an electrolyte solution for a lithium ion battery involving reacting a lithium halide selected from the group consisting of lithium fluoride, lithium chloride, lithium bromide, lithium iodide and a mixture of at least two of these, with phosphorus pentachloride and hydrogen fluoride in a nonaqueous organic solvent, thereby producing lithium hexafluorophosphate as an electrolyte of the electrolyte solution.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: January 17, 2012
    Assignee: Central Glass Company, Limited
    Inventors: Meguru Oe, Keiji Sato, Hiroaki Sakaguchi
  • Publication number: 20110238372
    Abstract: The operational state analysis system may analyze an operational state of a plant based on processed data items related to the plant. The operational state analysis system may include a reception unit that receives a selection of the processed data items, the selection being performed by user of the operational state analysis system, a property value acquisition unit that acquires a plurality of property values, each of the plurality of property values being one of values of the processed data items and statistical values based on the processed data items of which the selection is received by the reception unit, and a waveform display unit that displays the plurality of property values acquired by the property value acquisition unit as waveforms that analyzes the operational state.
    Type: Application
    Filed: March 28, 2011
    Publication date: September 29, 2011
    Applicant: YOKOGAWA ELECTRIC CORPORATION
    Inventors: Shinya AKIMOTO, Mitsutoshi SUSUMAGO, Keiji SATO
  • Publication number: 20110223699
    Abstract: A semiconductor device having good TFT characteristics is realized. By using a high purity target as a target, using a single gas, argon (Ar), as a sputtering gas, setting the substrate temperature equal to or less than 300° C., and setting the sputtering gas pressure from 1.0 Pa to 3.0 Pa, the film stress of a film is made from ?1×1010 dyn/cm2 to 1×1010 dyn/cm2. By thus using a conducting film in which the amount of sodium contained within the film is equal to or less than 0.3 ppm, preferably equal to or less than 0.1 ppm, and having a low electrical resistivity (equal to or less than 40 ??·cm), as a gate wiring material and a material for other wirings of a TFT, the operating performance and the reliability of a semiconductor device provided with the TFT can be increased.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 15, 2011
    Inventors: Toru Takayama, Keiji Sato, Shunpei Yamazaki
  • Publication number: 20110114944
    Abstract: One object is to provide a deposition technique for forming an oxide semiconductor film. By forming an oxide semiconductor film using a sputtering target including a sintered body of a metal oxide whose concentration of hydrogen contained is low, for example, lower than 1×1016 atoms/cm3, the oxide semiconductor film contains a small amount of impurities such as a compound containing hydrogen typified by H2O or a hydrogen atom. In addition, this oxide semiconductor film is used as an active layer of a transistor.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 19, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Toru Takayama, Keiji Sato
  • Publication number: 20110114480
    Abstract: It is an object to provide a method for packaging a target material with which a thin film that is less contaminated with an impurity in the air such as a compound containing a hydrogen atom can be formed. In addition, it is an object to provide a method for mounting a target with which a thin film that is less contaminated with an impurity can be formed. In order to achieve the objects, a target material in a target is not exposed to the air and kept sealed after being manufactured until a deposition apparatus on which the target is mounted is evacuated.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 19, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Toru Takayama, Keiji Sato
  • Publication number: 20110114999
    Abstract: To provide a deposition technique for forming an oxide semiconductor film. An oxide semiconductor film is formed using a sputtering target which contains a sintered body of metal oxide and in which the concentration of hydrogen contained in the sintered body of metal oxide is, for example, as low as 1×1016 atoms/cm3 or lower, so that the oxide semiconductor film contains a small amount of impurities such as a hydrogen atom and a compound containing a hydrogen atom typified by H2O. Further, this oxide semiconductor film is used as an active layer of a transistor.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 19, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Toru TAKAYAMA, Keiji SATO
  • Patent number: 7923904
    Abstract: An electronic component capable of withstanding stress from a printed circuit board or the like is provided. In an electronic component, a cavity hermetically sealed by a base and a lid is formed. In the cavity, a crystal resonator is supported by a supporting member over the top surface of the base. The base is made of glass. A stress buffer layer made of a conductive resin or the like is formed over the whole bottom surface of the base. An external electrode and an external electrode that are in continuity with the electrodes of the crystal resonator individually extend to the bottom surface of the stress buffer layer via the side surfaces of the base and stress buffer layer. The thus configured electronic component is surface-mounted by, for example, soldering the external electrode and external electrode formed on the bottom surface of the stress buffer layer to a printed circuit board.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: April 12, 2011
    Assignee: Seiko Instruments Inc.
    Inventors: Hitoshi Takeuchi, Keiji Sato, Kiyoshi Aratake, Masashi Numata
  • Patent number: 7906429
    Abstract: A semiconductor device having good TFT characteristics is realized. By using a high purity target as a target, using a single gas, argon (Ar), as a sputtering gas, setting the substrate temperature equal to or less than 300° C., and setting the sputtering gas pressure from 1.0 Pa to 3.0 Pa, the film stress of a film is made from ?1×1010 dyn/cm2 to 1×1010 dyn/cm2. By thus using a conducting film in which the amount of sodium contained within the film is equal to or less than 0.3 ppm, preferably equal to or less than 0.1 ppm, and having a low electrical resistivity (equal to or less than 40 ??·cm), as a gate wiring material and a material for other wirings of a TFT, the operating performance and the reliability of a semiconductor device provided with the TFT can be increased.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: March 15, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Keiji Sato, Shunpei Yamazaki
  • Publication number: 20100326721
    Abstract: In a structure where an electronic component is mounted on a glass base material, an external electrode is provided on an opposite side to the component mounted on the base, and a through electrode and the base are welded to each other at a temperature equal to or higher than a glass softening point, electrical conduction is ensured between the electronic component and the external electrode. An electronic device includes a base, a through electrode which pass through the base and has a metal film formed on both end surfaces after an insulating material on the surface is removed by polishing, an electronic component which is provided on one surface of the through electrode through a connection portion, an external electrode which is provided on an opposite side to a side of the base on which the electronic component is provided, and a cap which protects the electronic component on the base.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 30, 2010
    Inventors: Takahiko NAKAMURA, Keiji Sato, Hitoshi Takeuchi, Daisuke Terada, Kiyoshi Aratake, Masashi Numata
  • Publication number: 20100295421
    Abstract: An electronic component capable of withstanding stress from a printed-circuit board or the like is provided. In an electronic component, a cavity hermetically sealed by a base and a lid is formed. In the cavity, a crystal resonator is supported by a supporting member over the top surface of the base. The base is made of glass. A stress buffer layer made of a conductive resin or the like is formed over the whole bottom surface of the base. An external electrode and an external electrode that are in continuity with the electrodes of the crystal resonator individually extend to the bottom surface of the stress buffer layer via the side surfaces of the base and stress buffer layer. The thus configured electronic component is surface-mounted by, for example, soldering the external electrode and external electrode formed on the bottom surface of the stress buffer layer to a printed-circuit board.
    Type: Application
    Filed: August 6, 2010
    Publication date: November 25, 2010
    Inventors: Hitoshi TAKEUCHI, Keiji SATO, Kiyoshi ARATAKE, Masashi NUMATA
  • Publication number: 20100290201
    Abstract: To provide an improved solderability for mounting an electronic component onto a circuit board, a package of an electronic component (1) is formed by bonding together a base (3) made of glass and a lid (2). Outer electrodes (8) and (18) are formed on a bottom surface of the base (3), and the outer electrodes (8) and (18) are respectively connected to through electrodes (7) and (17). The outer electrodes (8) and (18) each have a laminated structure of three CrAu layers, that is, from a Cr layer (first layer) to an Au layer (sixth layer). When the outer electrodes (8) and (18) are soldered onto a circuit board, the Au layers as the second, fourth, and sixth layers are dissolved into solder, whereas the Cr layers as the third and fifth layers, which hardly form an intermetallic compound with solder, are separated to remain in solder.
    Type: Application
    Filed: April 13, 2010
    Publication date: November 18, 2010
    Inventors: Hitoshi Takeuchi, Keiji Sato, Kiyoshi Aratake, Masashi Numata, Takahiko Nakamura, Daisuke Terada, Takeshi Sugiyama
  • Patent number: 7816191
    Abstract: By using a high purity target as a target, using a single gas, argon (Ar), as a sputtering gas, setting the substrate temperature at 300° C. or less, setting the sputtering power from 1 kW to 9 kW, and setting the sputtering gas pressure from 1.0 Pa to 3.0 Pa, the film stress of a film is made from ?1 ×1010cm2 to 1×1010 dyn/cm2. By thus using a conducting film in which the amount of sodium contained within the film is equal to or less than 0.3 ppm, preferably equal to or less than 0.1 ppm, and having a low electrical resistivity (equal to or less than 40 ??•cm), as a gate wiring material and a material for other wirings of a TFT, the operating performance and the reliability of a semiconductor device provided with the TFT can be increased.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: October 19, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Keiji Sato, Shunpei Yamazaki
  • Patent number: 7802138
    Abstract: The present invention provides a control method for an information processing system, which includes a plurality of processing apparatuses performing a mutually equivalent operation, comprising the step of isolating the processing apparatus for which a fluctuation of power source voltage is relatively large, from the information processing system, if an error is not detected in each of the processing apparatuses and respective items of output information from the plurality of processing apparatuses raise a nonidentity.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: September 21, 2010
    Assignee: Fujitsu Limited
    Inventor: Keiji Sato
  • Patent number: 7770403
    Abstract: An air conditioning system is arranged to use a power line for communication. The air conditioning system includes one or more indoor units, one or more outdoor units, and a system controller for controlling the indoor units or outdoor units and executes communications between the indoor units and the outdoor units as overlapping a signal on the power line for supplying electric power. The outdoor units are connected with the system controller through a leased communication line. The indoor unit provides a power line communication device being connected with the power line. The outdoor unit provides a leased communication device being connected with the leased communication line. A bridge is also provided for connecting the leased communication line and the power line. The control information is exchanged mutually between the indoor units, the outdoor units and the system controller through the power line.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: August 10, 2010
    Assignee: Hitachi Appliances, Inc.
    Inventors: Yasuyuki Kojima, Noboru Akiyama, Takeshi Onaka, Tatsumi Yamauchi, Koichi Taniguchi, Koichi Tokushige, Noriyuki Bunkou, Keiji Sato
  • Publication number: 20100077787
    Abstract: An heat pump drying machine has a normal dry mode (e.g., compression ratio is equal to or greater than 3) for operating a compressor at a predetermined dry operation frequency and an energy saving dry mode (e.g., compression ratio is equal to or greater than 2.3 and is less than 3) for operating the compressor at an energy saving operation frequency that is lower than the dry operation frequency. A control device is provided to control an operation frequency of the compressor 5 so that the two dry operation modes are switched to each other. The control device can execute the control for increasing the operation frequency of the compressor to the dry operation frequency during the operation of the energy saving dry mode.
    Type: Application
    Filed: September 29, 2009
    Publication date: April 1, 2010
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Tetsuya Masuda, Hiroyuki Kuribara, Satoshi Imai, Toshikazu Ishihara, Keiji Sato, Haruhisa Yamasaki, Eiji Fukuda, Yoshiaki Noguchi
  • Patent number: 7688391
    Abstract: A control system includes a remote control apparatus and a controlled apparatus controlled by the remote control apparatus. The controlled apparatus is connected to first and second external apparatuses. The controlled apparatus includes a receiving unit and a control unit. The receiving unit receives a remote control signal from the remote control apparatus. The control unit (a) selects one of the first and second external apparatuses according to the remote control signal, (b) checks an operating state of the selected external apparatus before the controlled apparatus transmits a control command corresponding to the remote control signal to the selected external apparatus, and (c) controls the controlled apparatus to transmit the control command to the selected external apparatus if it is determined from the checked operating state that the control command can be transmitted to the selected external apparatus.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: March 30, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Keiji Sato