Patents by Inventor Keiji Takaoka
Keiji Takaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7589282Abstract: A wiring board includes a core composite layer having first and second core boards and an optical transmission portion; first electrodes disposed on one part of the core composite layer, being adapted to mount an optical semiconductor module on the core composite layer; upper and lower core board wirings disposed on another part of and beneath the core composite layer; and upper and lower build-up wirings stacked on the upper and lower core board wirings, being adapted to mount semiconductor modules.Type: GrantFiled: July 27, 2004Date of Patent: September 15, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Yamada, Keiji Takaoka, Hideto Furuyama
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Patent number: 7463491Abstract: A wiring board includes a core composite layer having first and second core boards and an optical transmission portion; first electrodes disposed on one part of the core composite layer, being adapted to mount an optical semiconductor module on the core composite layer; upper and lower core board wirings disposed on another part of and beneath the core composite layer; and upper and lower build-up wirings stacked on the upper and lower core board wirings, being adapted to mount semiconductor modules.Type: GrantFiled: February 16, 2007Date of Patent: December 9, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Yamada, Keiji Takaoka, Hideto Furuyama
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Patent number: 7427804Abstract: A optoelectronic semiconductor device, mountable on and electrically connectable to an electro-optical wiring board, a substrate thereof having a light input/output through-hole and electric connection through-holes, the light input/output through-hole being not formed in a stressed area of the circuit wiring board, but formed in a non-stressed area of the circuit wiring board, the stressed area being an area where a stress is larger in value than the mean value of stresses caused in the circuit wiring board by a difference in coefficient of thermal expansion between the circuit wiring board and the electro-optical wiring board when the electrode on the semiconductor optoelectronic device is mechanically fixed to and electrically connected to the electro-optical wiring board.Type: GrantFiled: May 18, 2007Date of Patent: September 23, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Yamada, Keiji Takaoka
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Patent number: 7276735Abstract: A low-cost high-property optical semiconductor element for a long wavelength is provided, using a GaAs substrate. The optical semiconductor element comprises a substrate of GaAs having a first surface and a second surface opposite to each other, a buffer layer of InjGa1-jAs1-kNk (0?j?1, 0.002?k?0.05) formed on the first surface of the substrate, a first conductive type clad layer formed on the buffer layer, an active layer formed on the first conductive type clad layer and comprising a well layer of InzGa1-zAs (0?z?1), the well layer having a smaller bandgap than the first conductive type clad layer, the active layer having a thickness of more than its critical thickness for the substrate based upon equilibrium theories, and a second conductive type clad layer formed on the active layer and having a larger bandgap than the well layer.Type: GrantFiled: July 2, 2004Date of Patent: October 2, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuhiro Kushibe, Yasuo Ohba, Rei Hashimoto, Keiji Takaoka
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Publication number: 20070221931Abstract: A optoelectronic semiconductor device, mountable on and electrically connectable to an electro-optical wiring board, a substrate thereof having a light input/output through-hole and electric connection through-holes, the light input/output through-hole being not formed in a stressed area of the circuit wiring board, but formed in a non-stressed area of the circuit wiring board, the stressed area being an area where a stress is larger in value than the mean value of stresses caused in the circuit wiring board by a difference in coefficient of thermal expansion between the circuit wiring board and the electro-optical wiring board when the electrode on the semiconductor optoelectronic device is mechanically fixed to and electrically connected to the electro-optical wiring board.Type: ApplicationFiled: May 18, 2007Publication date: September 27, 2007Applicant: Kabushiki Kaisha ToshibaInventors: Hiroshi Yamada, Keiji Takaoka
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Patent number: 7244629Abstract: In a vertical cavity surface emitting laser diode manufactured on a non-off-angle substrate with a (100)-oriented plane or the like, anisotropic stress is applied to a central portion of an active layer by forming a asymmetrical oxidation structure in an Al high concentration portion in the mesa, so that polarization controllability of a device can be improved.Type: GrantFiled: November 2, 2004Date of Patent: July 17, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Mizunori Ezaki, Michihiko Nishigaki, Keiji Takaoka
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Publication number: 20070151752Abstract: A wiring board includes a core composite layer having first and second core boards and an optical transmission portion; first electrodes disposed on one part of the core composite layer, being adapted to mount an optical semiconductor module on the core composite layer; upper and lower core board wirings disposed on another part of and beneath the core composite layer; and upper and lower build-up wirings stacked on the upper and lower core board wirings, being adapted to mount semiconductor modules.Type: ApplicationFiled: February 16, 2007Publication date: July 5, 2007Applicant: Kabushiki Kaisha ToshibaInventors: Hiroshi Yamada, Keiji Takaoka, Hideto Furuyama
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Patent number: 7230278Abstract: A optoelectronic semiconductor device, mountable on and electrically connectable to an electro-optical wiring board, a substrate thereof having a light input/output through-hole and electric connection through-holes, the light input/output through-hole being not formed in a stressed area of the circuit wiring board, but formed in a non-stressed area of the circuit wiring board, the stressed area being an area where a stress is larger in value than the mean value of stresses caused in the circuit wiring board by a difference in coefficient of thermal expansion between the circuit wiring board and the electro-optical wiring board when the electrode on the semiconductor optoelectronic device is mechanically fixed to and electrically connected to the electro-optical wiring board.Type: GrantFiled: August 31, 2004Date of Patent: June 12, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Yamada, Keiji Takaoka
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Publication number: 20060187997Abstract: It is made possible to obtain high performance having high controllability in polarization mode even when a vertical cavity surface emitting laser diode is fabricated on an ordinary substrate with a plane orientation (100) plane or the like. A vertical cavity surface emitting laser diode includes: a substrate; a semiconductor active layer which is formed on the substrate and has a light emitting region; a first reflecting mirror and a second reflecting mirror sandwiching the semiconductor active layer; a first recess which has a first groove depth penetrating at least the semiconductor active layer from the outermost layer of the first reflecting mirror; a second recess having a second groove depth shallower than the first groove depth; a mesa portion which is surrounded by the first and second recesses; and an insulating film which is buried in the first recess.Type: ApplicationFiled: January 13, 2006Publication date: August 24, 2006Applicant: Kabushiki Kaisha ToshibaInventors: Mizunori Ezaki, Mitsuhiro Kushibe, Michihiko Nishigaki, Keiji Takaoka
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Patent number: 7068696Abstract: A vertical-cavity surface emitting laser diode comprises: a first and a second reflectors; an active layer provided between the first and the second reflectors; and an oxidizee layer having a non-oxidized part and an oxidized part provided around the non-oxidized part. An electric current is injected into the non-oxidized part. The oxidizee layer has a proton-containing part including proton at least at a position substantially enclosing the non-oxidized part.Type: GrantFiled: November 25, 2003Date of Patent: June 27, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Mizunori Ezaki, Michihiko Nishigaki, Keiji Takaoka
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Publication number: 20050121678Abstract: In a vertical cavity surface emitting laser diode manufactured on a non-off-angle substrate with a (100)-oriented plane or the like, anisotropic stress is applied to a central portion of an active layer by forming a asymmetrical oxidation structure in an Al high concentration portion in the mesa, so that polarization controllability of a device can be improved.Type: ApplicationFiled: November 2, 2004Publication date: June 9, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Mizunori Ezaki, Michihiko Nishigaki, Keiji Takaoka
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Publication number: 20050087747Abstract: A optoelectronic semiconductor device, mountable on and electrically connectable to an electro-optical wiring board, a substrate thereof having a light input/output through-hole and electric connection through-holes, the light input/output through-hole being not formed in a stressed area of the circuit wiring board, but formed in a non-stressed area of the circuit wiring board, the stressed area being an area where a stress is larger in value than the mean value of stresses caused in the circuit wiring board by a difference in coefficient of thermal expansion between the circuit wiring board and the electro-optical wiring board when the electrode on the semiconductor optoelectronic device is mechanically fixed to and electrically connected to the electro-optical wiring board.Type: ApplicationFiled: August 31, 2004Publication date: April 28, 2005Inventors: Hiroshi Yamada, Keiji Takaoka
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Patent number: 6881984Abstract: A resonant-cavity light-emitting diode includes a semiconductor light-emitting layer sandwiched between an under and an upper semiconductor distributed Bragg reflector mirror layer, which are formed on the substrate, a light extracting section formed on the upper semiconductor distributed Bragg reflector mirror layer and having an opening to extract light from the semiconductor light-emitting layer, and a groove formed by removing portions of the semiconductor light-emitting layer, under and upper semiconductor distributed Bragg reflector mirror layers which lie in a peripheral portion of the opening of the light extraction section and reach the under semiconductor distributed Bragg reflector mirror layer, the inner wall of the groove being formed to reflect part of light emitted from the semiconductor light-emitting layer into the groove.Type: GrantFiled: September 12, 2003Date of Patent: April 19, 2005Assignee: Kabushiki Kaisha ToshibaInventor: Keiji Takaoka
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Publication number: 20050063635Abstract: A wiring board includes a core composite layer having first and second core boards and an optical transmission portion; first electrodes disposed on one part of the core composite layer, being adapted to mount an optical semiconductor module on the core composite layer; upper and lower core board wirings disposed on another part of and beneath the core composite layer; and upper and lower build-up wirings stacked on the upper and lower core board wirings, being adapted to mount semiconductor modules.Type: ApplicationFiled: July 27, 2004Publication date: March 24, 2005Inventors: Hiroshi Yamada, Keiji Takaoka, Hideto Furuyama
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Publication number: 20040245536Abstract: A low-cost high-property optical semiconductor element for a long wavelength is provided, using a GaAs substrate. The optical semiconductor element comprises a substrate of GaAs having a first surface and a second surface opposite to each other, a buffer layer of InjGa1-jAs1-kNk (0≦j≦1, 0.002≦k≦0.05) formed on the first surface of the substrate, a first conductive type clad layer formed on the buffer layer, an active layer formed on the first conductive type clad layer and comprising a well layer of InzGa1-zAs (0≦z≦1), the well layer having a smaller bandgap than the first conductive type clad layer, the active layer having a thickness of more than its critical thickness for the substrate based upon equilibrium theories, and a second conductive type clad layer formed on the active layer and having a larger bandgap than the well layer.Type: ApplicationFiled: July 2, 2004Publication date: December 9, 2004Applicant: Kabushiki Kaisha ToshibaInventors: Mitsuhiro Kushibe, Yasuo Ohba, Rei Hashimoto, Keiji Takaoka
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Publication number: 20040165636Abstract: A vertical-cavity surface emitting laser diode comprises: a first and a second reflectors; an active layer provided between the first and the second reflectors; and an oxidizee layer having a non-oxidized part and an oxidized part provided around the non-oxidized part. An electric current is injected into the non-oxidized part. The oxidizee layer has a proton-containing part including proton at least at a position substantially enclosing the non-oxidized part.Type: ApplicationFiled: November 25, 2003Publication date: August 26, 2004Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Mizunori Ezaki, Michihiko Nishigaki, Keiji Takaoka
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Patent number: 6768137Abstract: A low-cost high-property optical semiconductor element for a long wavelength is provided, using a GaAs substrate. The optical semiconductor element comprises a substrate of GaAs having a first surface and a second surface opposite to each other, a buffer layer of InjGa1-jAs1-kNk (0≦j≦1, 0.002≦k≦0.05) formed on the first surface of the substrate, a first conductive type clad layer formed on the buffer layer, an active layer formed on the first conductive type clad layer and comprising a well layer of InzGa1-zAs (0≦z≦1), the well layer having a smaller bandgap than the first conductive type clad layer, the active layer having a thickness of more than its critical thickness for the substrate based upon equilibrium theories, and a second conductive type clad layer formed on the active layer and having a larger bandgap than the well layer.Type: GrantFiled: March 28, 2003Date of Patent: July 27, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Mitsuhiro Kushibe, Yasuo Ohba, Rei Hashimoto, Keiji Takaoka
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Publication number: 20040046180Abstract: A resonant-cavity light-emitting diode includes a semiconductor light-emitting layer sandwiched between an under and an upper semiconductor distributed Bragg reflector mirror layer, which are formed on the substrate, a light extracting section formed on the upper semiconductor distributed Bragg reflector mirror layer and having an opening to extract light from the semiconductor light-emitting layer, and a groove formed by removing portions of the semiconductor light-emitting layer, under and upper semiconductor distributed Bragg reflector mirror layers which lie in a peripheral portion of the opening of the light extraction section and reach the under semiconductor distributed Bragg reflector mirror layer, the inner wall of the groove being formed to reflect part of light emitted from the semiconductor light-emitting layer into the groove.Type: ApplicationFiled: September 12, 2003Publication date: March 11, 2004Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Keiji Takaoka
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Patent number: 6678307Abstract: A semiconductor surface light-emitting device comprises, in a multi-layered structure formed on a substrate, a light-emitting part surrounded by a groove or grooves, provided with an active layer, a vertical cavity and a current aperture, a peripheral part external to the grooves, and a connecting portion connecting the light-emitting part with the peripheral part. There is provided an empty space or a high-resistance region on the upper part of this multi-layered connecting portion, which includes at least the current aperture formed layer or the active layer. This configuration effectively eliminates a path for a leakage current flowing into the peripheral part from the light-emitting part.Type: GrantFiled: September 26, 2002Date of Patent: January 13, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Mizunori Ezaki, Keiji Takaoka
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Patent number: 6661031Abstract: A resonant-cavity light-emitting diode includes a semiconductor light-emitting layer sandwiched between an under and an upper semiconductor distributed Bragg reflector mirror layer, which are formed on the substrate, a light extracting section formed on the upper semiconductor distributed Bragg reflector mirror layer and having an opening to extract light from the semiconductor light-emitting layer, and a groove formed by removing portions of the semiconductor light-emitting layer, under and upper semiconductor distributed Bragg reflector mirror layers which lie in a peripheral portion of the opening of the light extraction section and reach the under semiconductor distributed Bragg reflector mirror layer, the inner wall of the groove being formed to reflect part of light emitted from the semiconductor light-emitting layer into the groove.Type: GrantFiled: March 8, 2002Date of Patent: December 9, 2003Assignee: Kabushiki Kaisha ToshibaInventor: Keiji Takaoka