Abstract: According to an embodiment, a semiconductor memory device includes a substrate, at least one stacked body, and a first insulating film. The stacked body includes a first end portion positioned at an end in at least one of a first direction and a second direction that crosses the first direction along a surface of the substrate, the plurality of electrode layers being formed into stairs in the first end portion, each of the plurality of electrode layers having a step in the first end portion. The first insulating film is provided on the substrate and includes first and second surfaces, the first and second surfaces surrounding the first end portion, the first surface being crossing a direction that the steps are formed, the second surface being positioned along the direction that the steps are formed.

Abstract: A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.

Abstract: A semiconductor memory device according to one embodiment, includes a first electrode film, a plurality of semiconductor members, and a charge storage member. The first electrode film includes three or more first portions and a second portion connecting the first portions to each other. The first portions extend in a first direction and are arranged along a second direction that intersects with the first direction. The plurality of semiconductor members are arranged along the first direction between the first portions and extending in a third direction. The third direction intersects with a plane containing the first direction and the second direction. The charge storage member is disposed between each of the semiconductor members and each of the first portions. The second portion is disposed between the semiconductor members.

Abstract: A semiconductor memory device includes a semiconductor substrate, a first insulating film provided on the semiconductor substrate, a first conductive film provided on a first region of the first insulating film, a second conductive film provided on a second region of the first insulating film, a first stacked body provided on the first conductive film, a second stacked body provided on the second conductive film, a first semiconductor pillar, and two conductive pillars. In the first stacked body, a second insulating film and an electrode film are stacked alternately. In the second stacked body, a third insulating film and a first film are stacked alternately. The two conductive pillars extend in the first direction through the second stacked body, are separated from the second conductive film, sandwich the second conductive film, and are connected at a bottom ends of the second conductive pillars to the semiconductor substrate.

Abstract: According to an embodiment, a semiconductor memory device includes a substrate, at least one stacked body, and a first insulating film. The stacked body includes a first end portion positioned at an end in at least one of a first direction and a second direction that crosses the first direction along a surface of the substrate, the plurality of electrode layers being formed into stairs in the first end portion, each of the plurality of electrode layers having a step in the first end portion. The first insulating film is provided on the substrate and includes first and second surfaces, the first and second surfaces surrounding the first end portion, the first surface being crossing a direction that the steps are formed, the second surface being positioned along the direction that the steps are formed.

Abstract: A semiconductor memory device according to one embodiment, includes a plurality of first interconnects extending in a first direction and arrayed along a second direction crossing the first direction, a plurality of semiconductor pillars arrayed in a row along the first direction in each of spaces among the first interconnects and extending in a third direction crossing the first direction and the second direction, a first electrode disposed between one of the semiconductor pillars and one of the first interconnects, a first insulating film disposed between the first electrode and one of the first interconnects, a first insulating member disposed between the semiconductor pillars in the first direction and extending in the third direction and opposed the first interconnects not via the first insulating film.

Abstract: According to one embodiment, a semiconductor memory device includes a semiconductor pillar extending in a first direction in a first region. The semiconductor memory device also includes a first electrode film provided on a side of the semiconductor pillar and extending in a second direction different from the first direction in the first region and in a second region adjacent to the first region in the second direction. The semiconductor memory device also includes a second electrode film provided between the semiconductor pillar and the first electrode film in the first region. Film thickness in the first direction of the first electrode film in the first region is smaller than film thickness in the first direction of the first electrode film in the second region.

Abstract: In one embodiment, a substrate processing apparatus, includes: a chamber; a first electrode disposed in the chamber; a second electrode disposed in the chamber to face the first electrode, and to hold a substrate; an RF power supply to apply an RF voltage with a frequency of 50 MHz or more to the second electrode; and a pulse power supply to repeatedly apply a voltage waveform including a negative voltage pulse and a positive voltage pulse of which delay time from the negative voltage pulse is 50 nano-seconds or less to the second electrode while superposing on the RF voltage.

Abstract: A semiconductor memory device according to one embodiment, includes a plurality of first interconnects extending in a first direction and arrayed along a second direction crossing the first direction, a plurality of semiconductor pillars arrayed in a row along the first direction in each of spaces among the first interconnects and extending in a third direction crossing the first direction and the second direction, a first electrode disposed between one of the semiconductor pillars and one of the first interconnects, a first insulating film disposed between the first electrode and one of the first interconnects, a first insulating member disposed between the semiconductor pillars in the first direction and extending in the third direction and opposed the first interconnects not via the first insulating film.

Abstract: According to one embodiment, a semiconductor memory device includes a semiconductor pillar extending in a first direction in a first region. The semiconductor memory device also includes a first electrode film provided on a side of the semiconductor pillar and extending in a second direction different from the first direction in the first region and in a second region adjacent to the first region in the second direction. The semiconductor memory device also includes a second electrode film provided between the semiconductor pillar and the first electrode film in the first region. Film thickness in the first direction of the first electrode film in the first region is smaller than film thickness in the first direction of the first electrode film in the second region.

Abstract: According to one embodiment, a semiconductor memory device includes a first array extending in a first direction, a second array extending in the first direction, and a second electrode film. The second array is arranged with the first array in a second direction crossing the first direction. The second electrode film provided between the first array and the second array. The second electrode film extends in the first direction. Each of the first array and the second array include a first structure, a second structure arranged in the first direction, a fourth insulating film provided between the first structure and the second structure, and a third insulating film provided between the first structure and the second electrode film, provided also between the first structure and the fourth insulating film.

Abstract: A semiconductor device manufacturing method includes performing reactive ion etching of the film containing a metal disposed on the bottom of the first groove and the film containing a metal disposed on the bottom of the second groove under a same condition in a state where the substrate is heated to the target temperature.

Abstract: A semiconductor device manufacturing method includes performing reactive ion etching of the film containing a metal disposed on the bottom of the first groove and the film containing a metal disposed on the bottom of the second groove under a same condition in a state where the substrate is heated to the target temperature.

Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes manufacturing a mask pattern and forming an interconnection using the mask pattern. The manufacturing the mask pattern includes forming a first pattern of a first material, depositing a second material over the first pattern, forming a first sidewall film on sidewalls of the first pattern by a first etchback, depositing a third material over the first sidewall film, forming a second sidewall film on sidewalls of the first sidewall film by a second etchback, adjusting the first pattern and second sidewall film so as to have the same height, and selectively removing the first sidewall film. The first pattern has a line width of a first width equal to the thicknesses of the first and second sidewall films. The mask pattern includes a line-and-space having a line width and a space equal to the first width, respectively.

Abstract: According to one embodiment, a method of manufacturing a device, includes forming a first core including a line portion extending between first and second regions and having a first width and a fringe having a dimension larger than the first width, forming a mask on the fringe and on a first sidewall on the first core, removing the first core so that a remaining portion having a dimension larger than the first width is formed below the mask, forming a second sidewall on a pattern corresponding the first sidewall and the remaining portion, the second sidewall having a second width less than the first width and facing a first interval less than the first width in the first region and facing a second interval larger than the first interval in the second region.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device, includes forming first layer on first and second regions in substrate, first layer having first width in first region and having larger dimension than first width in second region, forming first sidewall on first layer, forming second layer covering first sidewall in the second region and forming third layer having second width smaller than first width on the side face of first sidewall having second width after removing first layer, forming second and third sidewalls having second width so that second and third sidewalls is adjacent to first sidewall across third layer by second width in first region and across second and third layers by second interval larger than second width in the second region.

Abstract: According to one embodiment, a method of manufacturing a device, includes forming a first core including a line portion extending between first and second regions and having a first width and a fringe having a dimension larger than the first width, forming a mask on the fringe and on a first sidewall on the first core, removing the first core so that a remaining portion having a dimension larger than the first width is formed below the mask, forming a second sidewall on a pattern corresponding the first sidewall and the remaining portion, the second sidewall having a second width less than the first width and facing a first interval less than the first width in the first region and facing a second interval larger than the first interval in the second region.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device, includes forming first layer on first and second regions in substrate, first layer having first width in first region and having larger dimension than first width in second region, forming first sidewall on first layer, forming second layer covering first sidewall in the second region and forming third layer having second width smaller than first width on the side face of first sidewall having second width after removing first layer, forming second and third sidewalls having second width so that second and third sidewalls is adjacent to first sidewall across third layer by second width in first region and across second and third layers by second interval larger than second width in the second region.

Abstract: A method of manufacturing a semiconductor device according to one embodiment, includes: forming a first mask material film on a workpiece film formed on a semiconductor substrate; forming a resist pattern on the first mask material film; forming a second mask material film having a desired film thickness on the first mask material film so as to cover the resist pattern; carrying out etchback of the second mask material film so as to expose the resist pattern and the first mask material film; processing the resist pattern and the first mask material film simultaneously which are exposed, while leaving the second mask material film of which etchback is carried out; and processing the workpiece film which exposes under the first mask material film.

Abstract: In one embodiment, a substrate processing apparatus, includes: a chamber; a first electrode disposed in the chamber; a second electrode disposed in the chamber to face the first electrode, and to hold a substrate; an RF power supply to apply an RF voltage with a frequency of 50 MHz or more to the second electrode; and a pulse power supply to repeatedly apply a voltage waveform including a negative voltage pulse and a positive voltage pulse of which delay time from the negative voltage pulse is 50 nano-seconds or less to the second electrode while superposing on the RF voltage.