Patents by Inventor Keitaro ICHIKAWA
Keitaro ICHIKAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230335480Abstract: Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.Type: ApplicationFiled: June 21, 2023Publication date: October 19, 2023Applicant: Mitsubishi Electric CorporationInventors: Keitaro ICHIKAWA, Taketoshi SHIKANO, Yuji SHIKASHO, Fumihito KAWAHARA
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Patent number: 11735509Abstract: Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.Type: GrantFiled: January 9, 2020Date of Patent: August 22, 2023Assignee: Mitsubishi Electric CorporationInventors: Keitaro Ichikawa, Taketoshi Shikano, Yuji Shikasho, Fumihito Kawahara
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Publication number: 20230238311Abstract: A semiconductor device includes a sealing resin being an insulating resin sealing the semiconductor element therein, and a plurality of electrode terminals each including a root portion being a root protruding from the sealing resin, a tip portion being a tip and portion extending from the root portion, and a middle portion provided between the tip portion and the root portion, and the middle portion includes first middle portions having a width wider than those of the root portion and the tip portion in the first direction, and a second middle portion having a width wider than those of the root portion and the tip portion in the first direction, a width narrower than those of the first middle portions in the first direction, and a bent portion bent toward in a third direction orthogonal to the first direction and the second direction.Type: ApplicationFiled: November 23, 2022Publication date: July 27, 2023Applicant: Mitsubishi Electric CorporationInventors: Keitaro ICHIKAWA, Yuji SHIKASHO, Takuya SAKAMOTO
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Patent number: 11652032Abstract: Inner leads having die pads having upper surfaces to which semiconductor elements are mounted each have a stepped profile, and surfaces of portions of the inner leads are exposed from a sealing resin in plan view. Outer leads connected to the inner leads have first bends at side surfaces of the sealing resin to extend in a direction on a side of the upper surfaces of the die pads, so that a miniaturized semiconductor device can be obtained.Type: GrantFiled: May 25, 2021Date of Patent: May 16, 2023Assignee: Mitsubishi Electric CorporationInventor: Keitaro Ichikawa
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Patent number: 11335629Abstract: A transfer-mold type power module includes a plurality of electrode terminals that is arranged so as to protrude in the same direction from a target side surface of a package. A tie bar cutting residue protruding from a first side surface of each of the electrode terminals and a tie bar cutting residue protruding from a second side surface of each of the electrode terminals are different in position in a length direction of each of the electrode terminals. Each of the electrode terminals has a shape bent at a position including tie bar cutting residue closer to the package, with a width direction of each of the electrode terminals as an axis.Type: GrantFiled: November 17, 2020Date of Patent: May 17, 2022Assignee: Mitsubishi Electric CorporationInventors: Fumihito Kawahara, Keitaro Ichikawa, Yuji Shikasho
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Publication number: 20220108941Abstract: Inner leads having die pads having upper surfaces to which semiconductor elements are mounted each have a stepped profile, and surfaces of portions of the inner leads are exposed from a sealing resin in plan view. Outer leads connected to the inner leads have first bends at side surfaces of the sealing resin to extend in a direction on a side of the upper surfaces of the die pads, so that a miniaturized semiconductor device can be obtained.Type: ApplicationFiled: May 25, 2021Publication date: April 7, 2022Applicant: Mitsubishi Electric CorporationInventor: Keitaro ICHIKAWA
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Patent number: 11244836Abstract: A semiconductor apparatus according to the invention of the present application includes a base plate, a lead frame having a first surface and a second surface being a surface opposite to the first surface, the second surface being bonded to an upper surface of the base plate, a semiconductor device provided on the first surface of the lead frame, and a mold resin covering the upper surface of the base plate, the lead frame, and the semiconductor device, wherein the mold resin is provided with a terminal insertion hole that extends from the surface of the mold resin to the lead frame and in which a press-fit terminal is inserted, and the lead frame is provided with an opening portion which intercommunicates with the terminal insertion hole and into which the press-fit terminal is press-fitted.Type: GrantFiled: June 21, 2017Date of Patent: February 8, 2022Assignee: Mitsubishi Electric CorporationInventor: Keitaro Ichikawa
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Publication number: 20210249341Abstract: A transfer-mold type power module includes a plurality of electrode terminals that is arranged so as to protrude in the same direction from a target side surface of a package. A tie bar cutting residue protruding from a first side surface of each of the electrode terminals and a tie bar cutting residue protruding from a second side surface of each of the electrode terminals are different in position in a length direction of each of the electrode terminals. Each of the electrode terminals has a shape bent at a position including tie bar cutting residue closer to the package, with a width direction of each of the electrode terminals as an axis.Type: ApplicationFiled: November 17, 2020Publication date: August 12, 2021Applicant: Mitsubishi Electric CorporationInventors: Fumihito KAWAHARA, Keitaro ICHIKAWA, Yuji SHIKASHO
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Patent number: 10930523Abstract: It is an object of the present invention to provide a method for manufacturing a resin-sealed power semiconductor device that facilitates the separation of a suspension lead from a mold resin and a lead frame. A method for manufacturing a resin-sealed power semiconductor device according to the present invention includes the following steps: (a) sealing a semiconductor element and a lead frame, to prepare a sealed body in which a terminal lead and a suspension lead that are included in the lead frame project outward from a side of the mold resin; (b) punching a portion of the suspension lead, the portion projecting from the mold resin, with a first punch in a first direction, to separate the suspension lead from the mold resin; and (c) punching the projecting portion of the suspension lead with a second punch in a second direction.Type: GrantFiled: March 29, 2016Date of Patent: February 23, 2021Assignee: Mitsubishi Electric CorporationInventors: Keitaro Ichikawa, Ken Sakamoto, Kazuo Funahashi
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Publication number: 20200303215Abstract: A semiconductor apparatus according to the invention of the present application includes a base plate, a lead frame having a first surface and a second surface being a surface opposite to the first surface, the second surface being bonded to an upper surface of the base plate, a semiconductor device provided on the first surface of the lead frame, and a mold resin covering the upper surface of the base plate, the lead frame, and the semiconductor device, wherein the mold resin is provided with a terminal insertion hole that extends from the surface of the mold resin to the lead frame and in which a press-fit terminal is inserted, and the lead frame is provided with an opening portion which intercommunicates with the terminal insertion hole and into which the press-fit terminal is press-fitted.Type: ApplicationFiled: June 21, 2017Publication date: September 24, 2020Applicant: Mitsubishi Electric CorporationInventor: Keitaro ICHIKAWA
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Publication number: 20200303295Abstract: Provided are a power semiconductor device using a lead frame, in which deformation and bending of terminals is suppressed, insulation is secured between terminals, and mounting onto a control board is facilitated, and a manufacturing method thereof. A package in which a semiconductor element mounted on a lead frame is sealed, terminals being bent and exposed from side surfaces of the package, and, a terminal bending portion being a portion bent in each of the terminals, a width thereof being larger than a width of a tip of the terminal, and being equal to or smaller than the width of a contact portion of the terminal in contact with the package are provided; therefore, deformation and bending of the terminals is suppressed, a necessary insulation is secured between the adjacent terminals, and mounting onto a control board is facilitated.Type: ApplicationFiled: January 9, 2020Publication date: September 24, 2020Applicant: Mitsubishi Electric CorporationInventors: Keitaro ICHIKAWA, Taketoshi SHIKANO, Yuji SHIKASHO, Fumihito KAWAHARA
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Publication number: 20190051539Abstract: It is an object of the present invention to provide a method for manufacturing a resin-sealed power semiconductor device that facilitates the separation of a suspension lead from a mold resin and a lead frame. A method for manufacturing a resin-sealed power semiconductor device according to the present invention includes the following steps: (a) sealing a semiconductor element and a lead frame, to prepare a sealed body in which a terminal lead and a suspension lead that are included in the lead frame project outward from a side of the mold resin; (b) punching a portion of the suspension lead, the portion projecting from the mold resin, with a first punch in a first direction, to separate the suspension lead from the mold resin; and (c) punching the projecting portion of the suspension lead with a second punch in a second direction.Type: ApplicationFiled: March 29, 2016Publication date: February 14, 2019Applicant: Mitsubishi Electric CorporationInventors: Keitaro ICHIKAWA, Ken SAKAMOTO, Kazuo FUNAHASHI
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Patent number: 10074598Abstract: A lead frame includes a plurality of circuit patterns which each have a die pad and an electrode terminal portion and are disposed in a band shape, a tie bar, a frame portion and a suspension lead. Cut are a connection portion between electrode terminals and the frame portion, a connection portion between the frame portion and the tie bar at both end portions in a disposition direction of circuit patterns, and a connection portion from a connection part of the frame portion with the tie bar, between the circuit patterns to a part of the frame portion extending in the disposition direction. The electrode terminal portion is bent to extend to a direction of an upper surface of a semiconductor element. The lead frame is collectively resin-sealed while exposing the tie bar and the electrode terminal portion above the tie bar.Type: GrantFiled: December 15, 2016Date of Patent: September 11, 2018Assignee: Mitsubishi Electric CorporationInventors: Ken Sakamoto, Tetsuya Ueda, Keitaro Ichikawa, Yuki Yoshioka
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Publication number: 20170345742Abstract: A lead frame includes a plurality of circuit patterns which each have a die pad and an electrode terminal portion and are disposed in a band shape, a tie bar, a frame portion and a suspension lead. Cut are a connection portion between electrode terminals and the frame portion, a connection portion between the frame portion and the tie bar at both end portions in a disposition direction of circuit patterns, and a connection portion from a connection part of the frame portion with the tie bar, between the circuit patterns to a part of the frame portion extending in the disposition direction. The electrode terminal portion is bent to extend to a direction of an upper surface of a semiconductor element. The lead frame is collectively resin-sealed while exposing the tie bar and the electrode terminal portion above the tie bar.Type: ApplicationFiled: December 15, 2016Publication date: November 30, 2017Applicant: Mitsubishi Electric CorporationInventors: Ken SAKAMOTO, Tetsuya UEDA, Keitaro ICHIKAWA, Yuki YOSHIOKA
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Patent number: 9627302Abstract: An object is to provide a technique in which a cost reduction in a power semiconductor device can be achieved while maintaining heat dissipation performance as much as possible. A power semiconductor device includes a leadframe, a power semiconductor element disposed on an upper surface of the leadframe, and an insulating layer disposed on a lower surface of the leadframe. At least a partial line of a peripheral line of a region where the insulating layer is disposed, on the lower surface, is aligned, in top view, with at least a partial line of an expanded peripheral line obtained by shifting outwardly, by the amount corresponding to the thickness of the leadframe, the peripheral line of the region where the power semiconductor element is disposed, on the upper surface.Type: GrantFiled: January 10, 2014Date of Patent: April 18, 2017Assignee: Mitsubishi Electric CorporationInventors: Keitaro Ichikawa, Taketoshi Shikano
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Publication number: 20160233151Abstract: An object is to provide a technique in which a cost reduction in a power semiconductor device can be achieved while maintaining heat dissipation performance as much as possible. A power semiconductor device includes a leadframe, a power semiconductor element disposed on an upper surface of the leadframe, and an insulating layer disposed on a lower surface of the leadframe. At least a partial line of a peripheral line of a region where the insulating layer is disposed, on the lower surface, is aligned, in top view, with at least a partial line of an expanded peripheral line obtained by shifting outwardly, by the amount corresponding to the thickness of the leadframe, the peripheral line of the region where the power semiconductor element is disposed, on the upper surface.Type: ApplicationFiled: January 10, 2014Publication date: August 11, 2016Applicant: Mitsubishi Electric CorporationInventors: Keitaro ICHIKAWA, Taketoshi SHIKANO