Patents by Inventor Keith W. Kawate
Keith W. Kawate has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9634479Abstract: Systems and methods of detecting arcing in a DC power system that can provide improved noise propagation immunity. The system includes at least two current sensors for monitoring at least two current outputs, respectively. The current sensors have reverse polarities, and are configured and arranged in parallel to provide a combined current output signal. The current sensors monitor the respective current outputs, which are provided for monitoring by the current sensors over at least two adjacent conductors. If arcing occurs at a location on a first conductor, then arcing (adjacent conductor crosstalk), having an arc current signature like that of the arcing on the first conductor, can occur at a location on the other adjacent conductor. The system can effectively cancel out such adjacent conductor crosstalk within a photovoltaic (PV) system, thereby improving the capability of an arc fault detection device for detecting arcing at the PV string level.Type: GrantFiled: December 23, 2013Date of Patent: April 25, 2017Assignee: SENSATA TECHNOLOGIES, INC.Inventors: Jianhong Kang, Christian V. Pellon, Lee Martin, Keith W. Kawate
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Patent number: 9502885Abstract: Systems and methods of detecting arcing in DC power systems that can differentiate between DC arcs and load-switching noise. The systems and methods can determine, within a plurality of predetermined time intervals, at least the pulse count (PC) per predetermined time interval, and the pulse duration (PD) per predetermined time interval, in which the PC and the PD can correspond to the number and the intensity of potential arcing events in a DC power system, respectively. The systems and methods can process the PC and PD using one or more arc fault detection algorithms, thereby differentiating between DC arcs and load-switching noise with increased reliability.Type: GrantFiled: March 15, 2013Date of Patent: November 22, 2016Assignee: Sensata Technologies, Inc.Inventors: Lee Martin, Jianhong Kang, Christian V. Pellon, Keith W. Kawate
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Patent number: 9465909Abstract: Systems and methods of detecting arcing in DC power systems that can differentiate between DC arcs and load-switching noise. The systems and methods can determine, within a plurality of predetermined time intervals, at least the pulse count (PC) per predetermined time interval, and the pulse duration (PD) per predetermined time interval, in which the PC and the PD can correspond to the number and the intensity of potential arcing events in a DC power system, respectively. The systems and methods can process the PC and PD using one or more arc fault detection algorithms, thereby differentiating between DC arcs and load-switching noise with increased reliability.Type: GrantFiled: November 16, 2012Date of Patent: October 11, 2016Assignee: Sensata Technologies, Inc.Inventors: Keith W. Kawate, Jianhong Kang
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Publication number: 20140195177Abstract: Systems and methods of detecting arcing in a DC power system that can provide improved noise propagation immunity. The system includes at least two current sensors for monitoring at least two current outputs, respectively. The current sensors have reverse polarities, and are configured and arranged in parallel to provide a combined current output signal. The current sensors monitor the respective current outputs, which are provided for monitoring by the current sensors over at least two adjacent conductors. If arcing occurs at a location on a first conductor, then arcing (adjacent conductor crosstalk), having an arc current signature like that of the arcing on the first conductor, can occur at a location on the other adjacent conductor. The system can effectively cancel out such adjacent conductor crosstalk within a photovoltaic (PV) system, thereby improving the capability of an arc fault detection device for detecting arcing at the PV string level.Type: ApplicationFiled: December 23, 2013Publication date: July 10, 2014Inventors: Jianhong Kang, Christian V. Pellon, Lee Martin, Keith W. Kawate
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Publication number: 20140142874Abstract: Systems and methods of detecting arcing in DC power systems that can differentiate between DC arcs and load-switching noise. The systems and methods can determine, within a plurality of predetermined time intervals, at least the pulse count (PC) per predetermined time interval, and the pulse duration (PD) per predetermined time interval, in which the PC and the PD can correspond to the number and the intensity of potential arcing events in a DC power system, respectively. The systems and methods can process the PC and PD using one or more arc fault detection algorithms, thereby differentiating between DC arcs and load-switching noise with increased reliability.Type: ApplicationFiled: March 15, 2013Publication date: May 22, 2014Inventors: Lee Martin, Jianhong Kang, Christian V. Pellon, Keith W. Kawate
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Publication number: 20140142873Abstract: Systems and methods of detecting arcing in DC power systems that can differentiate between DC arcs and load-switching noise. The systems and methods can determine, within a plurality of predetermined time intervals, at least the pulse count (PC) per predetermined time interval, and the pulse duration (PD) per predetermined time interval, in which the PC and the PD can correspond to the number and the intensity of potential arcing events in a DC power system, respectively. The systems and methods can process the PC and PD using one or more arc fault detection algorithms, thereby differentiating between DC arcs and load-switching noise with increased reliability.Type: ApplicationFiled: November 16, 2012Publication date: May 22, 2014Inventors: Keith W. Kawate, Jianhong Kang
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Publication number: 20130009483Abstract: A remote resource can be configured to control connectivity of the power generator modules in a string. For example, a respective power generator module can include a current sense circuit that monitors for presence of communication signal. The power generator module can monitor for a presence of a remotely generated control signal over power line that is used by the respective power generator module to convey power to the external load. If the control signal is present on the power line, as generated by the remote resource, the control circuit in the respective power generator module activates the switch to an ON state such that respective activated power generator module is connected in series with the other activated power generator modules. If no keep-alive control signal is detected within a timeout period, the controller deactivates the respective power generator module.Type: ApplicationFiled: May 29, 2012Publication date: January 10, 2013Inventors: Keith W. Kawate, Christopher E. Pinette, John R. Wezowicz, Thomas R. Maher, Michael B. Rose
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Patent number: 7898781Abstract: An arc fault detection apparatus that provides for better discrimination of electrical arcing events from nuisance loads. The arc fault detection apparatus includes an arcing sense circuit having a comparator circuit with a variable threshold voltage that varies continuously with the line voltage. The arc fault detection apparatus has reduced susceptibility to nuisance tripping in the presence of sudden changes in the load current that occur outside of a specified time window centered on each zero crossing point of the line voltage.Type: GrantFiled: August 1, 2008Date of Patent: March 1, 2011Assignee: Sensata Technologies Massachusetts, Inc.Inventors: Keith W. Kawate, Lynwald Edmunds, Roger D. Mayer
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Publication number: 20100027176Abstract: An arc fault detection apparatus that provides for better discrimination of electrical arcing events from nuisance loads. The arc fault detection apparatus includes an arcing sense circuit having a comparator circuit with a variable threshold voltage that varies continuously with the line voltage. The arc fault detection apparatus has reduced susceptibility to nuisance tripping in the presence of sudden changes in the load current that occur outside of a specified time window centered on each zero crossing point of the line voltage.Type: ApplicationFiled: August 1, 2008Publication date: February 4, 2010Inventors: Keith W. Kawate, Lynwald Edmunds, Roger D. Mayer
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Patent number: 7592819Abstract: An improved system and method of performing capacitance measurements that provides a fast digital response and a reduced output error. The capacitance measurement system includes a circuit configuration that has a variable capacitor and at least one reference capacitor connected to one another at a common node, which in turn is connected to the input of an analog-to-digital converter. The circuit configuration further includes an array of switches coupled between the variable and reference capacitors and the supply voltage, a reference voltage, and ground, respectively. The switched variable and reference capacitors are employed in conjunction with the A-to-D converter to perform, at the common node, a plurality of direct voltage measurements for use in generating an expression defining the capacitance of the variable capacitor.Type: GrantFiled: February 23, 2007Date of Patent: September 22, 2009Assignee: Sensata Technologies, Inc.Inventors: Keith W. Kawate, John A. Powning, Mark Genovese, Eric M. Visser
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Patent number: 7190561Abstract: An apparatus and method for detecting arc faults that have reduced susceptibility to nuisance tripping. The apparatus includes a current sensor, an input sense circuit, an arcing sense circuit, a power supply, a tripping (firing) circuit, a processor, and an electromechanical interface. The current sensor monitors a power input comprising an AC current, and provides high frequency components of the. AC current to the input sense circuit. The input sense circuit filters and rectifies the AC signal, and provides the rectified signal to the arcing sense circuit. The arcing sense circuit provides a voltage level accumulated over a predetermined time period, and digital signals indicative of possible electrical arcing occurring during the sampling period, to the processor.Type: GrantFiled: September 9, 2004Date of Patent: March 13, 2007Assignee: Sensata Technologies, Inc.Inventors: Christian V. Pellon, Mark D. Rabiner, Michael Parker, Christopher A. Nicolls, Keith W. Kawate, Robert Zanelli, Roger D. Mayer, Lucien Fontaine, Michael J. Lavado, Lynwald Edmunds, Jeffrey B. Ting
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Patent number: 7190562Abstract: An apparatus and method for detecting arc faults that have reduced susceptibility to nuisance tripping. The apparatus includes a current sensor, an input sense circuit, an arcing sense circuit, a power supply, a tripping (firing) circuit, a processor, and an electromechanical interface. The current sensor monitors a power input comprising an AC current, and provides high frequency components of the. AC current to the input sense circuit. The input sense circuit filters and rectifies the AC signal, and provides the rectified signal to the arcing sense circuit. The arcing sense circuit provides a voltage level accumulated over a predetermined time period, and digital signals indicative of possible electrical arcing occurring during the sampling period, to the processor.Type: GrantFiled: September 9, 2004Date of Patent: March 13, 2007Assignee: Sensata Technologies, Inc.Inventors: Christian V. Pellon, Mark D. Rabiner, Michael Parker, Christopher A. Nicolls, Keith W. Kawate, Robert Zanelli, Roger D. Mayer, Lucien Fontaine, Michael J. Lavado, Lynwald Edmunds, Jeffrey B. Ting
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Patent number: 6980407Abstract: Current flowing through a load is monitored by a transformer (Tr1) having a small mutual inductance. The secondary coil is shorted through a rectifier circuit to deliver a charge which, in a first preferred embodiment, is connected to a log charge translator circuit comprising matching diodes (D9, D7 and D10, D8) and a capacitor (C2) to provide a capacitor voltage proportional to the log of the charge delivered through the rectifier circuit. The capacitor is reset after each measurement. In a modified embodiment, the log translator circuit comprises a pair of transistors (T1, T2) and a capacitor (C2). According to the preferred embodiments, two measurements of the capacitor voltage are taken each half cycle at a time determined by the absolute value of the line voltage.Type: GrantFiled: December 9, 2002Date of Patent: December 27, 2005Assignee: Texas Instrument IncorporatedInventors: Keith W. Kawate, Christian V. Pellon
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Patent number: 6765391Abstract: An ASIC (14, 14′, 14″) conditions two independent outputs (VINM, VINP) of a full Wheatstone piezoresistive bridge (12) in separate conditioning paths. Each path is provided with a bridge supply voltage (VHB1, VHB2) which can serve as a temperature related input signal to respective offset and gain compensation control circuits. The half bridge outputs are inputted to respective amplifiers (U1, U2) along with a selected percentage of the temperature dependent bridge supply voltage. The outputs of the amplifiers provide a signal proportional to respective half bridge output voltage. In one embodiment, the output of the amplifier (U2) in one conditioning path of one half bridge is connected to the input of an amplifier (U4) in the other conditioning path to provide a signal in the one path proportional to the Wheatstone bridge differential output voltage and in the other path a signal proportional to the Wheatstone half bridge output voltage.Type: GrantFiled: October 22, 2002Date of Patent: July 20, 2004Assignee: Texas Instruments IncorporatedInventors: David L. Corkum, Keith W. Kawate, Thomas R. Maher
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Publication number: 20040109269Abstract: Current flowing through a load is monitored by a transformer (Tr1) having a small mutual inductance. The secondary coil is shorted through a rectifier circuit to deliver a charge which, in a first preferred embodiment, is connected to a log charge translator circuit comprising matching diodes (D9, D7 and D10, D8) and a capacitor (C2) to provide a capacitor voltage proportional to the log of the charge delivered through the rectifier circuit. The capacitor is reset after each measurement. In a modified embodiment, the log translator circuit comprises a pair of transistors (T1, T2) and a capacitor (C2). According to the preferred embodiments, two measurements of the capacitor voltage are taken each half cycle at a time determined by the absolute value of the line voltage.Type: ApplicationFiled: December 9, 2002Publication date: June 10, 2004Inventors: Keith W. Kawate, Christian V. Pellon
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Publication number: 20040075447Abstract: An ASIC (14, 14′, 14″) conditions two independent outputs (VINM, VINP) of a full Wheatstone piezoresistive bridge (12) in separate conditioning paths. Each path is provided with a bridge supply voltage (VHB1, VHB2) which can serve as a temperature related input signal to respective offset and gain compensation control circuits. The half bridge outputs are inputted to respective amplifiers (U1, U2) along with a selected percentage of the temperature dependent bridge supply voltage. The outputs of the amplifiers provide a signal proportional to respective half bridge output voltage. In one embodiment, the output of the amplifier (U2) in one conditioning path of one half bridge is connected to the input of an amplifier (U4) in the other conditioning path to provide a signal in the one path proportional to the Wheatstone bridge differential output voltage and in the other path a signal proportional to the Wheatstone half bridge output voltage.Type: ApplicationFiled: October 22, 2002Publication date: April 22, 2004Inventors: David L. Corkum, Keith W. Kawate, Thomas R. Maher
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Patent number: 6642711Abstract: A differential pulse transformer having a drive coil (10a) and differential sense coils (10b) are disposed on a planar surface with a target (10e, 10f) movable over the sense coils to cause an imbalance in magnetic field when a large di/dt pulse is generated in the drive coil. A detection circuit senses the imbalance and provides a digital output accurately identifying the position of the target. Coil and target embodiments include relatively small secondary coils and relatively long targets (10b, 10e/10f; 12b, 12e/12f and 14b) and relatively large secondary coils and short targets (16b, 16c; 18b, 18c; 20b and 22b).Type: GrantFiled: January 10, 2002Date of Patent: November 4, 2003Assignee: Texas Instruments IncorporatedInventors: Keith W. Kawate, Gerhard A. Foelsche, Lidu Huang, Gerald H. Fleischfresser
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Patent number: 6433554Abstract: An in-range fault detection system for a full wheatstone bridge element (12) having piezoresistive elements (R1, R2, R3, R4) has bridge outputs (INP, INM) connected to measuring means in the form of a first circuit portion (13) to provide a common mode voltage (VCM). A second circuit portion (14) is used to provide a centering voltage (C*VBRG) equal to the common mode voltage at the time of sensor calibration and a third circuit portion (15) is used to provide a small window voltage (W*VBRG) which is a fraction of bridge voltage. The value (W*VBRG) is subtracted from (C*VBRG) at a first summing circuit (SUM1) and added to (C*VBRG) at a second summing circuit (SUM2) and the results are each compared to the common mode voltage by comparators (Q1, Q2) which are then determined to be within or without a window of valid values by an OR gate (Q3).Type: GrantFiled: December 20, 1999Date of Patent: August 13, 2002Assignee: Texas Instruments IncorporatedInventors: Keith W. Kawate, David L. Corkum, Thomas R. Maher
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Publication number: 20020097042Abstract: A differential pulse transformer having a drive coil (10a) and differential sense coils (10b) are disposed on a planar surface with a target (10e, 10f) movable over the sense coils to cause an imbalance in magnetic field when a large di/dt pulse is generated in the drive coil. A detection circuit senses the imbalance and provides a digital output accurately identifying the position of the target. Coil and target embodiments include relatively small secondary coils and relatively long targets (10b, 10e/10f; 12b, 12e/12f and 14b) and relatively large secondary coils and short targets (16b, 16c; 18b, 18c; 20b and 22b).Type: ApplicationFiled: January 10, 2002Publication date: July 25, 2002Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Keith W. Kawate, Gerhard A. Foelsche, Lidu Huang, Gerald H. Fleischfresser
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Patent number: 6058783Abstract: A capacitive transducer (10) which provides an output voltage in response to the application of a mechanical stimulus such as pressure or acceleration includes a signal conditioning integrated circuit (12) to which are connected a variable capacitor (C.sub.VAR), a reference capacitor (C.sub.REF), a linear correction capacitor (C.sub.LIN) as well as an integrating capacitor (C.sub.INT) and associated filtering components. The linear correction capacitor (C.sub.LIN) is used to offset a fixed parasitic charge associated with the variable capacitor. Any net error charge appearing on a detect, common node (pin 4) between the variable capacitor and the reference capacitor is cancelled out by means of an analog feedback network (22). In a modified embodiment a thermal compensation network (40) allows for correction for thermal error at a second temperature without having any affect at a first temperature.Type: GrantFiled: January 26, 1998Date of Patent: May 9, 2000Assignee: Texas Instruments IncorporatedInventors: James P. Berthold, Keith W. Kawate