Patents by Inventor Kelly Lofgreen

Kelly Lofgreen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11869824
    Abstract: A thermal interface structure may be formed comprising a thermally conductive substrate having a first surface and an opposing second surface, a first liquid metal layer on the first surface of the thermally conductive substrate, and a second liquid metal layer on the second surface of the thermally conductive substrate. The thermal interface structure may be used in an integrated circuit assembly or package between at least one integrated circuit device and a heat dissipation device.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: January 9, 2024
    Assignee: Intel Corporation
    Inventors: Kyle J. Arrington, Aaron McCann, Kelly Lofgreen, Elah Bozorg-Grayeli, Aravindha Antoniswamy, Joseph B. Petrini
  • Patent number: 11756856
    Abstract: Embodiments include a microelectronic device package structure having a first die on the substrate. One or more additional dice are on the first die, and a thermal electric cooler (TEC) is on the first die adjacent at least one of the one or more additional dice. A dummy die is on the TEC, wherein the dummy die is thermally coupled to the first die.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventors: Krishna Vasanth Valavala, Ravindranath Mahajan, Chandra Mohan Jha, Kelly Lofgreen, Weihua Tang
  • Patent number: 11694942
    Abstract: An integrated circuit (IC) package comprising an IC die, the IC die having a first surface and an opposing second surface. The IC die comprises a semiconductor material. The first surface comprises an active layer. A thermoelectric cooler (TEC) comprising a thermoelectric material is embedded within the IC die between the first surface and the second surface and adjacent to the active layer. The TEC has an annular shape that is substantially parallel to the first and second surfaces of the IC die. The thermoelectric material is confined between an outer sidewall along an outer perimeter of the TEC and an inner sidewall along an inner perimeter of the TEC. The outer and inner sidewalls are substantially orthogonal to the first and second surfaces of the IC die.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: July 4, 2023
    Assignee: Intel Corporation
    Inventors: Kelly Lofgreen, Chandra Mohan Jha, Krishna Vasanth Valavala
  • Patent number: 11676883
    Abstract: An Integrated Circuit (IC) assembly, comprising an IC package coupled to a substrate, and a subassembly comprising a thermal interface layer. The thermal interface layer comprises a phase change material (PCM) over the IC package. At least one thermoelectric cooling (TEC) apparatus is thermally coupled to the thermal interface layer.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: June 13, 2023
    Assignee: Intel Corporation
    Inventors: Javed Shaikh, Je-Young Chang, Kelly Lofgreen, Weihua Tang, Aastha Uppal
  • Patent number: 11658095
    Abstract: An IC package, comprising a first IC component comprising a first interconnect on a first surface thereof; a second IC component comprising a second interconnect on a second surface thereof. The second component is above the first component, and the second surface is opposite the first surface. A thermoelectric cooling (TEC) device is between the first surface and the second surface. The TEC device is electrically coupled to the first interconnect and to the second interconnect.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: May 23, 2023
    Assignee: Intel Corporation
    Inventors: Kelly Lofgreen, Chandra Mohan Jha, Krishna Vasanth Valavala
  • Patent number: 11551994
    Abstract: Embodiments include an electronic system and methods of forming an electronic system. In an embodiment, the electronic system may include a package substrate and a die coupled to the package substrate. In an embodiment, the electronic system may also include an integrated heat spreader (IHS) that is coupled to the package substrate. In an embodiment the electronic system may further comprise a thermal interface pad between the IHS and the die. In an embodiment the die is thermally coupled to the IHS by a liquid metal thermal interface material (TIM) that contacts the thermal interface pad.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: January 10, 2023
    Assignee: Intel Corporation
    Inventors: Kelly Lofgreen, Chia-Pin Chiu, Joseph Petrini, Edvin Cetegen, Betsegaw Gebrehiwot, Feras Eid
  • Publication number: 20220397726
    Abstract: An electronic assembly, such as an integrated circuit package, may be formed comprising a package substrate and a photonic integrated circuit device attached thereto, wherein the package substrate includes a heat dissipation structure disposed therein. A back surface of the photonic integrated circuit device may thermally coupled to the heat dissipation structure within the package substrate for the removal of heat from the photonic integrated circuit device, which allows for access to an active surface of the photonic integrated circuit device for the attachment of fiber optic cables and eliminates the need for a heat dissipation device to be thermally attached to the active surface of the photonic integrated circuit device.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 15, 2022
    Applicant: Intel Corporation
    Inventors: Omkar Karhade, Tolga Acikalin, Sushrutha Gujjula, Kelly Lofgreen, Ravindranath Mahajan, Chia-pin Chiu
  • Patent number: 11464139
    Abstract: A conformable heat sink interface for an integrated circuit package comprises a mounting plate having a first surface and a deformable membrane having a portion bonded to a second surface of the plate. A cavity is between the second surface of the plate and the deformable membrane. A flowable heat transfer medium is within the cavity. The flowable heat transfer medium has a thermal conductivity of not less than 30 W/m K. The deformable membrane is to conform to a three-dimensional shape of an IC package and the mounting plate has a second surface that is to be adjacent to a heat sink base.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: October 4, 2022
    Assignee: Intel Corporation
    Inventors: Kelly Lofgreen, Joseph Petrini, Todd Coons, Christopher Wade Ackerman, Edvin Cetegen, Yang Jiao, Michael Rutigliano, Kuang Liu
  • Patent number: 11462457
    Abstract: Embodiments herein relate to systems, apparatuses, processing, and techniques related to a first heat-conducting plate to be thermally coupled to a first heat source, a thermoelectric cooler (TEC) thermally coupled to the first plate, a second heat-conducting plate thermally coupled to the TEC and to be thermally coupled to a second heat source where the TEC is to at least partially thermally isolate the first plate from the second plate to reduce heat transfer from the first plate to the second plate.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: October 4, 2022
    Assignee: Intel Corporation
    Inventors: Krishna Vasanth Valavala, Kelly Lofgreen, Chandra-Mohan Jha
  • Publication number: 20220201889
    Abstract: A two-phase immersion cooling system for an integrated circuit assembly may be formed utilizing boiling enhancement structures formed on or directly attached to heat dissipation devices within the integrated circuit assembly, formed on or directly attached to integrated circuit devices within the integrated circuit assembly, and/or conformally formed over support devices and at least a portion of an electronic board within the integrated circuit assembly. In still a further embodiment, the two-phase immersion cooling system may include a low boiling point liquid including at least two liquids that are substantially immiscible with one another.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Applicant: Intel Corporation
    Inventors: Raanan Sover, James Williams, Bradley Smith, Nir Peled, Paul George, Jason Armstrong, Alexey Chinkov, Meir Cohen, Je-Young Chang, Kuang Liu, Ravindranath Mahajan, Kelly Lofgreen, Kyle Arrington, Michael Crocker, Sergio Antonio Chan Arguedas
  • Publication number: 20210134698
    Abstract: A thermal interface structure may be formed comprising a thermally conductive substrate having a first surface and an opposing second surface, a first liquid metal layer on the first surface of the thermally conductive substrate, and a second liquid metal layer on the second surface of the thermally conductive substrate. The thermal interface structure may be used in an integrated circuit assembly or package between at least one integrated circuit device and a heat dissipation device.
    Type: Application
    Filed: November 4, 2019
    Publication date: May 6, 2021
    Applicant: Intel Corporation
    Inventors: Kyle J. Arrington, Aaron McCann, Kelly Lofgreen, Elah Bozorg-Grayeli, Aravindha Antoniswamy, Joseph B. Petrini
  • Publication number: 20210125896
    Abstract: A thermal interface material may be formed comprising a liquid metal and a corrosion resistant filler material. The thermal interface material may be used in an integrated circuit assembly between at least one integrated circuit device and a heat dissipation device, wherein the corrosion resistant filler material changes the physical properties of the thermal interface material, which may prevent failure modes from occurring during the operation of the integrated circuit assembly and may assist in maintaining a bond line thickness between the at least one integrated circuit device and the heat dissipation device.
    Type: Application
    Filed: October 24, 2019
    Publication date: April 29, 2021
    Applicant: Intel Corporation
    Inventors: Kyle J. Arrington, Aaron Mccann, Kelly Lofgreen, Aravindha R. Antoniswamy, Shankar Devasenathipathy
  • Publication number: 20200312742
    Abstract: An IC package, comprising a first IC component comprising a first interconnect on a first surface thereof; a second IC component comprising a second interconnect on a second surface thereof. The second component is above the first component, and the second surface is opposite the first surface. A thermoelectric cooling (TEC) device is between the first surface and the second surface. The TEC device is electrically coupled to the first interconnect and to the second interconnect.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 1, 2020
    Inventors: Kelly Lofgreen, Chandra Mohan Jha, Krishna Vasanth Valavala
  • Publication number: 20200294884
    Abstract: An Integrated Circuit (IC) assembly, comprising an IC package coupled to a substrate, and a subassembly comprising a thermal interface layer. The thermal interface layer comprises a phase change material (PCM) over the IC package. At least one thermoelectric cooling (TEC) apparatus is thermally coupled to the thermal interface layer.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Applicant: Intel Corporation
    Inventors: Javed Shaikh, Je-Young Chang, Kelly Lofgreen, Weihua Tang, Aastha Uppal
  • Publication number: 20200146183
    Abstract: A conformable heat sink interface for an integrated circuit package comprises a mounting plate having a first surface and a deformable membrane having a portion bonded to a second surface of the plate. A cavity is between the second surface of the plate and the deformable membrane. A flowable heat transfer medium is within the cavity. The flowable heat transfer medium has a thermal conductivity of not less than 30 W/m K. The deformable membrane is to conform to a three-dimensional shape of an IC package and the mounting plate has a second surface that is to be adjacent to a heat sink base.
    Type: Application
    Filed: November 5, 2018
    Publication date: May 7, 2020
    Applicant: Intel Corporation
    Inventors: Kelly Lofgreen, Joseph Petrini, Todd Coons, Christopher Wade Ackerman, Edvin Cetegen, Yang Jiao, Michael Rutigliano, Kuang Liu
  • Publication number: 20200126888
    Abstract: An integrated circuit (IC) package comprising an IC die, the IC die having a first surface and an opposing second surface. The IC die comprises a semiconductor material. The first surface comprises an active layer. A thermoelectric cooler (TEC) comprising a thermoelectric material is embedded within the IC die between the first surface and the second surface and adjacent to the active layer. The TEC has an annular shape that is substantially parallel to the first and second surfaces of the IC die. The thermoelectric material is confined between an outer sidewall along an outer perimeter of the TEC and an inner sidewall along an inner perimeter of the TEC. The outer and inner sidewalls are substantially orthogonal to the first and second surfaces of the IC die.
    Type: Application
    Filed: October 23, 2018
    Publication date: April 23, 2020
    Applicant: Intel Corporation
    Inventors: Kelly Lofgreen, Chandra Mohan Jha, Krishna Vasanth Valavala
  • Publication number: 20200105639
    Abstract: Embodiments include a microelectronic device package structure having a first die on the substrate. One or more additional dice are on the first die, and a thermal electric cooler (TEC) is on the first die adjacent at least one of the one or more additional dice. A dummy die is on the TEC, wherein the dummy die is thermally coupled to the first die.
    Type: Application
    Filed: October 2, 2018
    Publication date: April 2, 2020
    Applicant: Intel Corporation
    Inventors: Krishna Vasanth Valavala, Ravindranath Mahajan, Chandra Mohan Jha, Kelly Lofgreen, Weihua Tang
  • Publication number: 20200098664
    Abstract: Embodiments herein relate to systems, apparatuses, processing, and techniques related to a first heat-conducting plate to be thermally coupled to a first heat source, a thermoelectric cooler (TEC) thermally coupled to the first plate, a second heat-conducting plate thermally coupled to the TEC and to be thermally coupled to a second heat source where the TEC is to at least partially thermally isolate the first plate from the second plate to reduce heat transfer from the first plate to the second plate.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Krishna Vasanth VALAVALA, Kelly LOFGREEN, Chandra-Mohan JHA
  • Publication number: 20200098661
    Abstract: Embodiments include an electronic system and methods of forming an electronic system. In an embodiment, the electronic system may include a package substrate and a die coupled to the package substrate. In an embodiment, the electronic system may also include an integrated heat spreader (IHS) that is coupled to the package substrate. In an embodiment the electronic system may further comprise a thermal interface pad between the IHS and the die. In an embodiment the die is thermally coupled to the IHS by a liquid metal thermal interface material (TIM) that contacts the thermal interface pad.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Inventors: Kelly LOFGREEN, Chia-Pin CHIU, Joseph PETRINI, Edvin CETEGEN, Betsegaw GEBREHIWOT, Feras EID
  • Publication number: 20190393118
    Abstract: A package is disclosed. The package includes a substrate, a die on the substrate, an integrated heat spreader on the substrate that encloses the die, the integrated heat spreader including a hole that extends through the integrated heat spreader, an air permeable adhesive contacting the integrated heat spreader and forming a cavity underneath the integrated heat spreader, and a liquid metal thermal interface material filling the cavity. A sealant plugs the hole that extends through the integrated heat spreader.
    Type: Application
    Filed: June 22, 2018
    Publication date: December 26, 2019
    Inventors: Brandon M. RAWLINGS, Feras EID, Kelly LOFGREEN