Abstract: The present invention provides the compound represented by the following formula (I): wherein a moiety represented by formula: or the like. The symbols are defined in the specification. The compounds of the present invention have MGAT2 inhibitory activity, and are useful as a medicine for treatment of MGAT2-associated diseases including obesity, metabolic syndrome, hyperlipidemia, hypertriglyceridemia, hyper-VLDL-triglyceridemia, hyperfattyacidemia, diabetes mellitus, and arteriosclerosis.

Abstract: The present invention provides the compound represented by the following formula (I): wherein a moiety represented by formula: or the like. The symbols are defined in the specification. The compounds of the present invention have MGAT2 inhibitory activity, and are useful as a medicine for treatment of MGAT2-associated diseases including obesity, metabolic syndrome, hyperlipidemia, hypertriglyceridemia, hyper-VLDL-triglyceridemia, hyperfattyacidemia, diabetes mellitus, and arteriosclerosis.

Abstract: The present invention provides the compound represented by the following formula (I): wherein a moiety represented by formula: or the like. The symbols are defined in the specification. The compounds of the present invention have MGAT2 inhibitory activity, and are useful as a medicine for treatment of MGAT2-associated diseases including obesity, metabolic syndrome, hyperlipidemia, hypertriglyceridemia, hyper-VLDL-triglyceridemia, hyperfattyacidemia, diabetes mellitus, and arteriosclerosis.

Abstract: In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.

Abstract: In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.

Abstract: In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.

Abstract: In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.

Abstract: In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.

Abstract: In a region just below an access gate electrode in an SRAM memory cell, a second halo region is formed adjacent to a source-drain region and a first halo region is formed adjacent to a first source-drain region. In a region just below a drive gate electrode, a third halo region is formed adjacent to the third source-drain region and a fourth halo region is formed adjacent to a fourth source-drain region. The second halo region is set to have an impurity concentration higher than the impurity concentration of the first halo region. The third halo region is set to have an impurity concentration higher than the impurity concentration of the fourth halo region. The impurity concentration of the first halo region and the impurity concentration of the fourth halo region are different from each other.

Abstract: A fuel supply system includes a covering member, a subtank, a first housing on the covering member to project toward the subtank, terminals in the first housing, a second housing fitted to the first housing, and lead wires in the second housing connected respectively to the terminals. The first housing includes a fitting recess opening toward the subtank, and a partition wall dividing the recess into spaces, each of which receives a corresponding terminal. The second housing includes a fitting projection fitted into the recess, a slit dividing the projection into blocks, each of which receives a corresponding terminal, the partition wall being inserted in the slit, and axial holes, each of which accommodates a corresponding wire. Each wire includes a corresponding one of elastic seal members. Each seal member seals a gap between a corresponding wire and a wall surface of a corresponding axial hole.

Abstract: A fuel supply system includes a covering member, a subtank, a first housing on the covering member to project toward the subtank, terminals in the first housing, a second housing fitted to the first housing, and lead wires in the second housing connected respectively to the terminals. The first housing includes a fitting recess opening toward the subtank, and a partition wall dividing the recess into spaces, each of which receives a corresponding terminal. The second housing includes a fitting projection fitted into the recess, a slit dividing the projection into blocks, each of which receives a corresponding terminal, the partition wall being inserted in the slit, and axial holes, each of which accommodates a corresponding wire. Each wire includes a corresponding one of elastic seal members. Each seal member seals a gap between a corresponding wire and a wall surface of a corresponding axial hole.

Abstract: A method of writing data into a semiconductor memory device including a memory cell to which a power supply potential and a ground potential are provided is disclosed. The method may include generating a negative voltage (GNDL) lower than the ground potential and providing complementary data signals to a bit line pair when writing data to a memory cell wherein the low one of the complementary data signals is essentially the negative voltage. In this way, compensation for a potential increment which may be caused due to a wiring resistance, or the like, of a bit line (BL1) may be provided.

Abstract: A method of writing data into a semiconductor memory device including a memory cell to which a power supply potential and a ground potential are provided is disclosed. The method may include generating a negative voltage (GNDL) lower than the ground potential and providing complementary data signals to a bit line pair when writing data to a memory cell wherein the low one of the complementary data signals is essentially the negative voltage. In this way, compensation for a potential increment which may be caused due to a wiring resistance, or the like, of a bit line (BL1) may be provided.

Abstract: A buckle for use with a belt which is characterized in that the belt clamping element thereof has its lower or leg portion diversified in three radially directed wings which are adapted to be engaged within associated ones of juxtaposed transverse openings of the belt connecting member arranged in slidable engagement within the main body of the buckle.Thus, said clamping element is housed within the main body of the buckle in a compact and little bulky fashion. The buckle is further characterized by having an ornamental upper side surface portion which is easily interchangeable with another one so that the buckle may have various ornaments of different tastes.