Patents by Inventor Kenichi Maruhashi

Kenichi Maruhashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6674347
    Abstract: A multi-layer substrate comprises a first dielectric layer, a coplanar waveguide line formed on a first surface of the first dielectric layer, the coplanar waveguide line including a signal conductor and a pair of ground conductor layers positioned at opposite sides of the signal conductor, separately from the signal conductor, and a second dielectric layer formed to cover the coplanar waveguide line and the first dielectric layer and having an opening positioned at least on the signal conductor of the coplanar waveguide line. A thickness of the first dielectric layer is smaller than the value of c/{4f·(∈1−1)½}, where c is velocity of light, f is a frequency of a signal propagating in the signal line, and ∈1 is a dielectric constant of the first dielectric layer.
    Type: Grant
    Filed: March 23, 2000
    Date of Patent: January 6, 2004
    Assignee: NEC Corporation
    Inventors: Kenichi Maruhashi, Masaharu Ito, Keiichi Ohata
  • Publication number: 20030155865
    Abstract: A dielectric waveguide tube band-pass filter assuming lower characteristic change upon mounting, and having smaller dimensions and lower loss. Conductor layers (2a, 2c) are formed on the top and bottom surfaces of a dielectric substrate (1), wherein the top conductor layer 2a and the bottom conductor layer 2c are connected together through via-holes (3a). The via-holes (3a) are formed in at least two rows along the signal transfer direction. In the dielectric waveguide tube configured by the top and bottom conductor layers (2a, 2c) and the via-holes (3a), via-holes (3b) are arranged in the signal transfer direction at spacing equal to or below ½ of the in-tube wavelength to thereby configure resonators. The dielectric band-pass filter is configured by coupling adjacent resonators together through the via-holes (3b) configuring inductive windows.
    Type: Application
    Filed: April 10, 2003
    Publication date: August 21, 2003
    Inventors: Masaharu Ito, Kenichi Maruhashi, Keiichi Ohata
  • Publication number: 20030156806
    Abstract: The present invention provides a filter exhibiting excellent filter characteristics and having less number of stages. A dielectric substrate (1) has one surface connected to a top conductor (2) and an opposite surface connected to a bottom conductor (3). A pair of rows of via-holes connecting together the top conductor (2) and the bottom conductor (3) are formed along the signal transfer direction. A slit (6) is formed in a portion of the top conductor (2) overlying the central resonator among a plurality of resonators. The slit (6) extends in a direction perpendicular to the signal transfer direction. Slits (7, 8) are formed in each of portions of the top conductor (2) overlying resonators disposed at both ends. A coplanar waveguide (9) mounted on the top conductor (2) is connected to the slit (7).
    Type: Application
    Filed: April 10, 2003
    Publication date: August 21, 2003
    Inventors: Kenichi Maruhashi, Masaharu Ito, Keiichi Ohata
  • Patent number: 6518864
    Abstract: The present invention provides a transmission line structure comprising: a dielectric substrate having first and second surfaces; a signal conductive layer selectively provided on the first surface of the dialectic substrate for signal transmission; at least a first non-signal conductive layer being selectively provided on the first surface of the dialectic substrate, and the at least first non-signal conductive layer being separated from the signal conductive layer; and a second non-signal conductive layer being provided on the second surface of the dialectic substrate, wherein the dielectric substrate has at least a conductive region extending in contact with only one of the at least first non-signal conductive layer and the second non-signal conductive layer so that the at least conductive region is separated by the dielectric substrate from remaining one of the first non-signal conductive layers and the second non-signal conductive layer in view of a vertical direction to the first and second surfaces of
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: February 11, 2003
    Assignee: NEC Corporation
    Inventors: Masaharu Ito, Kenichi Maruhashi, Keiichi Ohata
  • Publication number: 20020158722
    Abstract: A high frequency circuit substrate comprises a first high frequency circuit substrate including at least a first dielectric material layer, a first conductor layer, a second dielectric material layer and a second conductor layer, which are laminated in the named order, the first conductor layer having a first slot formed therein, and the second conductor layer forming a transmission line, the first dielectric material layer having a first opening exposing the first slot at its bottom. The high frequency circuit substrate also comprises a second high frequency circuit substrate including at least a third dielectric material layer, a third conductor layer, a fourth dielectric material layer and a fourth conductor layer, which are laminated in the named order, the third conductor layer having a second slot formed therein, and the fourth conductor layer forming a transmission line, the third dielectric material layer having a second opening exposing the second slot at its bottom.
    Type: Application
    Filed: April 29, 2002
    Publication date: October 31, 2002
    Inventors: Kenichi Maruhashi, Masaharu Ito, Keiichi Ohata, Kazuhiro Ikuina, Takeya Hashiguchi
  • Patent number: 6437654
    Abstract: A substrate-type non-reciprocal circuit element comprises a substrate, a ferrite embedded in the substrate, a central electrode formed on the ferrite at one principal surface of the substrate, a plurality of signal conductors formed on the one principal surface of the substrate to extend from the central electrode into a plurality of different outward directions, a first ground electrode formed on the one principal surface of the substrate, separately from the central electrode and the plurality of signal conductors, and a second ground electrode formed on the other principal surface of the substrate and electrically connected to the first ground electrode. Thus, the substrate-type non-reciprocal circuit element can be easily electrically connected to a measurement machine, to enable to precisely and easily measure an electrical characteristics with a good repeatability.
    Type: Grant
    Filed: November 19, 1998
    Date of Patent: August 20, 2002
    Assignee: NEC Corporation
    Inventors: Kenichi Maruhashi, Keiichi Ohata
  • Publication number: 20020093392
    Abstract: Circuits having active devices, a pattern for a circulator or isolator, and ferrite are formed on a semiconductor microwave-millimeter wave circuit substrate. The ferrite is embedded in a dielectric substrate. The dielectric substrate is oppositely aligned with the semiconductor microwave-millimeter wave circuit substrate having the pattern for the circulator or the like. Thus, the pattern is coupled with the ferrite so as to structure the circulator or isolator.
    Type: Application
    Filed: October 25, 1999
    Publication date: July 18, 2002
    Inventors: KEIICHI OHATA, KENICHI MARUHASHI
  • Patent number: 6320543
    Abstract: The present invention provides a microwave and millimeter wave circuit apparatus having a reduced size and which can be produced easily, improving productivity. The microwave and millimeter wave circuit apparatus includes: a grounding conductive layer 4 grounded; a first dielectric layer 5 formed on this grounding conductive layer 4; a signal line selectively formed on this first dielectric layer 5; a second dielectric layer 7 covering at least a portion of the signal line 6; a cavity 2 formed in this second dielectric layer 7 and extending to the signal line 6; a monolithic microwave integrated circuit 1 arranged in the cavity 2 and connected to the signal line 6; and an antenna connected to the signal line 6.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: November 20, 2001
    Assignee: NEC Corporation
    Inventors: Keiichi Ohata, Kenichi Maruhashi, Masaharu Ito
  • Publication number: 20010028280
    Abstract: A substrate-type non-reciprocal circuit element comprises a substrate, a ferrite embedded in the substrate, a central electrode formed on the ferrite at one principal surface of the substrate, a plurality of signal conductors formed on the one principal surface of the substrate to extend from the central electrode into a plurality of different outward directions, a first ground electrode formed on the one principal surface of the substrate, separately from the central electrode and the plurality of signal conductors, and a second ground electrode formed on the other principal surface of the substrate and electrically connected to the first ground electrode. Thus, the substrate-type non-reciprocal circuit element can be easily electrically connected to a measurement machine, to enable to precisely and easily measure an electrical characteristics with a good repeatability.
    Type: Application
    Filed: November 19, 1998
    Publication date: October 11, 2001
    Inventors: KENICHI MARUHASHI, KEIICHI OHATA
  • Patent number: 6239497
    Abstract: In a multilayer substrate wherein a first ceramic layer, a wiring layer and a second ceramic layer are provided, a portion of the second ceramic layer is removed to expose the wiring layer, thereby forming a cavity inside which a semiconductor device is to be inserted. On the wiring layer inside the cavity, a bump to which an electrode pad on the surface of the semiconductor device is connected is formed. The size of the cavity is larger by a predetermined size (t) than the size of the external form of the semiconductor device, and the size (t) is smaller than the size (s) of the electrode pad formed on the semiconductor device. This makes it possible to shorten working time and restrain the deterioration of various properties even in a semiconductor device having low heart-resistance.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: May 29, 2001
    Assignee: NEC Corporation
    Inventor: Kenichi Maruhashi
  • Patent number: 5847608
    Abstract: An amplifier circuit is powered by a single power voltage source connected to a drain node of a field effect transistor, and a series of a resistor and a diode produces a gate bias voltage from the power voltage at the single power voltage source so as to increase the resistance of a resistor connected to the source node of the field effect transistor, thereby decreasing a sensitivity of drain current to undesirable variation of the threshold voltage.
    Type: Grant
    Filed: December 16, 1996
    Date of Patent: December 8, 1998
    Assignee: NEC Corporation
    Inventor: Kenichi Maruhashi
  • Patent number: 5466955
    Abstract: A field effect transistor (20) comprises a first semiconductor layer (24) and a second semiconductor layer (25) formed on the first semiconductor layer. The first semiconductor layer is an undoped layer and is composed of InGaAs. The second semiconductor layer is composed of InAlGaP and is a doped layer in which an n-type impurity is doped. A heterojunction structure is formed between the first semiconductor layer and the second semiconductor layer.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: November 14, 1995
    Assignee: NEC Corporation
    Inventors: Kenichi Maruhashi, Kazuhiko Onda, Masaaki Kuzuhara
  • Patent number: 5453631
    Abstract: In a field effect transistor having a channel layer interposed between heterojunctions, the channel layer has an intermediate layer of undoped InGaAs interposed between first and second channel layers each of which has a composition different from the intermediate layer. The composition of each of the first and the second channel layers may be composed of either InP or InGaAs. The intermediate layer may be formed either by a single layer of InGaAs or by a plurality of intermediate films of InGaAs which have In compositions different from one another when each of the first and the second channel layers is composed of InP. A maximum one of the In compositions is assigned to a selected one of the intermediate films. Alternatively, a selected one of the intermediate films includes a maximum In composition when each of the first and the second channel layers is formed by InGaAs.
    Type: Grant
    Filed: May 5, 1993
    Date of Patent: September 26, 1995
    Assignee: NEC Corporation
    Inventors: Kazuhiko Onda, Kenichi Maruhashi, Masaaki Kuzuhara
  • Patent number: 5384558
    Abstract: A radio-frequency integrated circuit has a transmission line which is short-circuited at an RF short-circuiting point to ground through an RF short-circuiting and DC blocking capacitor. The transmission line is connected to a bias supply point. The circuit has a matching circuit constituted by the transmission line and has a short-circuit stub and an adjusting capacitor. The short-circuit stub has first bonding points to which the bias voltage is applied and the adjusting capacitor has second bonding points which are selectively wire-bonded with the first bonding points. By selecting the positions at which the bonding points are interconnected, the impedance of the matching circuit can be adjusted.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: January 24, 1995
    Assignee: NEC Corporation
    Inventor: Kenichi Maruhashi