Abstract: A damping machining method for a long workpiece includes, when rotating the long workpiece in a state in which both end portions of the long workpiece are respectively held and cutting an outer circumferential portion of the long workpiece with a turning tool, applying a torsional load to the long workpiece.

Abstract: An integrated management server comprising: a data formatting means for receiving sales record information from a plurality of distributor terminals of a plurality of distributors which are selling products to retailers; a data matching means for updating brand master information for universally managing alcoholic beverage brands sold to the retailers across the plurality of distributors based on each of the received sales record information; and a brand Identification means for analyzing image related information received from a user terminal, identifying an alcoholic beverage brand by comparing a feature information corresponding to an alcoholic beverage brand registered in the brand master information, and sending information related to identified alcoholic beverage brand to the user terminal; and the user terminal comprising: a display means for displaying information on the sent alcoholic beverage brand.

Abstract: A polyisocyanurate raw material composition containing a polyfunctional isocyanate, a compound (I) represented by general formula (I) shown below, and an epoxy compound. In general formula (I), each of R1 to R5 represents a hydrogen atom, an alkoxy group of 1 to 10 carbon atoms, an alkyl group of 2 to 10 carbon atoms (or an alkyl group of 1 to 10 carbon atoms in the case of R3 to R5), an aryl group of 6 to 12 carbon atoms, an amino group, a monoalkylamino group of 1 to 10 carbon atoms, a dialkylamino group of 2 to 20 carbon atoms, a carboxy group, a cyano group, a fluoroalkyl group of 1 to 10 carbon atoms, or a halogen atom (provide that R1 and R2 are not both hydrogen atoms).

Abstract: An object is to reduce the number of writes of information managed by a controller to a non-volatile memory. A controller according to one aspect of the present invention includes: a first interface unit connected to a non-volatile memory including a plurality of blocks of memory cells that enter into both a first state and a second state and in which a plurality of addresses is allocated to the plurality of blocks; an information holding unit that holds first information; and a control unit that reads first data from a first block of the non-volatile memory via the first interface unit, specifies the memory cell in the second state among the memory cells in the first block and writes second data for causing the specified memory cell in the second state to transition to the first state, and selects one of the first information and the first data on the basis of the address of the first block and writes the selected first information or first data to the first block.

Abstract: A load of a data channel at the time of data writing is reduced. A memory controller includes a specific data pattern retaining unit, a comparator, and an issuance unit. The specific data pattern retaining unit retains a specific data pattern. The comparator compares write data regarding a write command from a host computer with the specific data pattern. The issuance unit issues a specific write request that requests writing of the specific data pattern without supplying the write data to a memory in a case where the write data matches the specific data pattern.

Abstract: Efficient wear leveling processing is performed in a memory in which the number of times of writing may vary for each of pages that are access units. An address conversion unit performs address conversion between a logical address of a host command and a physical address of the memory for each of management units, the management units each including a plurality of access units of the memory. A write amount measurement unit measures a write amount for each of the access units in each of the management units. The averaging processing unit selects a target management unit from the management units on the basis of the write amount measured by the write amount measurement unit and changes physical address allocation in the address conversion of the target management unit. Then, the averaging processing unit performs processing of averaging write amounts of the access units in the target management unit.

Abstract: The write time is to be shortened in a storage device using memories that require different write times from each other, such as nonvolatile memories. In a memory controller including a plurality of write request holding units and a selection unit, the write request holding units holds a write request with respect to each of a plurality of memory modules that require different write times from one another. The selection unit selects one of the plurality of write request holding units in accordance with memory state information indicating whether each of the plurality of memory modules is in a busy state, and causes outputting of the write request.

Abstract: To suppress influence of access patterns in counting the number of accesses in page units while reducing required buffer capacity. An access history holding section holds an access history for each of first storage units of a memory. An access counter counts the number of accesses of each second storage unit corresponding to a set of a plurality of the first storage units of the memory. The access counter is provided for each second storage unit. A control section updates the access history in the access history holding section in response to an access to the first storage unit of the memory. Further, the control section increments the number of accesses of the second storage unit in the access counter depending on a state of the access history.

Abstract: A polyisocyanurate raw material composition containing a polyfunctional isocyanate, a compound (I) represented by general formula (I) shown below, and an epoxy compound. In general formula (I), each of R1 to R5 represents a hydrogen atom, an alkoxy group of 1 to 10 carbon atoms, an alkyl group of 2 to 10 carbon atoms (or an alkyl group of 1 to 10 carbon atoms in the case of R3 to R5), an aryl group of 6 to 12 carbon atoms, an amino group, a monoalkylamino group of 1 to 10 carbon atoms, a dialkylamino group of 2 to 20 carbon atoms, a carboxy group, a cyano group, a fluoroalkyl group of 1 to 10 carbon atoms, or a halogen atom (provide that R1 and R2 are not both hydrogen atoms).

Abstract: A selector malfunction caused by a drift is prevented in a memory having a cross-point structure. A memory cell array is provided with a data area and a drift reference cell. An accumulated drift amount acquisition unit acquires an accumulated drift amount of the drift reference cell. A total drift amount reading unit reads a total drift amount stored in the data area. A refresh control unit adds the accumulated drift amount to the total drift amount to update the total drift amount as a new total drift amount. Further, the refresh control unit refreshes the data area of the memory cell array in a case where the new total drift amount exceeds a predetermined threshold value.

Abstract: To eliminate drift that is generated in a memory cell and continue use of the memory cell. A storage control device controls a memory cell array in which each bit is in any one of first or second states. The storage control device includes a detection unit and a control unit. The detection unit detects a transition bit that should be in the first state but is in the second state in the memory cell array. The control unit performs control to supply, to the transition bit, a drift refresh voltage higher than a read voltage required for reading from the memory cell array.

Abstract: An integrated management server comprising: a data formatting means for receiving sales record information from a plurality of distributor terminals of a plurality of distributors which are selling products to retailers; a data matching means for updating brand master information for universally managing alcoholic beverage brands sold to the retailers across the plurality of distributors based on each of the received sales record information; and a brand Identification means for analyzing image related information received from a user terminal, identifying an alcoholic beverage brand by comparing a feature information corresponding to an alcoholic beverage brand registered in the brand master information, and sending information related to identified alcoholic beverage brand to the user terminal; and the user terminal comprising: a display means for displaying information on the sent alcoholic beverage brand.

Abstract: The order of read access to a memory is appropriately determined. A memory system includes a plurality of memories and a memory controller. The memory controller includes a memory write control unit and a memory read control unit. The memory write control unit generates a write request for any one of the plurality of memories on the basis of a write command from a computer. The memory read control unit generates a read request for any one of the plurality of memories according to priority corresponding to a data processing state of write data related to the write request in the memory write control unit on the basis of a read command from the computer.

Abstract: An object is to suppress a process of evicting cached data so as to improve a throughput of an entire system. A storage controller includes an access request section and an operation management section. The access request section requests access to a first storage and to a second storage that is higher in response speed than the first storage, the second storage storing part of data stored in the first storage. The operation management section manages, based on a usage state of the second storage, whether or not to transfer from the first storage to the second storage data targeted for access but not stored in the second storage.

Abstract: A delay due to retry processing with regard to occurrence of a memory write error is suppressed. A sub-region command holding section holds a host command as a sub-region command divided with respect to each access target sub-region. A sub-region address conversion section converts an address of an access target sub-region to an address of a memory regarding a sub-region command. A sub-region command execution section executes a sub-region command whose address has been converted, and accesses a memory. In a case where a write error occurs in a memory regarding a sub-region command, an address conversion management section performs preparation processing of a substitute region for a sub-region command in which the write error has occurred concurrently with execution of another sub-region command in the sub-region command execution section.

Abstract: Efficient wear leveling processing is performed in a memory in which the number of times of writing may vary for each of pages that are access units. An address conversion unit performs address conversion between a logical address of a host command and a physical address of the memory for each of management units, the management units each including a plurality of access units of the memory. A write amount measurement unit measures a write amount for each of the access units in each of the management units. The averaging processing unit selects a target management unit from the management units on the basis of the write amount measured by the write amount measurement unit and changes physical address allocation in the address conversion of the target management unit. Then, the averaging processing unit performs processing of averaging write amounts of the access units in the target management unit.

Abstract: A load of a data channel at the time of data writing is reduced. A memory controller includes a specific data pattern retaining unit, a comparator, and an issuance unit. The specific data pattern retaining unit retains a specific data pattern. The comparator compares write data regarding a write command from a host computer with the specific data pattern. The issuance unit issues a specific write request that requests writing of the specific data pattern without supplying the write data to a memory in a case where the write data matches the specific data pattern.

Abstract: The order of read access to a memory is appropriately determined. A memory system includes a plurality of memories and a memory controller. The memory controller includes a memory write control unit and a memory read control unit. The memory write control unit generates a write request for any one of the plurality of memories on the basis of a write command from a computer. The memory read control unit generates a read request for any one of the plurality of memories according to priority corresponding to a data processing state of write data related to the write request in the memory write control unit on the basis of a read command from the computer.

Abstract: Memory devices having different parallel accessible data sizes and different access speeds are caused to work efficiently as a cache memory. A memory access device accesses first and second memory devices that respectively include a plurality of parallel accessible memories and have different parallel accessible data sizes and different access speeds. The memory access device includes a management information storage unit and an access control unit. The management information storage unit stores management information as associating each corresponding management unit of the first and second memory devices. The access control unit accesses one of the first and second memory devices on the basis of the management information.

Abstract: An object is to suppress a process of evicting cached data so as to improve a throughput of an entire system. A storage controller includes an access request section and an operation management section. The access request section requests access to a first storage and to a second storage that is higher in response speed than the first storage, the second storage storing part of data stored in the first storage. The operation management section manages, based on a usage state of the second storage, whether or not to transfer from the first storage to the second storage data targeted for access but not stored in the second storage.