Patents by Inventor Kenichiro Yoshii

Kenichiro Yoshii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7054912
    Abstract: In a data transfer scheme using a caching technique and/or a compression technique which is capable of reducing the network load of a network connecting between data transfer devices, correspondences between data and their names are registered at the data transfer devices and the corresponding names are transferred, instead of transferring the data, for those data for which the correspondences are registered, so that it is possible to reduce the amount of transfer data among the data transfer devices.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: May 30, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsunori Kanai, Toshibumi Seki, Kenichiro Yoshii, Hideaki Sato, Takayuki Miyazawa, Haruhiko Toyama, Yasuhiro Kimura, Hideki Yoshida
  • Publication number: 20050108715
    Abstract: An information processing system performs a plurality of tasks within a specific time interval. The system includes a bus, a plurality of processors which transfer data via the bus, and a unit for performing a scheduling operation of determining execution start timing of each of the tasks and at least one the processors which executes the tasks, based on cost information concerning a time required to perform each of the tasks and bandwidth information concerning a data transfer bandwidth required by each of the tasks, to perform the tasks within the specific time interval without overlapping execution terms of at least two tasks of the tasks, the two tasks requiring data transfer bandwidths not less than those of the others of the tasks.
    Type: Application
    Filed: September 8, 2004
    Publication date: May 19, 2005
    Inventors: Tatsunori Kanai, Seiji Maeda, Hirokuni Yano, Kenichiro Yoshii
  • Publication number: 20050066330
    Abstract: An information processing system performs a real-time operation periodically at specific time intervals. The system includes a unit for performing a scheduling operation of assigning the real-time operation to a processor to perform the real-time operation periodically at the specific time intervals by the processor, a unit for computing a ratio of an execution time of the real-time operation to be performed by the processor at a first operating speed, based on the specific time intervals and cost information concerning a time required to perform the real-time operation by the processor at the first operating speed, and a unit for performing an operating speed control operation to operate the processor at a second operating speed that is lower than the first operating speed, the second operating speed being determined based on the computed ratio.
    Type: Application
    Filed: August 2, 2004
    Publication date: March 24, 2005
    Inventors: Tatsunori Kanai, Seiji Maeda, Hirokuni Yano, Kenichiro Yoshii
  • Publication number: 20050060709
    Abstract: An information processing system periodically performs a real-time operation including a plurality of chained tasks. The system includes a plurality of processors, a unit for dividing the chained tasks into a first task group and a second task group based on a relationship in order of execution among the tasks, the second task group being executed after the first task group, and a unit for performing a scheduling operation of periodically assigning each of the first task group and the second task group to at least one of the processors to periodically execute the first task group at regular time intervals and periodically execute the second task group at the regular time intervals with a one-period delay relative to the first task group.
    Type: Application
    Filed: July 21, 2004
    Publication date: March 17, 2005
    Inventors: Tatsunori Kanai, Seiji Maeda, Hirokuni Yano, Kenichiro Yoshii
  • Publication number: 20040268354
    Abstract: A real-time processing system that executes a plurality of threads, each of the threads being a unit of execution of a real-time operation, comprises a plurality of processors, a unit which selects a tightly coupled thread group from among the threads based on coupling attribute information indicative of a coupling attribute between the threads, the tightly coupled thread group including a set of tightly coupled threads running in cooperation with each other, and a unit which performs a scheduling operation of dispatching the tightly coupled threads to several of the processors that are equal to the tightly coupled threads to simultaneously execute the tightly coupled threads by the several of the processors.
    Type: Application
    Filed: March 25, 2004
    Publication date: December 30, 2004
    Inventors: Tatsunori Kanai, Seiji Maeda, Kenichiro Yoshii, Hirokuni Yano
  • Publication number: 20040268353
    Abstract: An information processing system performs a real-time operation including a combination of a plurality of tasks. The system includes a plurality of processors, a unit which stores structural description information and a plurality of programs describing procedures corresponding to the tasks, the structural description information indicating a relationship in input/output between the programs and including cost information concerning time required for executing each of the programs, a unit which determines an execution start timing and execution term of each of a plurality of threads for execution of the programs based on the structural description information, and a unit which performs a scheduling operation of assigning the threads to at least one of the processors according to a result of the determining.
    Type: Application
    Filed: March 25, 2004
    Publication date: December 30, 2004
    Inventors: Tatsunori Kanai, Seiji Maeda, Kenichiro Yoshii, Hirokuni Yano
  • Publication number: 20040268083
    Abstract: An information processing system includes a first processor having a first local memory, a second processor having a second local memory, and a third processor having a third local memory. The system further includes a unit which maps one of the second and third local memories in part of an effective address space of a first thread to be executed by the first processor, the one of the second and third local memories being the local memory of a corresponding one of the second and third processors, which executes a second thread interacting with the first thread, and a unit which changes the one of the second and third local memories which is to be mapped in part of the effective address space to the other when one of the second and third processor that executes the second thread is changed to the other.
    Type: Application
    Filed: March 25, 2004
    Publication date: December 30, 2004
    Inventors: Tatsunori Kanai, Seiji Maeda, Kenichiro Yoshii
  • Publication number: 20040098718
    Abstract: A task allocation method in a multiprocessor system having a first processor with a first instruction set and a second processor with a second instruction set. A task is allocated to either of the first processor or the second processor. The task corresponds to a program having an execution efficiency. The program includes a program module described by either of the first instruction set or the second instruction set. In the method, a task that corresponds to a program module described by the first instruction set is allocated to the first processor. It is determined whether or not the execution efficiency of the program is improved if a destination allocated for the task is changed from the first processor to the second processor. If the execution efficiency of the program is improved, the destination allocated for the task is changed to the second processor.
    Type: Application
    Filed: November 19, 2003
    Publication date: May 20, 2004
    Inventors: Kenichiro Yoshii, Hirokuni Yano, Seiji Maeda, Tatsunori Kanai
  • Publication number: 20030187960
    Abstract: In a client server system, the network load is reduced by using the fingerprint compression and the differential compression, by providing the proxy server at the server side and using the general purpose browser at the client side. without requiring a separate proxy server at the client side. The client downloads and installs a fingerprint cache processing engine as a plug-in.
    Type: Application
    Filed: March 26, 2003
    Publication date: October 2, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuichi Koba, Yasuhiro Kimura, Kenichiro Yoshii, Atsushi Shono, Hideaki Sato, Toshibumi Seki
  • Publication number: 20030187923
    Abstract: At a data transfer device for transferring a request message from a first communication device to a second communication device, and transferring a response message containing a response data from the second communication device to the first communication device, an identifier to be allocated to the response data contained in the response message is generated according to a content of the response data, and a re-direct response message for re-directing the first communication unit to a URL containing the identifier is transmitted to the first communication device, instead of transmitting the response message, when the response message is received from the second communication device, and the response message containing the response data stored in the memory in correspondence to the identifier contained in the URL is transmitted when the request message for the URL containing the identifier is received from the first communication device.
    Type: Application
    Filed: March 26, 2003
    Publication date: October 2, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiro Kimura, Yuichi Koba, Kenichiro Yoshii, Atsushi Shono, Hideaki Sato, Toshibumi Seki
  • Publication number: 20030061337
    Abstract: In a data transfer device, presence/absence of a prescribed header in the received request message is analyzed, and information indicating the presence/absence of the prescribed header, or information indicating either presence or absence of the prescribed header when the prescribed header is either present or absent as a result of analysis is stored. Then, when a reply message corresponding to the request message is received, the presence/absence of the prescribed header is checked by referring to the stored information, and the reply message is transferred according to a result of checking.
    Type: Application
    Filed: September 25, 2002
    Publication date: March 27, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideaki Sato, Tatsunori Kanai, Hideki Yoshida, Toshibumi Seki, Kenichiro Yoshii, Takayuki Miyazawa, Yasuhiro Kimura, Haruhiko Toyama
  • Publication number: 20030005047
    Abstract: In a data transfer scheme using a caching technique and/or a compression technique which is capable of reducing the network load of a network connecting between data transfer devices, correspondences between data and their names are registered at the data transfer devices and the corresponding names are transferred, instead of transferring the data, for those data for which the correspondences are registered, so that it is possible to reduce the amount of transfer data among the data transfer devices. Server side data transfer devices and client side data transfer devices can be provided in multiple-to-one, one-to-multiple, or multiple-to-multiple manners.
    Type: Application
    Filed: June 13, 2002
    Publication date: January 2, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshibumi Seki, Tatsunori Kanai, Kenichiro Yoshii, Hideki Yoshida, Haruhiko Toyama, Hideaki Sato, Yasuhiro Kimura, Takayuki Miyazawa
  • Publication number: 20020129167
    Abstract: In a data transfer scheme using a caching technique and/or a compression technique which is capable of reducing the network load of a network connecting between data transfer devices, correspondences between data and their names are registered at the data transfer devices and the corresponding names are transferred, instead of transferring the data, for those data for which the correspondences are registered, so that it is possible to reduce the amount of transfer data among the data transfer devices.
    Type: Application
    Filed: March 8, 2002
    Publication date: September 12, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsunori Kanai, Toshibumi Seki, Kenichiro Yoshii, Hideaki Sato, Takayuki Miyazawa, Haruhiko Toyama, Yasuhiro Kimura, Hideki Yoshida
  • Publication number: 20020129168
    Abstract: In a data transfer scheme using a caching technique and/or a compression technique which is capable of reducing the network load of a network connecting between data transfer devices, correspondences between data and their names are registered at the data transfer devices and the corresponding names are transferred, instead of transferring the data, for those data for which the correspondences are registered, so that it is possible to reduce the amount of transfer data among the data transfer devices. Even when the name corresponding to the data is not registered so that it is impossible to transfer the corresponding name instead of transferring the data, it is possible to reduce the amount of transfer data among the data transfer devices by transferring the compressed data in which this data is expressed in a compressed form by utilizing the name corresponding to the registered reference data.
    Type: Application
    Filed: March 11, 2002
    Publication date: September 12, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsunori Kanai, Toshibumi Seki, Kenichiro Yoshii, Hideaki Sato, Takayuki Miyazawa, Haruhiko Toyama, Yasuhiro Kimura, Hideki Yoshida