Patents by Inventor Kenji Murata

Kenji Murata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7732583
    Abstract: Novel glycolipid derivatives, where the substituent of the sphingosine base part is a short carbon chain alkyl group, substituted or unsubstituted cycloalkyl group, substituted or unsubstituted aryl group or substituted or unsubstituted aralkyl group and efficient synthetic methods for practical mass production of the same and intermediates useful for the synthesis of these compounds. Glycolipids having the formula (I): where R3 indicates a substituted or unsubstituted C1 to C7 linear alkyl group, substituted or unsubstituted cycloalkyl group, substituted or unsubstituted aryl group, or substituted or unsubstituted aralkyl group and R8 indicates a substituted or unsubstituted C1 to C35 alkyl group, substituted or unsubstituted aryl group or substituted or unsubstituted aralkyl group are chemically synthesized.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: June 8, 2010
    Assignee: Japan as represented by President of National Center of Neurology and Psychiatry
    Inventors: Hirokazu Annoura, Kenji Murata, Takashi Yamamura
  • Publication number: 20100130739
    Abstract: Provided is a compound that has the ability to promote axonal outgrowth in combination with the ability to promote angiogenesis and can therefore be used to reduce central nerve injuries such as head injury and spinal cord injury, cerebral infarction, ischemic heart diseases such as myocardial infarction and organic angina, peripheral arterial occlusive diseases such as critical limb ischemia, or after-effects of these diseases. Specifically, the compound is represented by the following formula (I): in which Nx group is preferably a 6-membered aromatic ring containing two nitrogen atoms; R0, R1 and R2 are each independently a hydrogen atom, an alkyl group, an amino group or the like; E is an oxygen atom or an —NR8 group (wherein R8 is an alkyl group or the like); n is an integer of 0 to 5; X and Y are each a connecting bond, a cycloalkyl group, —CO— or the like; and Q is a hydrogen atom or a phenyl group.
    Type: Application
    Filed: April 25, 2008
    Publication date: May 27, 2010
    Applicant: ASUBIO PHARMA CO., LTD.
    Inventors: Naohiro Takemoto, Kenji Murata, Norihito Murayama, Chikaomi Yamada
  • Publication number: 20100013692
    Abstract: An external input operation clock signal is required for operating a conventional A/D converter, and the performance of the A/D converter is undesirably determined by the characteristics of the external input operation clock. A clock generator circuit (104) for automatically generating an operation clock is provided inside an A/D converter (100) to make the A/D converter require no external input operation clock. Further, a circuit for detecting the operation times of the constituents of the A/D converter is provided to generate a clock with which the A/D converter is optimally operated, thereby realizing high-speed operation and low power consumption.
    Type: Application
    Filed: August 10, 2007
    Publication date: January 21, 2010
    Inventors: Michiyo Yamamoto, Kenji Murata, Masakazu Shigemori
  • Publication number: 20100007541
    Abstract: The conventional A/D converter has a drawback that the conversion precision is degraded when the operation periods of the constituents of the A/D converter are shortened due to the duty ratio of an external input clock because the operation periods of the constituents of the A/D converter depend on the pulse width of the external input clock. However, a highly-precise A/D conversion operation independent of the duty ratio of the external input clock can be realized by providing a circuit for detecting the operation periods of the constituents of the A/D converter, and adjusting the duty ratio of the operation clock according to the detected operation periods of the constituents of the A/D converter.
    Type: Application
    Filed: August 10, 2007
    Publication date: January 14, 2010
    Inventors: Masakazu Shigemori, Koji Sushihara, Kenji Murata
  • Publication number: 20060074235
    Abstract: Novel glycolipid derivatives, where the substituent of the sphingosine base part is a short carbon chain alkyl group, substituted or unsubstituted cycloalkyl group, substituted or unsubstituted aryl group or substituted or unsubstituted aralkyl group and efficient synthetic methods for practical mass production of the same and intermediates useful for the synthesis of these compounds. Glycolipids having the formula (I): where R3 indicates a substituted or unsubstituted C1 to C7 linear alkyl group, substituted or unsubstituted cycloalkyl group, substituted or unsubstituted aryl group, or substituted or unsubstituted aralkyl group and R8 indicates a substituted or unsubstituted C1 to C35 alkyl group, substituted or unsubstituted aryl group or substituted or unsubstituted aralkyl group are chemically synthesized.
    Type: Application
    Filed: February 13, 2004
    Publication date: April 6, 2006
    Inventors: Hirokazu Annoura, Kenji Murata, Takashi Yamamura
  • Patent number: 6927723
    Abstract: In a charge redistribution type A/D converter, an input-side capacitor terminal and a comparator-side capacitor terminal are connected through first and second analog switches to a fixed-voltage supply circuit, and the input-side capacitor terminal is connected through a third analog switch to the outside. Immediately before sampling an analog signal, the first and second analog switches are closed while the third analog switch is opened, according to a RESET signal. Thereby, fixed voltages are supplied to the input-side capacitor terminal and the comparator-side capacitor terminal, respectively, and charge stored in a weighting capacitor unit is initialized to a predetermined value.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: August 9, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daisuke Nomasaki, Kenji Murata, Hideki Tanaka, Yoshinori Miyada
  • Patent number: 6917856
    Abstract: It is constructed so as to detect a joint movement position of a robot arm by a position detector and a joint movement speed is calculated from change amounts of the joint movement position and elapsed time and is compared with an allowable movement speed and unlocking and locking of a brake are controlled so that the joint movement speed of an arm at the time of brake unlocking becomes within a constant value even when a shape, an attitude and a load condition of the robot arm vary. Therefore, movement work of the arm by the brake unlocking can be performed alone and a robot with high safety can be obtained.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: July 12, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kenji Murata
  • Publication number: 20050001291
    Abstract: A semiconductor integrated circuit has a plurality of capacitor cells, and each capacitor cell has an upper electrode and a lower electrode. These electrodes are respectively connected to an upper electrode wiring and a lower electrode. When, for example, the upper electrode is connected to the upper electrode wiring and the electrode wiring is located at a side of the lower electrode of another capacitor cell or a side of the lower electrode wiring connecting these electrodes, a shield wiring is provided between the upper electrode wiring and the adjacently-located lower electrode of the other capacitor cell or between the upper electrode wiring and the adjacently-located lower electrode wiring. Thus, with this shield wiring, the capacitance coupling between each wiring of the capacitor cells and each upper electrode or each lower electrode of the capacitor cells are effectively suppressed.
    Type: Application
    Filed: July 27, 2004
    Publication date: January 6, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoshinori Miyada, Kenji Murata, Daisuke Nomasaki
  • Publication number: 20040257257
    Abstract: In a charge redistribution type A/D converter, an input-side capacitor terminal and a comparator-side capacitor terminal are connected through first and second analog switches to a fixed-voltage supply circuit, and the input-side capacitor terminal is connected through a third analog switch to the outside. Immediately before sampling an analog signal, the first and second analog switches are closed while the third analog switch is opened, according to a RESET signal. Thereby, fixed voltages are supplied to the input-side capacitor terminal and the comparator-side capacitor terminal, respectively, and charge stored in a weighting capacitor unit is initialized to a predetermined value.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 23, 2004
    Inventors: Daisuke Nomasaki, Kenji Murata, Hideki Tanaka, Yoshinori Miyada
  • Publication number: 20040214010
    Abstract: The present invention relates to a glass for freezers and refrigerators and a glass article formed of the glass, and its technical problem to be solved is to secure a sufficient thermal insulating ability, reduce the cost, prevents dew condensation without consuming extra power energy as well as secure desired transparency. In the glass for freezers and refrigerators, a tin oxide film and a silicon oxide film are laminated on a surface of the glass substrate in this order, and a tin oxide film with fluorine added (low-radiation layer) is formed on the silicon oxide film. The glass is installed in a freezer or refrigerator such that a surface of the glass formed with the low-radiation layer faces onto the inside of the freezer or refrigerator. A glass article in which is used one or more sheets of the above glass, such as a multi-layered glass, with improved thermal insulation can be obtained.
    Type: Application
    Filed: January 10, 2003
    Publication date: October 28, 2004
    Inventors: Kenji Murata, Hidemi Nakai
  • Patent number: 6777775
    Abstract: A semiconductor integrated circuit has a plurality of capacitor cells, and each capacitor cell has an upper electrode and a lower electrode. These electrodes are respectively connected to an upper electrode wiring and a lower electrode. When, for example, the upper electrode is connected to the upper electrode wiring and the electrode wiring is located at a side of the lower electrode of another capacitor cell or a side of the lower electrode wiring connecting these electrodes, a shield wiring is provided between the upper electrode wiring and the adjacently-located lower electrode of the other capacitor cell or between the upper electrode wiring and the adjacently-located lower electrode wiring. Thus, with this shield wiring, the capacitance coupling between each wiring of the capacitor cells and each upper electrode or each lower electrode of the capacitor cells are effectively suppressed.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: August 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshinori Miyada, Kenji Murata, Daisuke Nomasaki
  • Patent number: 6771784
    Abstract: A sub woofer system is constituted of a real time digital signal processing part 5 that includes an A/D converter 5a, a low pass filter block 5b, a delay block 5c, and a D/A converter block 5d, an analog power amplifier 6 and a speaker 7. The length of delay time of the delay block 5c is set so that the length of group delay time of the digital signal processing part 5 may equal an integral multiple of the length of time corresponding to one wavelength of the crossover point frequency between the digital signal processing part 5 and a main speaker 4. The signal processing is performed under the conditions that have been set as such. In this case, a construction is made up wherein the length of a group delay time produced in the digital type real time digital signal processing part can be set to a given value. By this construction, it is possible to provide a sub woofer system which can improve the phase interference between the main speaker and the sub woofer system at the crossover point between the two.
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: August 3, 2004
    Inventor: Kenji Murata
  • Patent number: 6741192
    Abstract: The present invention provides a serial/parallel A/D converter which is capable of performing a high-speed and high-accuracy operation even in the case where an analog input voltage Vin greatly varies in a period between a previous sampling period in which the analog input voltage is held and the next sampling period, when converting the analog input voltage Vin input into a digital value. This serial/parallel A/D converter includes a lower-order reference voltage initializing circuit 8 for initializing a lower-order reference voltage to an initialization voltage Vrc 23.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: May 25, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Murata, Daisuke Nomasaki
  • Patent number: 6700524
    Abstract: An A/D converter comprises a pipeline stage array in which plural pipeline stages are connected in series, each pipeline stage performing a pipeline operation on an inputted analog voltage to output a digital voltage; a number-of-bits control circuit for outputting a number-of-bits selection signal which indicates whether the operation of each pipeline stage should be carried out or halted, according to a number-of-bits control signal which indicates a resolution; and a correction circuit for compensating a digital value to be output, according to the number-of-bits control signal. Therefore, when resolution of the A/D converter, which is requested by the system, is changed, only the pipeline stages required for realizing the requested resolution are operated while the other pipeline stages are halted, whereby a reduction in power consumption of the A/D converter is realized and, simultaneously, a breakdown of an output from the A/D converter is avoided.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: March 2, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Junichi Naka, Yoichi Okamoto, Yoshitsugu Inagaki, Kenji Murata, Koji Oka
  • Publication number: 20040017305
    Abstract: The present invention provides a serial/parallel A/D converter which is capable of performing a high-speed and high-accuracy operation even in the case where an analog input voltage Vin greatly varies in a period between a previous sampling period in which the analog input voltage is held and the next sampling period, when converting the analog input voltage Vin input into a digital value. This serial/parallel A/D converter includes a lower-order reference voltage initializing circuit 8 for initializing a lower-order reference voltage to an initialization voltage Vrc 23.
    Type: Application
    Filed: July 9, 2003
    Publication date: January 29, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Murata, Daisuke Nomasaki
  • Patent number: 6667075
    Abstract: The present invention relates to a method for imparting hydrophilicity to a substrate whereby high hydrophilic properties and water-holding properties can be maintained for a long period of time. According to the present invention, an SiO2 film is formed directly or through an undercoat layer on a substrate under a reduced pressure of 100 Pa or less and immediately after the SiO2 film is formed, the SiO2 film is treated with water. Before forming the SiO2 film, it is also desirable that an undercoat layer consisting of a TiO2 film, Al2O3 film, Nb2O5 film, a laminated film prepared by laminating the TiO2 film on the Al2O3 film, a laminated film prepared by laminating the TiO2 film on the Nb2O5 film, or a low emissivity film be formed on a substrate and the SiO2 film be then formed on the undercoat film to serve as an SiO2 composite film.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: December 23, 2003
    Assignee: Nippon Sheet Glass Co., Ltd.
    Inventors: Toshiaki Kitazoe, Keisuke Tanaka, Kenji Murata
  • Publication number: 20030192758
    Abstract: It is constructed so as to detect a joint movement position of a robot arm by a position detector and a joint movement speed is calculated from change amounts of the joint movement position and elapsed time and is compared with an allowable movement speed and unlocking and locking of a brake are controlled so that the joint movement speed of an arm at the time of brake unlocking becomes within a constant value even when a shape, an attitude and a load condition of the robot arm vary. Therefore, movement work of the arm by the brake unlocking can be performed alone and a robot with high safety can be obtained.
    Type: Application
    Filed: February 6, 2003
    Publication date: October 16, 2003
    Inventor: Kenji Murata
  • Patent number: D598010
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: August 11, 2009
    Assignee: SMK Corporation
    Inventors: Takeshi Matsuda, Kenji Hatano, Masaji Komuro, Kenji Murata
  • Patent number: D599785
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: September 8, 2009
    Assignee: SMK Corporation
    Inventors: Takeshi Matsuda, Kenji Hatano, Masaji Komuro, Kenji Murata
  • Patent number: D606049
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: December 15, 2009
    Assignee: SMK Corporation
    Inventors: Takeshi Matsuda, Kenji Hatano, Masaji Komuro, Kenji Murata